KR20180007823A - Multi core unit control method in a vehicle, multi core unit and electronic control unit comprising with multi core unit - Google Patents

Abstract

The present invention provides a multi-core unit control method of a vehicle, a multi-core unit of the vehicle, and an electronic control unit composed of the multi-core unit of the vehicle. The multi-core unit control method of a vehicle according to an embodiment of the present invention includes the steps of: allocating at least one or more tasks to a plurality of cores; monitoring the task processing of the plurality of cores to which the tasks are allocated; and moving the corresponding task to another core if a task processing delay is monitored in the core to which the task is allocated. Accordingly, the present invention can solve a processing speed delay problem.

Description

TECHNICAL FIELD [0001] The present invention relates to a multi-core unit control method for a vehicle, an electronic control unit composed of a multi-core unit and a multi-core unit,

The present invention relates to an electronic control unit composed of a multicore unit control method, a multicore unit and a multicore unit of a vehicle, and more particularly, to an electronic control unit comprising an electronic control unit included in a vehicle, Core unit, and a multi-core unit for minimizing the power consumption of the multi-core unit.

Today, a single core based system is evolving into a multi-core (multi-core) system structure due to the limitations of additional performance enhancement and low power implementation.

The development of a multicore system environment is focused on improving system performance and reducing power consumption.

First, to improve the performance of a multicore system, it is possible to improve the performance by using a good core. To reduce power consumption, there is a method of improving using a system designed with a low power. However, since a system designed with a good core or low power is designed on hardware, it can not be further improved after its design.

Therefore, in a multicore system environment composed of a plurality of cores having different performance, a core allocation method allocates a thread to a corresponding core according to core information to be allocated to a thread based on information in a pre-designed database on core performance by a scheduler .

However, if a core is allocated to a thread at a time when a thread is created and the task is not changed until termination, if the unexpected task is allocated to a specific core in advance, a processing speed may be delayed due to overload.

Embodiments of the present invention seek to solve the problem of the processing speed delay that may occur when an unexpected task is assigned to a specific core.

In addition, the problem that the processing speed is decelerated due to the delay of the task assigned to a specific core is solved.

According to an aspect of the present invention, there is provided a method for managing a task, the method comprising: allocating at least one task to a plurality of cores; monitoring task processing of a plurality of cores to which the task is allocated; And moving the task to another core if it is monitored, and a method of controlling a multicore unit of a vehicle.

In addition, when the task processing delay is monitored in the core to which the task is allocated, the step of moving the task to another core includes: if the first task allocated to the first core is processed exceeding the allocated processing time, And moving the task to a second core in which a processing margin exists.

The method of claim 1, further comprising: when a task delay is monitored on a core to which the task is allocated, moving the task to another core, if the new task is assigned to the first core, The method comprising the steps of:

According to another aspect of the present invention, there is provided a method for managing a plurality of cores, the method comprising: a plurality of cores for processing tasks; a scheduler for allocating at least one task to the plurality of cores; And a second core for moving the task to another core when the task processing delay is monitored in the multi-core unit of the vehicle.

In addition, the task processing delay may include a case where the first task assigned to the first core is processed in excess of the processing time allocated thereto.

The task processing delay may include a case where a new task is assigned to the first core.

According to another aspect of the present invention, there is provided a computer program for causing a computer to function as: a plurality of cores for processing tasks; a scheduler for allocating at least one task to the plurality of cores; And a second core for moving the task to another core when the task processing delay is monitored in the core, may be provided.

It may also include a task of generating a control signal for performing braking control of the vehicle.

The embodiment of the present invention can solve the processing speed delay problem that may occur when a new task is assigned to a specific core when a task is assigned to a plurality of cores in a multicore system constituting an electronic control unit.

1 is a block diagram of an electronic control unit including a multicore system according to the present invention.
2 is a schematic diagram illustrating operation of a multicore system in accordance with an embodiment of the present invention.
3 is a schematic diagram illustrating inter-core movement of a new task in a multicore system according to an embodiment of the present invention.
FIG. 4 is a schematic diagram illustrating movement of an existing task among cores in a multicore system according to another embodiment of the present invention.
5 is a flowchart illustrating a multicore control method according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments are provided to fully convey the spirit of the present invention to a person having ordinary skill in the art to which the present invention belongs. The present invention is not limited to the embodiments shown herein but may be embodied in other forms. For the sake of clarity, the drawings are not drawn to scale, and the size of the elements may be slightly exaggerated to facilitate understanding.

1 is a block diagram of an electronic control unit including a multicore system according to the present invention, and Fig. 2 is a schematic diagram showing the operation of a multicore system according to an embodiment of the present invention FIG. 3 is a schematic diagram illustrating a movement of a new task among cores in a multicore system according to an embodiment of the present invention. FIG. 4 is a diagram illustrating a movement of an existing task in a multicore system according to another embodiment of the present invention. Fig.

First, as shown in Fig. 1, the present invention comprises a multicore system 100 for data processing in the electronic control unit 10 shown in the figure.

An electronic control unit (ECU) 10 receives an electric signal for driving a plurality of apparatuses of the vehicle 1 and outputs a control signal. The control unit 10 controls operation of the multi- It is possible.

The electronic control unit 10 includes a main processor 20 operated through the operation of the multicore constituting the electronic control unit 10 and a memory 30 for storing various data.

That is, the operation of the main processor 20 may be capable of outputting a control signal through the multi-core data processing method of FIGS.

First, as shown in FIG. 2, it operates through a multicore system including core 0, core 1,..., And core M according to the present invention.

According to a conventional multicore control method, a task is assigned to a multicore. That is, as shown in the figure, tasks are sequentially assigned to the core 0 in the order of task 01, task 02, ..., and tasks are continuously assigned to the core 1 as the tasks 11, 12, ... .

In this case, the order in which the tasks are allocated may be allocated by a static priority scheduling method or a static deadline scheduling method according to a deterministic mechanism. However, the present invention is not limited to this, and a task may be assigned to each core according to a data processing method selected by the manufacturer.

However, the multicore control system 1 according to the present invention provides a specific core (core M in FIG. 1) that performs a monitoring function. That is, the task is not processed in the core M, and the task processing in the plurality of cores except the core M is monitored. At this time, the monitoring function performed by the core M is to observe a case where a new task that has not been expected in the task processing step is entered. The multicore control system 1 according to the present invention is a system in which a new task unexpectedly enters a deterministic This is to solve the problem that the data processing can not be performed by the mechanism.

Specifically, the core M performs a monitoring function, and the remaining cores perform task processing according to a deterministic mechanism. At this time, when a task is delayed more than the time assigned in a specific core (core 0), an unexpected operation is performed, or an unexpected new task is assigned, 1).

In addition, the monitoring function in the core M includes the Dependency Structure Matrix (DSM), and it can analyze the dependency between the tasks and determine the task processing order in order to deal with the delayed task within the range that does not affect the performance of the entire system have.

Since the monitoring function in the core M is performed by considering only computable parameters for tasks that are only operating or delayed, the inter-core movement of the task can be accelerated.

The scheduler may allocate the processes generated by the request from the user or the user interface (not shown) to a specific core, and assigning tasks may be assigned to perform task processing according to a deterministic mechanism in each core.

2 illustrates a multicore control method according to an embodiment of the present invention. Core 0 and core 1 perform certain functions of the system in the electronic control unit 10, and most tasks are performed in core 0. The core M performs only monitoring functions, and performs continuous monitoring of parameters for determining operation and delay.

In Core 0 and Core 1, task processing is performed according to a deterministic scheduling algorithm. At this time, if an unexpected task (task 1U) is assigned to core 0, as shown in Fig. 2, a monitoring function is performed in core M to check whether the processing speed of electronic control unit 10 is delayed, Through the monitoring function of M, it is determined whether a new task can be moved to another core. At this time, if sufficient margin is not ensured for another core, waiting for the currently allocated core to move to another movable core as a result of performing the monitoring function of the core M is performed.

Next, FIG. 3 illustrates a multicore control method according to another embodiment of the present invention.

As shown in FIG. 3, when the task 01 is processed exceeding the allocated time, the monitoring function of the core M determines whether the task 01 can accelerate the processing speed through the inter-core movement. That is, as shown in the figure, when there is a spare time until the next task is processed in the core 1, the task 01 assigned to the core 0 is moved to the core 1. As a result, the subsequent task 02, task 03, ... assigned to the core 0 can be processed without delay.

Next, the memory 30 stores programs and data of the multicore system 1 of the vehicle 1 according to the present invention.

Specifically, the memory (not shown) 30 may be a volatile memory such as a S-RAM or a D-RAM, as well as a flash memory, a read only memory, an erasable programmable read- A nonvolatile memory such as a memory (EPROM), an electrically erasable programmable read only memory (EEPROM), or the like.

The non-volatile memory may semi-permanently store control programs and control data for controlling the operation of the fault detection system 1 of the vehicle 1, and the volatile memory may invoke control programs and control data from the non- And various control signals output from the main processor 20 can be temporarily stored.

The configuration of the multicore system of the vehicle 1 has been described above.

Hereinafter, the operation of the multicore control method of the vehicle will be described with reference to FIG.

First, a core that performs a monitoring function for monitoring a task processing state or the like in a plurality of cores among a plurality of cores (core 1, core 2, ..., core M) is designated (S10).

That is, as shown in FIG. 1, the core M among the plurality of cores can observe the task processing of the remaining cores.

Thereafter, a task is assigned to the designated core (S20). Specifically, in order to process specific data, data is sequentially processed in the core 0 for each core as in the case of the task 01, the task 02, ..., and the core 1 is sequentially processed in the order of the task 11, the task 12, A task is assigned to a plurality of cores so that data is processed.

At this time, when the new task enters a specific core (YES in S30), the core M continuously performs the monitoring function to check whether the delay time to be generated when a new task enters a specific core is shortened, It is monitored whether the task can be changed to a new core to be entered (S40).

However, in addition to the case where a new test is entered, a specific task is delayed from a specific time, or whether a specific task is changed to a new core even when an unexpected operation is performed.

At this time, it can be determined that monitoring whether or not the change is possible is confirmed by checking whether the currently allocated core is shorter than the delay time generated when a new task is entered (S50). That is, if the delay time is shortened (YES in S50), the new task is changed to a new core and entered (YES in S60).

If the delay time is not shortened (NO in S50), the core M maintains the new task in the state allocated to the current core when performing the monitoring function (S70).

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is clearly understood that the same is by way of illustration and example only and is not to be construed as limited to the embodiments set forth herein; It will be understood that various modifications may be made without departing from the spirit and scope of the invention.

1: vehicle
100: Multicore system

Claims (8)

Assigning at least one task to a plurality of cores;
Monitoring task processing of a plurality of cores to which the task is assigned;
And if the task processing delay is monitored in the core to which the task is allocated, moving the task to another core. The method according to claim 1,
When a task processing delay is monitored in a core to which the task is allocated, moving the task to another core, if the first task assigned to the first core is processed beyond the allocated processing time, To a second core in which there is a processing margin. The method according to claim 1,
When a new task is allocated to the first core, moving the new task to a second core in which there is a processing margin, if the new task is allocated to the first core Said method comprising the steps of: A plurality of cores for processing tasks;
A scheduler for assigning at least one task to the plurality of cores;
And a second core that monitors task processing in the plurality of cores and, when a task processing delay is monitored in any of the first cores, moves the task to another core. 5. The method of claim 4,
Wherein the task processing delay includes a case where the first task assigned to the first core is processed exceeding the processing time allocated thereto. 5. The method of claim 4,
And a task processing delay includes a case where a new task is assigned to the first core. A plurality of cores for processing tasks;
A scheduler for assigning at least one task to the plurality of cores;
And a second core for monitoring the task processing in the plurality of cores and for moving the task to another core when the task processing delay is monitored in any of the first cores. . 8. The method of claim 7,
An electronic control unit comprising a multi-core unit of a vehicle including a task for generating a braking control signal of the vehicle.

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