KR20170126040A - Module and method for correcting luminance of display apparatus - Google Patents

Abstract

The present invention relates to a module and method for correcting the brightness of a display device, and more particularly, to a module and method for correcting brightness of a display device, capable of determining a brightness compensation coefficient based on the brightness of a correction target pixel, and correcting digital data allocated to the correction target pixel by calculating a difference value between the average value of the digital data allocated to each of the plurality of pixels and the digital data allocated to the correction target pixel. Accordingly, the present invention can reduce brightness deviation generated between the plurality of pixels connected to the same gate line and prevent the degradation of image quality.

Description

[0001] The present invention relates to a luminance correction module and method for a display device,

The present invention relates to a brightness correction module and method of a display device.

A flat panel display for replacing a conventional cathode ray tube display device includes a liquid crystal display, a field emission display, a plasma display panel (PDP) And an organic light-emitting diode (OLED) display.

Organic light emitting diodes (OLEDs) have high luminance and low operating voltage characteristics, and they are self-emitting type that emits light by themselves, so it has a large contrast ratio, and it is easy to realize an ultra-thin display. In addition, the response time is as small as several microseconds (μs), and the moving image is easy to implement, and there is no limitation of the viewing angle, and it is stable even at a low temperature.

1 is an equivalent circuit diagram for a pixel P included in a conventional display device.

Referring to FIG. 1, a pixel P includes a scan transistor Tsc for applying a data voltage Vdata to a gate terminal of a driving transistor Tdr corresponding to a scan signal SCAN.

The pixel P also includes a driving transistor Tdr that generates a driving current Ioled of the organic light emitting diode OLED according to a data voltage Vdata applied to a gate terminal thereof. At this time, a storage capacitor Cst for storing the voltages of the gate terminal and the source terminal of the driving transistor Tdr is connected between the gate terminal and the source terminal of the driving transistor Tdr.

The anode terminal of the organic light emitting diode OLED is connected to the source terminal of the driving transistor Tdr and the cathode terminal of the drain terminal of the driving transistor TDR and the cathode terminal of the organic light emitting diode OLED are respectively connected to the high potential driving voltage EVDD And the low potential driving voltage EVSS are supplied to drive the driving transistor Tdr and the organic light emitting diode OLED.

More specifically, when a high level scan signal SCAN is applied to the pixel P, the scan transistor Tsc is turned on and the data voltage Vdata is applied to the data line DL through the data line DL. Gate terminal.

Next, when a high-level sensing signal SENSE is applied to the pixel P, the sensing transistor Tss is turned on and a predetermined reference voltage Vref is applied to the source terminal of the driving transistor Tdr.

The data voltage Vdata and the reference voltage Vref are applied to the gate terminal and the source terminal of the driving transistor Tdr and then the low level scan signal SCAN and the sensing signal SENSE are applied to the pixel P The scan transistor Tsc and the sensing transistor Tss are turned off.

Accordingly, a voltage difference between the data voltage Vdata and the reference voltage Vref is applied to the gate-source terminal of the driving transistor Tdr to generate the driving current Ioled. At this time, a voltage difference between the data voltage Vdata and the reference voltage Vref is charged at both ends of the storage capacitor Cst and the voltage applied to the gate-source terminal of the driving transistor Tdr is maintained.

The voltage applied to the anode terminal of the organic light emitting diode OLED rises when the driving transistor Tdr operates and the organic light emitting diode OLED operates by the driving current Ioled.

This increases the voltage at the source terminal of the driving transistor Tdr and increases the voltage at the gate terminal of the driving transistor Tdr by the storage capacitor Cst connected to the gate-source terminal of the driving transistor Tdr.

The voltage of the source terminal of the scan transistor Tsc connected to the gate terminal of the drive transistor Tdr also rises and the gate terminal of the scan transistor Tsc is turned on by the parasitic capacitor connected to the gate- The voltage of the capacitor C is also increased.

When the voltage of the gate-source terminal of the scan transistor Tsc rises, the scan transistor Tsc is turned on finely and a part of the voltage charged in the storage capacitor Cst is lost.

This causes a problem that the voltage applied to the gate-source terminal of the driving transistor Tdr and the driving current Ioled decrease in turn and the luminance of the organic light emitting diode OLED decreases.

When the voltage of the gate terminal of the scan transistor Tsc rises, the voltage of the gate line GL connected to the gate terminal of the scan transistor Tsc rises and the voltage of the other pixel P ' The voltage of the gate terminal of the scan transistor Tsc '

As a result, the voltage of the gate-source terminal of the scan transistor Tsc 'of the other pixel P' also rises and the scan transistor Tsc 'is turned on, so that a part of the voltage charged in the storage capacitor Cst' Lost.

Therefore, the brightness of the organic light emitting diode OLED 'of the other pixel P' is also reduced, unlike the luminance of the data voltage applied thereto.

On the other hand, as the high data voltage Vdata is input to the pixel P, the driving current Ioled increases and the voltage of the anode terminal of the organic light emitting diode OLED increases.

Accordingly, when a high data voltage Vdata is input to the pixel P, the degree of turn-on of the scan transistor Tsc is increased, and the voltage of the gate-source terminal of the driving transistor Tdr is also increased, There is a problem that the luminance reduction amount of the diode (OLED) increases.

 According to the present invention, a luminance compensation coefficient is determined based on the luminance of a pixel to be corrected, and compensation is performed by using a difference between the average value of the digital data allocated to each of the plurality of pixels and the digital data allocated to the pixel to be corrected, And an object of the present invention is to provide a luminance correction module and method of a display device capable of correcting digital data assigned to a target pixel.

The objects of the present invention are not limited to the above-mentioned objects, and other objects and advantages of the present invention which are not mentioned can be understood by the following description and more clearly understood by the embodiments of the present invention. It will also be readily apparent that the objects and advantages of the invention may be realized and attained by means of the instrumentalities and combinations particularly pointed out in the appended claims.

As described above, the present invention is a technique for improving the brightness degradation of pixels connected to the same gate line, which is caused by an increase in the voltage of the anode terminal of the organic light emitting diode when the organic light emitting diode is driven.

Accordingly, in the present invention, the luminance compensation coefficient is determined based on the luminance of the pixel to be corrected, and the difference between the average value of the digital data assigned to each of the plurality of pixels and the digital data assigned to the pixel to be corrected is calculated. In the present invention, the digital data allocated to the compensation target pixel is corrected using the luminance compensation coefficient and the difference value.

Therefore, the present invention corrects the digital data assigned to the compensation target pixel by using the difference value between the average value of the digital data allocated to each of the plurality of pixels and the digital data allocated to the correction target pixel, The luminance deviation occurring between the pixels of the display device can be reduced and the deterioration of the image quality can be prevented.

To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described herein, there is provided a luminance correction module for calculating a difference between an average value of digital data allocated to each of a plurality of first pixels and digital data assigned to a second pixel, A determination unit that determines a luminance correction coefficient based on the luminance of the second pixel, and a correction unit that corrects the digital data allocated to the second pixel by using the difference value and the luminance correction coefficient. Further, the display device according to the present invention includes the luminance correction module described above.

According to another aspect of the present invention, there is provided a luminance correction method comprising the steps of: determining a luminance correction coefficient based on a luminance of a second pixel of a plurality of first pixels; determining an average value of digital data allocated to each of the first pixels, Calculating a difference value between the digital data allocated to the digital data; And correcting the digital data assigned to the second pixel using the difference value and the luminance correction coefficient.

According to the present invention as described above, the luminance correction coefficient is determined based on the pixel of the pixel to be corrected, and the difference between the average value of the digital data allocated to each pixel and the digital data allocated to the pixel to be corrected and the luminance correction coefficient By correcting the digital data assigned to the pixel to be compensated, it is possible to reduce the luminance deviation occurring between a plurality of pixels connected to the same gate line.

1 is an equivalent circuit diagram of a pixel included in a conventional display device;
2 is a view schematically showing a configuration of a display device according to an embodiment of the present invention.
3 is a diagram specifically illustrating a configuration of a pixel according to an embodiment of the present invention.
4 is a view schematically showing a configuration of a luminance correction module according to an embodiment of the present invention;
5 is a flowchart showing a luminance correction method according to an embodiment of the present invention;

The above and other objects, features, and advantages of the present invention will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings, which are not intended to limit the scope of the present invention. In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail. Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the drawings, the same reference numerals are used to denote the same or similar elements.

2 is a view schematically showing a configuration of a display apparatus 1000 according to an embodiment of the present invention. 2, a display device 1000 according to an exemplary embodiment of the present invention includes a panel 100, a gate driver 200, a data driver 300, a panel controller 400, and a power supply unit 500 .

A panel 100 of a display device 1000 according to an exemplary embodiment of the present invention includes pixels 110 formed of an organic light emitting diode (OLED), and includes a plurality of pixels 110 formed of at least three pixels 110 120 are each formed with one reference voltage line RL and connected to the data driver 300.

In addition, the panel 100 defines a pixel region where the pixels 110 are formed, and signal lines for controlling the driving of the pixels 110 are formed.

The signal lines include first to gth gate lines GL1 to GLg, first to gth sensing lines SL1 to SLg, first to dth (where d is a natural number) 4) reference voltage lines RL1 to RL (d / 4), a plurality of high potential drive voltage lines HPL1 to HPLd, and at least one low potential (high potential) data lines DL1 to DLd, And driving voltage lines LPL1 to LPLd.

Next, each of the first to g-th gate lines GL1 to GLg is formed in parallel so as to be spaced apart from each other along the first direction of the panel 100, that is, the horizontal direction.

Also, each of the first to the gth sensing lines SL1 to SLg may be formed at regular intervals so as to be parallel to the gate lines GL1 to GLg.

Next, the first to d-th data lines DL1 to DLd are aligned in the second direction, that is, the vertical direction, of the panel 100 so as to cross the gate lines GL1 to GLg and the sensing lines SL1 to SLg, respectively And may be formed so as to have a constant spacing therealong.

Each of the first to fourth d / 4 reference voltage lines RL1 to RL (d / 4) may be formed at regular intervals so as to be parallel to the data lines DL1 to DL (d / 4). At least three pixels 110 form one unit pixel 120.

More specifically, four pixels 110 (red pixel R, white pixel W, green pixel G and blue pixel B) form one unit pixel 120, And a reference voltage line RL is formed in the reference voltage line 120. Therefore, when d data lines DL1 to DLd are formed on the horizontal line of the panel 100, the number of the reference voltage lines RL is d / 4.

On the other hand, each of the plurality of high potential driving voltage lines HPL1 to HPLd may be formed at regular intervals so as to be parallel to the data lines DL1 to DLd. Here, each of the plurality of high potential driving voltage lines HPL1 to PLdA may be formed at regular intervals so as to be parallel to each of the reference voltage lines RL1 to RLd.

Each of the plurality of high potential driving voltage lines HPL1 to HPLd provides each pixel 110 with a high potential driving voltage EVDD supplied from the voltage supplying unit 500. [

To this end, each of the plurality of high potential driving voltage lines HPL1 to HPLd may be commonly connected to the high potential driving voltage common line CPL1 formed on the upper side and / or the lower side of the panel 100. In this case, The drive voltage common line CPL1 is connected to the voltage supply unit 500 and transfers the high potential drive voltage EVDD supplied from the voltage supply unit 500 to each of the plurality of high potential drive voltage lines HPL1 to HPLd.

Next, at least one low-potential driving voltage line LPL1 to LPLd is formed on the entire surface of the panel 100, or the data lines DL1 to DLd or the reference voltage lines RL1 to RL (d / 4), respectively, at regular intervals.

At least one low-potential driving voltage line supplies a low-potential driving voltage EVSS supplied from the voltage supply unit 500 to each pixel 110. [ For this purpose, each of the low-potential driving voltage lines LPL1 to LPLd may be commonly connected to a low-potential driving voltage common line CPL2 formed on the upper side and / or the lower side of the panel 100. [

The low potential drive voltage common line CPL2 is connected to the voltage supply unit 500 and supplies the low potential drive voltage EVSS supplied from the voltage supply unit 500 to each of the plurality of low potential drive voltage lines LPL1 to LPLd .

FIG. 3 is a diagram specifically showing a configuration of a pixel 110 according to an embodiment of the present invention.

Referring to FIG. 3, the pixel 110 may include a pixel driving circuit (PDC) and an organic light emitting diode (OLED).

The pixel driving circuit PDC includes a scan transistor Tsc, a sensing transistor Tss, a driving transistor Tdr, and a storage capacitor Cst. Here, the transistors Tsc, Tss, and Tdr may be a thin film transistor (TFT), such as an a-Si TFT, a poly-Si TFT, an oxide TFT, or an organic TFT.

The scan transistor Tsc is switched by the first scan pulse SP1 during sampling to output a data voltage Vdata supplied to the data line DL. To this end, the scan transistor Tsc has a gate terminal connected to the adjacent gate line GL, a source terminal connected to the adjacent data line DL, and a drain terminal connected to the first node d1, which is the gate terminal of the driving transistor Tdr. .

The sensing transistor Tss is switched by the second scan pulse SP2 during sampling and supplies the reference voltage Vref supplied to the reference voltage line RL to the second node n2 which is the source terminal of the driving transistor Tdr Supply.

To this end, the sensing transistor Tss includes a gate terminal connected to the adjacent sensing line SL, a source terminal connected to the adjacent reference voltage line RL and a drain terminal connected to the second node n1.

The storage capacitor Cst includes first and second terminals connected between the gate terminal and the source terminal of the driving transistor Tdr, that is, between the first and second nodes n1 and n2.

More specifically, the first terminal of the storage capacitor Cst is connected to the first node n1, and the second terminal of the storage capacitor Cst is connected to the second node n2. The storage capacitor Cst charges the difference voltage between the voltages supplied to the first and second nodes n1 and n2 in accordance with the switching of the scan and sensing transistors Tsc and Tss during sampling.

Thereafter, when the holding and emulation of the pixel driving circuit PDC is started, the driving transistor Tdr is switched in accordance with the voltage charged in the storage capacitor Cst.

When the holding and emulation of the pixel driving circuit PDC starts, the scan transistor Tsc and the sensing transistor Tss are turned on and off by the first scan pulse SP1 and the second scan pulse SP2, respectively. do.

 The driving transistor Tdr controls the amount of current flowing from the high potential driving voltage line HPL to the organic light emitting diode OLED by being turned on by the voltage of the storage capacitor Cst.

To this end, the driving transistor Tdr includes a gate terminal connected to the first node n1, a source terminal connected to the second node n2, and a drain terminal connected to the high potential driving voltage line HPL.

The organic light emitting diode OLED emits monochromatic light having a luminance corresponding to the driving current Ioled by the driving current Ioled supplied from the driving transistor Tdr.

To this end, the organic light emitting diode OLED includes a first terminal (for example, an anode terminal) connected to the second node n2, that is, a source terminal of the driving transistor Tdr, an organic layer And a second terminal (e.g., a cathode terminal) connected to the organic layer.

At this time, the organic layer may be formed of a hole transporting layer / an organic light emitting layer / an electron transporting layer, or a hole injecting layer / a hole transporting layer / an organic light emitting layer / an electron transporting layer / an electron injecting layer.

Further, the organic layer may further include a functional layer for improving the luminous efficiency and / or lifetime of the organic light emitting layer. The second terminal may be further formed on the organic layer so as to be a low potential driving voltage line LPL formed on the organic layer or to be connected to the low potential driving voltage line LPL.

1, when the organic light emitting diode OLED emits light by the driving current Ioled, the voltage of the first terminal rises and finally the voltage of the first terminal rises due to the rise of the voltage of the first terminal. As a result, The voltage charged in the storage capacitor Cst is partially lost.

Also, in the other pixels connected to the same gate line GL, the scan transistor is finely turned on due to the voltage rise of one terminal, so that the voltage charged in the storage capacitor is partially lost.

That is, the voltage charged in the storage capacitor of the pixels connected to the same gate line GL is partially lost as soon as the pixel driving circuit PDC completes sampling and performs holding and emission. As a result, a luminance lowering phenomenon occurs in which the luminance of a pixel connected to the same gate line GL decreases.

Referring again to FIG. 2, the gate driver 200 is connected to one and / or the other of each of the first through the g gate lines GL1 through GLg. The gate driver 200 generates a first scan pulse SP1 sequentially shifted based on the gate control signal GCS and sequentially supplies the first scan pulse SP1 to the first to the g gate lines GL1 to GLg.

The gate driver 200 is connected to one side and / or the other side of each of the first to the gth sensing lines SL1 to SLg. The gate driver 200 generates a second scan pulse SP2 sequentially shifted based on the gate control signal GCS and sequentially supplies the second scan pulse SP2 to the first to the gth sensing lines SL1 to SLg.

Accordingly, the gate driver 200 generates the first and second scan pulses SP1 and SP2 based on the gate control signal GCS to control the switching of the scan and sensing transistors Tsc and Tss, respectively.

The gate driver 200 may be formed directly on the panel 100 together with the thin film transistor forming process of each pixel 110 or may be formed in the form of an integrated circuit so that the gate line GL and the sensing line SL And / or the other side thereof.

Meanwhile, the data driver 300 is connected to the first to the d-th data lines DL1 to DLd and the first to the d-th reference voltage lines RL1 to RLd, respectively.

The data driver 300 converts the received digital data DATA into a data voltage Vdata according to a data control signal DCS supplied from the panel controller 400 and supplies the data voltage to the corresponding data lines DL1 to DLd.

To this end, the data driver 300 may convert the digital data DATA received from the panel controller 400 into a data voltage Vdata using a digital-to-analog converter.

The data driver 300 also supplies the reference voltage Vref to the first to the d / 4 reference voltage lines RL1 to RL (d / 4), respectively.

The panel control unit 400 generates a gate control signal GCS and a data control signal DCS to control the pixels P included in the panel 100 and the panel 100 and supplies them to the gate driver 200 and the data To the driver (300).

At this time, the panel controller 400 receives the timing synchronization signal TSS and generates a gate control signal GCS and a data control signal DCS.

The panel control unit 400 converts the image data Ri, Gi and Bi into digital data DATA and assigns the converted digital data DATA to each pixel 110. [

The panel control unit 400 controls the average value of the digital data DATA allocated to the first pixel P connected to the common gate line GL among the pixels 110 included in the display panel 1000 and the average value of the first pixel P, (P) assigned to the second pixel (P) by using the luminance correction coefficient determined based on the difference between the digital data (DATA) assigned to the second pixel (P) The data (DATA) can be corrected.

At this time, the panel controller 400 may be a brightness correction module 10 according to an embodiment of the present invention.

The configuration and role of the panel control unit 400 will be described in detail in place of the brightness correction module 10. [

4 is a view schematically showing a configuration of a luminance correction module 10 according to an embodiment of the present invention.

4, a luminance correction luminance correction module 10 according to an exemplary embodiment of the present invention includes an allocation unit 11, a calculation unit 12, a measurement unit 13, a determination unit 14, 15).

The assigning unit 11 assigns digital data to each of the pixels 110 included in the panel 100. At this time, the digital data may be a digital value converted from the image data.

When the assigning unit 11 assigns digital data to the pixel 110, the assigned digital data is input to the data driver 300 described above and converted into a data voltage.

The driving transistor Tdr of the pixel 110 receives the converted data voltage and supplies the driving current Iolde to the organic light emitting diode OLED to drive the organic light emitting diode OLED.

Since the size of the digital data allocated to the pixel 110 by the allocating unit 11 is proportional to the data voltage and the driving current Iolde, when the digital data having a large size is allocated to the pixel 110, Iolde) flows.

When a large driving current Ioled flows through the pixel 110, the voltage lost from the gate-source terminal of the driving transistor Tdr becomes large as described with reference to FIG. 1, .

On the other hand, if the size of the digital data allocated to the pixel 110 by the assigning unit 11 is small, the amount of the voltage lost from the gate-source terminal of the driving transistor Tdr is small, .

The calculating unit 12 calculates the average value of the digital data allocated to the first pixel connected to the same gate line GL among the pixels 110 included in the panel 100. [

Thereafter, the calculating unit 12 calculates a difference value between the digital data assigned to any one of the second pixels for correcting the luminance among the first pixels and the above-described average value.

The calculating unit 12 may calculate the difference value between the average value of the digital data allocated to the first pixel and the digital data allocated to the second pixel using Equation 1 below.

&Quot; (1) "

ΔD = D_R - D_H

Here, D is the difference between the average value of the digital data assigned to the first pixel and the digital data assigned to the second pixel, D_R is the digital data assigned to the second pixel, D_H is the digital data assigned to the first pixel . ≪ / RTI >

In this way, the calculating unit 12 can accurately calculate the reference data in correcting the luminance by calculating the average value of the digital data allocated from the first pixels connected to the same gate line GL.

The assigning unit 11 controls the panel 100 in the maximum luminance mode and the minimum luminance mode by changing the digital data allocated to the pixel 110 to determine the luminance correction coefficient.

More specifically, the assigning unit 11 drives the panel 100 in a maximum luminance mode in which the maximum digital data is allocated to all the pixels 110 included in the panel 100. Here, the maximum digital data may be white data and may be, for example, a digital value "1023 ".

The allocating unit 11 drives the panel 100 in the minimum luminance mode in which the minimum digital data is allocated to all the pixels 110 included in the panel 100 excluding the second pixel. Here, the minimum digital data may be black data and may be, for example, a digital value "0"

The measuring unit 13 measures the maximum luminance of the second pixel when the allocating unit 11 drives the panel 100 in the maximum luminance mode and when the determining unit 11 drives the panel 100 in the minimum luminance mode The minimum luminance of the second pixel is measured.

That is, when all the pixels 110 of the panel 100 operate at the maximum luminance, the measuring unit 13 measures the luminance of the second pixel at the maximum luminance, and all the pixels 110 of the panel 100 except for the second pixel 110 ) Operates at the minimum luminance, the luminance of the second pixel is measured as the minimum pixel.

The assigning unit 11 changes and assigns the digital data assigned to the second pixel so that the minimum pixel of the second pixel measured by the measuring unit 13 is equal to the maximum brightness.

The determination unit 14 can determine the luminance correction coefficient based on the digital data and the maximum digital data allocated to the second pixel when the minimum pixel of the second pixel is equal to the maximum luminance.

The determination unit 14 can determine the luminance correction coefficient using the following equation (2).

&Quot; (2) "

f = (Lmax - L2) / Lmax

Here, f is the luminance correction coefficient, Lmax is the maximum digital data, and L2 is the digital data allocated to the second pixel when the minimum pixel of the second pixel is equal to the maximum luminance.

Accordingly, in determining the luminance correction coefficient used to correct the luminance, the present invention obtains experimental data according to different panel characteristics for each panel 100 to determine the luminance correction coefficient, Can be corrected.

The correcting unit 15 corrects the digital data assigned to the second pixel by using the difference between the average value of the digital data assigned to the first pixel and the digital data assigned to the second pixel, and the luminance correction coefficient.

More specifically, the correction unit 15 corrects the digital data assigned to the second pixel in proportion to the difference value. For example, when the digital data allocated to the second pixel is smaller than the average value, the digital data allocated to the second pixel is increased and corrected. Conversely, when the digital data assigned to the second pixel is larger than the average value, the digital data allocated to the second pixel is reduced and corrected. Further, when the digital data assigned to the second pixel is equal to the average value, the digital data assigned to the second pixel is not corrected.

At this time, the magnitude of the value by which the correction unit 15 increases or decreases the digital data allocated to the second pixel is proportional to the difference value.

The correction unit 15 may correct the digital data assigned to the second pixel using Equation (3) below.

&Quot; (3) "

D_T = D_R - F *? D

Here, D_T is digital data assigned to the second pixel after correction, D_R is digital data assigned to the second pixel before correction, F is a luminance correction coefficient, and D is an average value of digital data assigned to the first pixel And the difference value between the digital data allocated to the second pixel.

Accordingly, the correction unit 15 according to an exemplary embodiment of the present invention adjusts the digital data allocated to the second pixel so that the difference between the average values of the digital data allocated to the first pixel is reduced Can be corrected.

Thus, according to the present invention, the luminance difference between the luminance of the second pixel and the luminance of the first pixel is reduced, and the luminance difference between the pixels connected to the same gate line GL is also reduced.

The digital data assigned to the second pixel after correction from the correction unit 15 is input to the data driver 300 and converted into a data voltage which is an analog value. The converted data voltage is input to the pixel 110 to drive the organic light emitting diode Ioled.

On the other hand, the luminance correction module 10 according to the present invention performs luminance correction on the second pixels after completing the luminance correction of the second pixel and not performing luminance correction among the first pixels, It is possible to complete the luminance correction.

Thereafter, the brightness correction module 10 can complete the brightness correction on all the plurality of gate lines GL by performing the brightness correction in turn on the plurality of gate lines GL included in the panel 100 as well.

5 is a flowchart illustrating a luminance correction method according to an embodiment of the present invention.

Referring to FIG. 5, a luminance correction method according to an exemplary embodiment of the present invention first measures luminance from a second pixel among a plurality of first pixels connected to the same gate line (S501).

At this time, in step S501, the maximum digital data is allocated to all the pixels included in the panel, and the maximum luminance of the second pixel is measured. Then, minimum digital data is allocated to pixels except for the second pixel among all the pixels included in the panel, and the minimum luminance of the second pixel is measured.

Then, a luminance correction coefficient is determined based on the measured luminance (S502).

More specifically, in step S502, the digital data allocated to the second pixel is changed so that the minimum luminance is equal to the maximum luminance. Then, when the minimum luminance is equal to the maximum luminance, the luminance correction coefficient is determined based on the digital data and the maximum digital data allocated to the second pixel.

In step S502, the luminance correction coefficient may be determined using Equation (4) below.

&Quot; (4) "

f = (Lmax - L2) / Lmax

Here, f is the luminance correction coefficient, Lmax is the maximum digital data, and L2 is the digital data allocated to the second pixel when the minimum pixel of the second pixel is equal to the maximum luminance.

Next, an average value of the digital data allocated to each of the first pixels is calculated, and a difference between the calculated average value and the digital data allocated to the second pixel is calculated (S503).

Finally, the digital data allocated to the second pixel is corrected using the luminance correction coefficient determined in step S502 and the difference calculated in step S503 (step S504).

In this case, in step S504, the digital data allocated to the second pixel is increased or decreased in proportion to the difference value.

In step S504, the digital data allocated to the second pixel can be corrected using the following equation (5).

Equation (5)

D_T = D_R - F *? D

Here, D_T is digital data assigned to the second pixel after correction, D_R is digital data assigned to the second pixel before correction, F is a luminance correction coefficient, and D is an average value of digital data assigned to the first pixel And the difference value between the digital data allocated to the second pixel.

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, But the present invention is not limited thereto.

Claims (13)

A calculation unit for calculating a difference value between an average value of the digital data allocated to each of the plurality of first pixels and the digital data assigned to any one of the plurality of first pixels;
A determination unit that determines a luminance correction coefficient based on the luminance of the second pixel; And
And a correction unit for correcting the digital data allocated to the second pixel using the difference value and the luminance correction coefficient
Including a luminance correction module.
The method according to claim 1,
The calculating unit
And calculates an average value of the digital data of the plurality of first pixels connected to the same gate line.
The method according to claim 1,
The digital data is allocated using the maximum luminance mode for allocating the maximum digital data to all the pixels included in the panel and the minimum luminance mode for allocating the minimum digital data to the pixels except for the second pixel among all the pixels included in the panel Further comprising:
The assigning unit
And changes the digital data assigned to the second pixel so that the minimum brightness of the second pixel in the minimum brightness mode is equal to the maximum brightness of the second pixel in the maximum brightness mode.
The method of claim 3,
The determination unit
And determines the luminance correction coefficient based on the digital data allocated to the second pixel and the maximum digital data when the minimum luminance is equal to the maximum luminance.
The method according to claim 1,
The correction unit
And corrects the digital data allocated to the second pixel in proportion to the difference value.
Determining a luminance correction coefficient based on the luminance of any one of the plurality of first pixels;
Calculating a difference value between the average value of the digital data allocated to each of the plurality of first pixels and the digital data assigned to the second pixel; And
And correcting the digital data allocated to the second pixel using the difference value and the luminance correction coefficient
/ RTI >
The method according to claim 6,
The step of determining the luminance correction coefficient
Allocating maximum digital data to all pixels included in the panel and measuring a maximum luminance of the second pixel;
Allocating minimum digital data to pixels excluding the second pixel among all the pixels included in the panel, and measuring a minimum luminance of the second pixel;
Changing digital data assigned to the second pixel such that the minimum luminance is equal to the maximum luminance; And
Determining the luminance correction coefficient based on the digital data allocated to the second pixel and the maximum digital data when the minimum luminance is equal to the maximum luminance,
/ RTI >

The method according to claim 6,
The step of calculating the difference value
And calculating an average value of the digital data of the plurality of first pixels connected to the same gate line.
The method according to claim 6,
The step of correcting the digital data
And correcting the digital data assigned to the second pixel in proportion to the difference value.
A panel including a plurality of pixels arranged at intersections of a plurality of data lines and a plurality of gate lines;
The luminance correction coefficient is determined on the basis of the luminance of any one of the plurality of first pixels connected to the same gate line and the average value of the digital data allocated to each of the plurality of first pixels is assigned to the second pixel A panel controller for correcting the digital data assigned to the second pixel by using a difference value between the digital data and the luminance correction coefficient; And
A data driver for converting the corrected digital data into a data voltage and applying the data voltage to the second pixel
/ RTI >
11. The method of claim 10,
The panel control unit
Wherein the maximum brightness mode for allocating the maximum digital data to all the pixels included in the panel and the minimum brightness mode for allocating the minimum digital data to pixels excluding the second pixel among all the pixels included in the panel And changes the digital data assigned to the second pixel so that the minimum brightness of the second pixel in the minimum brightness mode is equal to the maximum brightness of the second pixel in the maximum brightness mode.
12. The method of claim 11,
The panel control unit
And determines the luminance correction coefficient based on the digital data allocated to the second pixel and the maximum digital data when the minimum luminance is equal to the maximum luminance.
11. The method of claim 10,
The panel control unit
And corrects the digital data assigned to the second pixel in proportion to the difference value.

Images