KR20170113011A - Apparatus and method of using a slice update map - Google Patents

Abstract

An electronic device according to the technical idea of the present disclosure includes a processor for generating a slice update map indicating the location of at least one update slice with a data change in frame data comprising a plurality of slices; And a display controller for extracting frame data of the at least one update slice from the memory in which the frame data is stored based on the slice update map and transmitting the frame data to the display driver.

Description

[0001] APPARATUS AND METHOD FOR USING SLICE UPDATE MAP [0002]

Technical aspects of the present disclosure relate to an electronic device, an electronic device control method, a display driving device, and a display driving method.

The display driver for driving the display panel receives the display data from the external device or another processor, and displays the display data on the display panel. The display driver updates the display image of the display panel by receiving the updated display data whenever the image displayed on the display panel is changed. For example, the display driver may update the image of the display panel at a predetermined frame rate. However, when the display data is transferred to the display driver for updating the display data, there is a problem of power consumption, which increases power consumption of the electronic device. Furthermore, recently, electronic devices and display panels supporting high resolution such as ultra high definition (UHD) have become widespread, and power consumption due to updating of display data gradually increases.

The disclosed embodiments are intended to reduce the capacity of the data stream for updating the display data, thereby reducing power consumption.

An electronic device according to the technical idea of the present disclosure includes a processor for generating a slice update map indicating the location of at least one update slice with a data change in frame data comprising a plurality of slices; And a display controller for extracting frame data of the at least one update slice from the memory in which the frame data is stored based on the slice update map and transmitting the frame data to the display driver.

According to a technical idea of the present disclosure, an electronic device control method includes: generating a slice update map indicating a position of at least one update slice with a data change in frame data including a plurality of slices; And extracting frame data of the at least one update slice from a memory in which the frame data is stored, based on the slice update map, and transmitting the frame data to the display driver.

The display driving apparatus according to the technical idea of the present disclosure is characterized in that, for at least one sub-block with a data change, the position of the start point of the updated sub-block, the position of the end point of the updated sub- A receiving unit receiving the serial transmission signal including the serial transmission signal; A frame memory for storing display data and updating the stored display data using display data for the received at least one sub-block; And a processor for outputting the display data to a display panel.

The display driving method according to the technical idea of the present disclosure is characterized in that, for at least one sub-block with a data change, the position of the start point of the updated sub-block, the position of the end point of the updated sub- The method comprising: receiving a serial transmission signal; Updating the display data stored in the frame memory using display data for the received at least one sub-block; And outputting the display data to a display panel.

According to the disclosed embodiments, it is possible to reduce the capacity of the data stream for updating the display data, thereby reducing power consumption.

1 is a block diagram showing the structure of an electronic device 100a according to an embodiment.
2 is a diagram illustrating frame data according to an embodiment.
3 is a diagram illustrating an electronic device 100b, a display driver 310a, and a display panel 320 according to an embodiment.
4 is a diagram illustrating a display controller 120a and a DRAM 338 according to one embodiment.
5 is a diagram showing a sequence in which the DMA 402 reads frame data from the DRAM 338 according to an embodiment.
FIG. 6 is a diagram illustrating a data stream transferred from the electronic device 100b to the display controller 310a according to one embodiment.
7 is a diagram for explaining an operation of fetching an update slice in the display controller 120 according to an embodiment.
8A and 8B are views showing information on sub-blocks.
9 is a diagram illustrating a structure of a data stream transmitted from a display controller 120 to a display driver according to an exemplary embodiment of the present invention.
10A and 10B are views for explaining a method for preventing a tearing phenomenon according to an embodiment.
11A and 11B are views for explaining a method of preventing a tearing phenomenon according to an embodiment.
12A and 12B are diagrams illustrating a method of defining sub-blocks according to an embodiment.
13A and 13B are views for explaining a method of setting a slice according to an embodiment.
FIG. 14 is a diagram illustrating a GUI screen according to an embodiment.
15 is a flowchart illustrating an electronic device control method according to an embodiment.
16 is a block diagram showing a structure of a display driving apparatus 310b according to an embodiment.
17 is a flowchart illustrating a display driving method according to an embodiment.

Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

1 is a block diagram showing the structure of an electronic device 100a according to an embodiment.

The electronic device 100a according to one embodiment includes a processor 110 and a display controller 120. [

The electronic device 100a is an apparatus having at least one processor, which may be a device having a display panel or a device connected to a display device. The electronic device 100a may be implemented in various forms, for example, a laptop computer, a smart phone, a wearable device, a tablet computer, a portable terminal, a desktop, and the like.

The processor 110 controls the overall operation of the electronic device 100a. The processor 110 transmits control signals to the respective components of the electronic device 100a to control the respective components of the electronic device 100a. In addition, the processor 110 may execute an operating system (OS), applications, and the like to perform and control various functions of the electronic device 100a.

The processor 110 may be implemented in various forms or named processors such as a central processing unit (CPU), a host CPU, a microprocessor, an application processor (AP), or a combination thereof. The processor 110 may also be implemented as a combination of one or more processors.

The processor 110 according to the present embodiment generates frame data and generates a slice update map indicating the position of the update slice with the data change in the frame data. The update slice means a slice in which data changes even at a single pixel as the frame changes. The frame data may be generated at a predetermined frame rate, or generated when a screen change occurs, according to the embodiment. The frame data according to an embodiment includes a plurality of slices, and the slice update map indicates the position of at least one update slice with a data change when compared to the previous frame data. The plurality of slices can be defined by dividing the image frame area into squares of the same size.

The slice update map may have a form in which, for example, the positions of update slices are sequentially arranged. For example, the slice update map may have a bit stream such as '1101, 1101, 1101, 0101, 0101, 0101 ...'. For UHD (3840 * 2160), a maximum of 560 bits may be required for the slice update map.

The display controller 120 generates display data and outputs display data to a display driver for controlling the display panel.

The display controller 120 according to the disclosed embodiments receives the slice update map from the processor 110 and extracts the frame data of the update slice from the memory based on the slice update map. That is, the display controller 120 does not fetch the frame data of all the pixels from the memory for one frame, but fetches only the frame data of the update slice. According to the present embodiment, the display controller 120 extracts only the frame data of the update slice from the memory, thereby reducing the capacity of the data stream between the memory and the display controller 120a, thereby reducing power consumption. According to one embodiment, the display controller 120 may also fetch frame data around the update slice from the memory for image processing.

According to one embodiment, the display controller 120a fetches the frame data from the memory on a slice basis. That is, the display controller 120a can operate in such a manner that frame data of one update slice is fetched from the memory and processed, and the frame data of the next update slice is processed. The display controller 120a may perform processing on the update slice until the processing for the update slice is finished for all of the frames.

Also, the display controller 120a transmits the frame data of the update slice to the display driver. According to one embodiment, the display controller 120a performs predetermined image processing on the update slice, compresses data according to a predetermined compression format, and transmits the display data to the display controller 120a. Also, the display controller 120a may transmit the information about the update slice to the display driver. For example, the display controller 120a may send information about the width, height, and size of the update slice to the display controller 120a along with the update display data.

2 is a diagram illustrating frame data according to an embodiment.

According to one embodiment, the frame data may be divided into a plurality of slices of the same size as shown in Fig. Each slice may have a predetermined width (W) and a height (H). For example, frame data having a resolution of 1440 * 2560 can be divided into slices having a resolution of 360 * 160. In this case, the width (W) of the slice is defined as 360, and the height (H) is defined as 160.

According to one embodiment, the display controller 120a may divide the update slices into sub-blocks and transmit the display data to the display driver in units of sub-blocks. For example, if only a portion of the slice's data has changed as the frame changes, as shown in FIG. 2, the display controller 120a will display the update slices as a sub-frame containing slices 0, 1, 4, 5, 8, Block 2 (SUBBLOCK 2) including slices 13, 17, 21 and 25, slices 3, 7, 11, 15, 19, 23, 27, 31, 35 and 39 And a sub-block 4 (SUBBLOCK 4) including slices 48, 49, 50, 52, 53, 54, 56, 57 and 58. The sub- Each sub-block may be defined to have a rectangular shape.

When the display controller 120a transmits display data on a sub-block basis, the display controller 120a transmits information on sub-blocks together with display data to the display driver. According to one embodiment, the information on the sub-block may be the position of the start point of the sub-block and the position of the end point. According to another embodiment, the information on the sub-block may be the position of the width, height, and starting point of the sub-block. The position of the starting point and the position of the end point can be represented, for example, by the coordinates of the pixel.

According to one embodiment, the display controller 120a can serially transmit information on subblocks and display data on a subblock-by-subblock basis. For example, the display controller 120a may transmit the information about the sub-blocks and the display data to the display driver in accordance with the MIPI (Mobile Industry Processor Interface) alliance. In addition, the display controller 120a may compress the display data for each sub-block according to a DSC (Display Stream compression) standard and transmit the compressed data to the display driver.

According to one embodiment, the data of each sub-block may be arranged and compressed and transmitted in a raster scan manner. Further, according to an embodiment, data of each sub-block may be arranged and compressed in units of slices.

According to another embodiment, the display controller 120a can transmit display data on a slice basis. The display controller 120a may send information and display data for the update slice to the display controller 120a, on a slice basis, for at least one update slice. According to one embodiment, the information about the update slice may be slice width, slice height, and slice update map.

The display controller 120 may deliver the display data in a raster scan order within the frame. The display controller 120 may also transmit the display data to the display driver in a sub-block order or a slice order so as to support a plurality of partial windows in the DSC encoded stream and conform to a MIPI display command set (DCS) standard. However, the format of the data stream transmitted from the display controller 120 to the display driver is not limited to DSC compression, and various types of compression formats may be used when compressing data on a subblock or slice basis.

3 is a diagram illustrating an electronic device 100b, a display driver 310a, and a display panel 320 according to an embodiment.

According to one embodiment, the electronic device 100b generates display data and transmits the display data to the display driver 310a, and the display driver 310a transmits the display data to the display panel 320. [ The electronic device 100b, the display driver 310a, and the display panel 320 may be provided in one package or may be provided in separate packages.

The electronic device 100b includes a host CPU (HOST CPU) 110a, a camera 332, a codec 334, a graphics processing unit 336, a display controller 120a, and a dynamic random access memory (DRAM) . ≪ / RTI > Host CPU 110b may correspond to processor 110a of FIG.

The host CPU 110a controls the overall operation of the electronic device 100b. The host CPU 110a can execute various programs such as an operating system and an application to control various functions of the electronic device 100b. The electronic device 100b can execute and control various functions by executing the program codes stored in the storage medium. For example, the program code stored in the nonvolatile storage medium (not shown) can be loaded through the DRAM 338 to execute the program. According to one embodiment, the host CPU 110a may operate in a control mode for executing programs or functions, and a video mode for reproducing image contents including still images or moving images.

The host CPU 110a can perform the photographing function using the camera 332. [ Also, the host CPU 110a may decode and reproduce the image content file using the codec 334, or may encode the captured image to generate the image content file. As described above, the host CPU 110a can perform various functions by controlling various hardware units and software units provided in the electronic device 100a.

The host CPU 110b can generate a GUI (Graphic User Interface) screen and output the generated GUI screen through the display panel 320 while executing the program. In the control mode, the host CPU 110b outputs this GUI screen as frame data and stores it in the DRAM 338. [

In addition, the host CPU 110b can reproduce image contents using the GPU 336. [ The host CPU 110b or the GPU 336 generates a reproduction screen and stores it in the DRAM 338 as frame data.

The host CPU 110b generates a slice update map while generating frame data, and outputs the slice update map to the display controller 120a. Further, the host CPU outputs information on the width and height of the slice to the display controller 120a.

The display controller 120a extracts the updated frame data from the DRAM 338 using the slice update map. For example, when data of slices 1, 2, 4, and 5 among the frame data having slices 0 to 19 is changed, the display controller 120a sets the slice update map to 1, 2, 4, And the frame data corresponding to the fifth slice are fetched from the DRAM 338.

The disclosed embodiments significantly reduce the capacity of the data stream transmitted from the DRAM 338 to the display controller 120a compared to a configuration in which all of the entire frame data is fetched from the DRAM 338 every frame change, Can be reduced. Generally, in a GUI screen, necessary information is displayed in a predetermined template, and only a part of the screen is changed according to the operation of the program in many cases. Therefore, by using the configuration using the slice update map, power consumption occurring when updating the frame of the GUI screen can be remarkably reduced.

Also, according to the disclosed embodiments, there is no need for intervention of software running on the host CPU 110a during frame processing. When the frame starts, the hardware, i.e., the display controller 310a, can automatically calculate the next slice information until the frame ends and process the next slice.

The display driver 310a receives display data from the electronic device 100b, stores and decodes the display data, and outputs the display data to the display panel 320. [ The display driver 310a may be implemented in the form of a DDI (Device Driver Interface), for example.

The display driver 310a according to one embodiment includes a DPHY 312, a graphic RAM 316, and a DSC decoder 314.

The DPHY 312 receives display data from the electronic device 100b. The display controller 120a of the electronic device 100b compresses the information on the update subblock or the update slice and the display data according to the MIPI Mobile Industry Processor Interface Display Command Set (DCS) 312). The DPHY 312 receives the data stream according to the MIPI DCS and stores it in the GRAM 316. The GRAM 316 stores display data on a frame-by-frame basis. The GRAM 316 may store the display data in a compressed form in the DSC format. The DSC decoder 314 reads the display data from the GRAM 316 at a predetermined timing, decodes the display data compressed in the DSC format, and transmits the decoded display data to the display panel 320.

The display panel 320 displays the display data output from the display driver 310a. The display panel 320 may be updated in a raster scan manner. The display panel 320 may be implemented in the form of, for example, a liquid crystal display panel, an organic light emitting diode (OLED) panel, or an electrophoretic display panel.

4 is a diagram illustrating a display controller 120a and a DRAM 338 according to one embodiment.

The display controller 120a according to one embodiment includes a direct memory access (DMA) 402, a pixel processing unit 404, a blending unit 406, a DSC encoder 408, a Display Serial Interface Master (DSIM) DPHY < / RTI >

The DMA 402 receives the slice update map from the host CPU 110b and receives the frame data of the update slice from the DRAM 338 based on the slice update map. The DMA 402 may determine the access address and the number of transfer pixels for the DRAM 338 based on the update slice map.

5 is a diagram showing a sequence in which the DMA 402 reads frame data from the DRAM 338 according to an embodiment.

The DMA 402 may access the DRAM 338 to fetch the pixel data from the DRAM 338 on a slice basis, for example, as shown in FIG. 5, and to fetch the pixel data in a raster scan order for each slice . The DMA 402 transfers the frame data of the update slice to the pixel processing unit 404.

Referring again to FIG. 4, the pixel processing unit 404 performs color coordinate conversion processing, image enhancement processing, and the like on the frame data. For example, the pixel processing unit 404 may convert the frame data from YUU color coordinates to RGB color coordinates. In addition, the pixel processing unit 404 may perform image quality improvement processing by adjusting saturation, color, contrast, and the like of the frame data.

The blending unit 406 blends the frame data subjected to the color coordinate conversion processing and the image quality improvement processing in the pixel processing unit 404.

The DSC encoder 408 encodes the frame data output from the blending unit 406 according to the DSC standard. Although FIG. 4 discloses an embodiment in which the frame data is encoded according to the DSC standard, various encoding schemes in addition to the DSC standard can be used to encode the frame data.

According to one embodiment, the display controller 120a compresses the frame data of the slice updated in units of subblocks, and transmits the compressed frame data to the display driver 310a. To this end, the DSC encoder 408 may divide at least one update slice into subblock units and encode the updated frame data in units of subblocks according to the DSC standard.

According to another embodiment, the display controller 120a compresses the frame data of the slice updated on a slice basis, and transmits the compressed frame data to the display driver 310a. To this end, the DSC encoder 408 may encode the frame data updated in units of slices according to the DSC standard.

The DSIM 410 generates a data stream to be transmitted to the display driver 310a by using the frame data output from the DSC encoder 408. [ According to one embodiment, the DSIM 410 may generate a data stream in the form of a MIPI DCS. For example, the DSIM 410 may output information on subblocks or slices and display data to the DPHY 412 on a subblock or slice basis.

The DPHY 412 transmits information and display data on the subblock or slice received from the DSIM 410 to the display driver 310a. According to one embodiment, the DPHY 412 may serially transmit the MIPI DCS data stream to the display driver 310a.

A used hierarchical communication structure of serial communication (hereinafter also referred to as a protocol stack) may be composed of a plurality of layers including a physical layer as a lowest layer. Examples of such physical layers include, but are not limited to, M-PHY, UniPro (Unified Protocol), PCI Express, High Speed Universal Serial Bus, HyperTransport, RapidIO, InfiniBand, and Serial ATA ). In particular, M-PHY and UniPro have low power consumption features to support their use in mobile electronic devices, both of which are standardized in the Mobile Inudstry Processor Interface (MIPI) alliance. In addition, M-PHY (hereinafter, may be referred to as MIPI M-PHY) and UniPro are employed in a UFS (Universal Flash Storage) interface standardized by JEDEC.

FIG. 6 is a diagram illustrating a data stream transferred from the electronic device 100b to the display controller 310a according to one embodiment.

According to one embodiment, the display controller 120 delivers display data on a sub-block basis. The sub-blocks may be defined by various rules according to the embodiment. According to an exemplary embodiment, as in the 602 data stream of FIG. 6, the update slice is divided into a predetermined number of subblocks, and the pixel data of each subblock is transmitted to the display driver 310a in accordance with the raster scan order. According to another embodiment, the display controller 120 constructs subblocks with one slice as the first update slice (slice 1) as the 604 data stream, and the next update slice (slices 2, 3) You can group subblocks. According to another embodiment, the display controller 120 may bundle spatially adjacent update slices (slices 2, 3) into one sub-block, such as a 606 data stream.

According to another embodiment, the display controller 120 may transmit the display data to the display driver 310a on a slice basis, such as a 608 data stream. According to the present embodiment, the display controller 120 generates a data stream including information on the slice position and frame data of the slice for each slice unit, and sequentially transmits the data stream to the display driver 310a according to the slice order . When the display controller 130 generates the data stream, it can determine the order of the slices according to the order of the raster scans. In addition, the display driver 310a may transmit pixel data in accordance with the order of raster scanning for each slice. For example, when display data is transmitted from the display controller 120 to the display driver 310a, information on the position of the slice 1 is transmitted to the slice 1, pixel data is transmitted according to the raster scanning order, For slice 2, after transmitting information about the position of slice 2, pixel data may be transmitted in accordance with the raster scan order. The transmission of display data in slice units can be performed for all update slices.

7 is a diagram for explaining an operation of fetching an update slice in the display controller 120 according to an embodiment.

When the image quality improvement processing in the display controller 120 calculates local information (e.g., a luminance average value) of each partition and this information is used when the image quality improvement section of the display controller 120 processes the next frame, To support Windows updates, the image quality enhancement unit needs spatial location information and calculates a local average for the corresponding partition. If the partition of the picture quality improvement section can not be aligned with the slice boundary, the calculation of the picture quality improvement section requires a complicated arithmetic calculation. To support multiple partial updates, the DQE (Descriptor queue element) engine must process local average information without software intervention, and the algorithm needs to be changed to align the partition boundaries of the image quality enhancement with the slice boundary for the hardware configuration . According to one embodiment, when the display controller 120 fetches frame data from the DRAM 338, it fetches additional peripheral pixels along with the pixel data of the update slice for image quality enhancement processing. For example, when the slice 5 is an update slice, the display controller 120 fetches the pixel data corresponding to the partition 702 of the image quality improvement section including the slice 5 from the DRAM 338.

If the tap filter is used within the pixel processing section to change the resolution of the source image, the display controller 120 according to one embodiment, when fetching frame data from the DRAM 338, Lt; / RTI > along with the pixel data of < RTI ID = 0.0 > For example, to update slice 5, pixels in area 702 may be needed for the tap filtering process. In this case, based on the slice update map, the scale ratio, the scaler phase, the overlapping for tap filtering, and the boundary information of the current slice, the DMA of the display controller 120 determines the start address and the number of pixels required for the current slice And fetch pixel data from the DRAM according to the result.

8A and 8B are views showing information on sub-blocks.

According to one embodiment, the information on the sub-block includes the position of the start point of the sub-block and the position of the end point.

When transmitting video data via DSIM according to MIPI DCS, the following instruction set can be used. According to one embodiment, the DSIM records the column address of the start point of the subblock and the column address of the end point of the subblock in the CASET field of the MIPI DCS. For example, as shown in FIG. 8A, the column address SC [15: 0] of the start point of the sub-block and the column address EC [15: 0] of the end point can be recorded in the CASET area. In addition, the DSIM records the page address of the start point of the subblock and the page address of the end point of the subblock in the PASET area of the MIPI DCS. A page is a row that is orthogonal to a column. For example, as shown in FIG. 8B, the page address SP [15: 0] of the start point of the sub-block and the page address EP [15: 0] of the end point may be recorded in the PASET area.

9 is a diagram illustrating a structure of a data stream transmitted from a display controller 120 to a display driver according to an exemplary embodiment of the present invention.

According to one embodiment, the display controller 120 may generate a data stream in the MIPI DCS format as shown in FIG. MIPI DCS is one of the widely used methods for transmitting data streams in electronic devices and display devices. Therefore, the present embodiment is advantageous in compatibility with existing electronic devices and display devices.

The MIPI DCS format is a serial transmission scheme in which CASET, PASET, 2Ch, Image, 3Ch, and Image areas are sequentially arranged as shown in FIG. According to one embodiment, the display controller 120 may record information on subblocks or slices in the CASET and PASET areas, and display data corresponding to subblocks or slices in the image areas.

When the display data is transmitted in units of sub-blocks, the data stream according to the MIPI DCS format can be sequentially transmitted serially to sub-block units (SUBBLOCK A and SUBBLOCK B). When the display data is transmitted in slice units, the data streams according to the MIPI DCS format can be serially serially transmitted in slice units (SLICE N, SLICE M).

8A and 8B, when the display data is transmitted in units of subblocks, the column address of the start point of the subblock and the column address of the end point are recorded in the CASET area, and the column address of the end point of the subblock is recorded in the PASET area. The page address of the start point and the page address of the end point may be recorded. When the display data is transmitted in slice units, the column address of the start point of the slice and the column address of the end point are recorded in the CASET area, and the page address of the start point of the slice and the page address of the end point of the slice are recorded in the PASET area have.

In the 2Ch area and 3Ch area, a GRAM write command is recorded. In the 2Ch area, a write_memory_start command for recording the display data in the GRAM is recorded at the pixel position specified by the preceding CASET and PASET. In the 3Ch area, a write_memory_continue command is written to write the display data to the GRAM from the pixel position following the previous write_memory_start or write_memory_continue command. The DPHY of the display driving unit records the data of the Image area following the 2Ch area at the position specified by the CASET and PASET and stores the data of the Image area following the 3Ch area as the pixel following the area specified by the previous CASET and PASET Record from location. According to the present embodiment, a plurality of partial windows can be supported in a MIPI conforming manner.

However, the current DSIM has limitations in transmitting CASET, PASET, 2Ch, and 3Ch commands. The current DSIM can send these commands only after the DSIM frame is declared to be terminated. DSIM according to the present embodiment arranges CASET, PASET, and data in slice units, and when each slice data is transferred from DECON using a slice update map (SFR) and slice resolution information (PPS) Automatically forward through PHY.

According to one embodiment, a TE signal is inserted every time a frame is started, as shown in Fig. When the DDI processes the video data in raster scan order and the display controller 120 transmits the data in slice-based order, certain portions of the slice data may be transmitted later or earlier than expected time. The phenomenon in which data of other time frames are displayed in the same time frame is called a tearing problem. Since the display driver adopts a single buffer structure, a tearing phenomenon occurs when the data writing from the electronic device to the GRAM is slower or faster than the expected time.

10A and 10B are views for explaining a method for preventing a tearing phenomenon according to an embodiment.

10A and 10B are recording curves showing the operation of writing data to the GRAM in the display driver when the slice update map is not used, and A1, A2, and A3 are recording curves in units of subblocks or slices Is a recording curve indicating a data recording operation in the GRAM when the display data of the update slice is transmitted in units of R, and R is a display curve indicating an operation in which display data is displayed on the display panel. When the slice update map is not used, the display data for each pixel is recorded as the curve A according to the raster scan order, so that the tearing phenomenon does not occur. In the case of using the slice update map, however, due to the arrangement of the update slice, the display data at the corresponding position may not be updated until the display data is displayed on the display panel as shown in Fig. 10A (curve A3) . 10B, the display controller 120 inserts a TE signal at the beginning of each frame, advances the timing of the TE signal by the height of the slice, and transmits the slice data later than the expected time It is possible to prevent a tearing phenomenon. Referring to FIG. 10B, since the timing of the TE signal is advanced, the recording timing of the display data is advanced by the slice height as a whole, and the tearing phenomenon does not appear. The time length for advancing the timing of the TE signal can be variously determined according to the embodiment.

11A and 11B are views for explaining a method of preventing a tearing phenomenon according to an embodiment.

A4, A5, and A5-1 in Figs. 11A and 11B are recording curves representing data recording operations in the GRAM when the display data of the update slice is transmitted on a subblock-by-slice or slice-by-slice basis using the slice update map, And a display curve indicating an operation in which display data is displayed on the display panel. A4 is a recording curve of the n-th frame, A5 and A5-1 are recording curves of the (n + 1) th frame, and R is the display curve of the n-th frame.

If the display data is written to the GRAM sooner than the expected time, and the recording curve exceeds the display curve, a tearing phenomenon appears. For example, as shown in FIG. 11A, a tearing phenomenon occurs when the A5 curve, which is the recording curve of the (n + 1) th frame, exceeds the display curve of the nth frame. For example, the TE signal timing is advanced and the tearing phenomenon may occur even when a partial window having a slice at the lowest stage is transmitted. In this case, the partial window data of the next frame may be written to the GRAM before the display of the current frame is ended. In order to prevent this kind of tearing, the DSC decoder 314 of the display driver 310a can control the output time so as not to transmit the slice earlier than the expected time. For example, as shown in FIG. 11B, the display controller 120 includes a timer, checks the timing, and holds the transmission of the display data when the display data is output to the display driver ahead of the expected time, When the expected time comes, the display driver can output the display data.

12A and 12B are diagrams illustrating a method of defining sub-blocks according to an embodiment.

According to an exemplary embodiment, the display controller 120 may define a sub-block such that the sub-block has a long width as long as possible to prevent the tearing phenomenon. 12A and 12B. The update slice layout shown in FIGS. The display controller 120 includes a subblock 1210 of slices 0, 1, 4, 5, 8, 9, 12 and 13 and a subblock 1212 of slices 17, 21, 25, Can be set. As another example, the display controller 120 may include a sub-block 1220 of slices 0, 4, 8, and 12, and slices 1, 5, 9, 13, 17, 21, 25, and 29 Block 1222 can be set. However, when the display panel is updated by the raster scanning method, since the pixels arranged above the frame are updated first, even when the update slice is transmitted to the display driver, the tiling phenomenon can be prevented if the pixels arranged above are transferred first . The display controller 120 according to the embodiment may set the width of the sub-block as wide as possible so that the pixel to be accessed first is transmitted to the display driver first when the display panel is updated according to the raster scan method, .

13A and 13B are views for explaining a method of setting a slice according to an embodiment.

According to one embodiment, the processor 110 may align the DSC slice with the GPU update unit. In addition, the processor 110 may set the slice to reduce the number of update slices. 13A, when the update area (Tile 1310) with the data change is arranged in one slice, the display controller 120 processes only one piece of the display data of the slice and outputs it to the display driver . As another example, as shown in FIG. 13B, when the update area (Tile 1320) with the data change spans four slices, the size of the update area 1320 is similar to the update area 1310 shown in FIG. 13A The display data of the four update slices must be processed and transmitted from the display controller 120 to the data driver. According to one embodiment, the processor 110 may define a slice to reduce the number of update slices based on the location and area of the update area. For example, instead of defining a slice as shown in FIG. 13B, the processor 110 may define a slice as shown in FIG. 13A.

Also, according to one embodiment, when defining a slice in the processor 110, the slice size may be set small to reduce the capacity of the update slice. For example, slices can be set by minimizing the number of pixels in a slice to meet the standard definition of 15000 pixels per slice.

FIG. 14 is a diagram illustrating a GUI screen according to an embodiment.

14 shows a screen of an MMS (Multimedia Messaging Service) application. If a method of defining and updating one box including all the update areas is used, even when only the 1410 area and some other area 1420 are updated, when the user types a letter in the message window, The rectangular area 1430 including the area must be updated. This rectangular area 1430 may be set to be excessively larger than the area 1410 due to some other update area 1420. [ According to the present embodiment, by using a plurality of partial update schemes, data stream transmission processing can be separately performed for each of the partial update areas 1410 and 1420. With this configuration, this embodiment has the effect of reducing unnecessary data transfer to the unrecorded area and significantly reducing power consumption.

15 is a flowchart illustrating an electronic device control method according to an embodiment.

The electronic device control method according to the disclosed embodiments can be performed by various electronic devices including a processor and a memory. Although the present disclosure focuses on an embodiment of performing an electronic device control method in an electronic device according to the embodiment disclosed in Figs. 1 and 3, the embodiments of the present disclosure are not limited to such an embodiment. In addition, embodiments of the electronic device described with reference to Figs. 1 to 14 can be applied to electronic device control methods, and embodiments of the electronic device control method can be applied to embodiments for an electronic device.

First, the electronic device generates a slice update map indicating the position of at least one update slice having a data change in frame data including a plurality of slices (S1502). The electronic device may generate information about the height and width of each slice of the slice update map.

Next, the electronic device extracts frame data of at least one update slice from the memory where the frame data is stored, based on the slice update map (S1504). The electronic device determines the memory access address based on the update slice map and extracts the frame data corresponding to the update slice.

Next, the electronic device transmits the frame data of the extracted update slice to the display driver (S1506). According to one embodiment, the electronic device performs image processing on the extracted frame data, generates a data stream for serial transmission, and transmits the generated data stream to a display driver. The data stream transmitted to the display driver may be generated in the MIPI DCS format. The data stream may also be serially transmitted on a subblock or slice basis.

16 is a block diagram showing a structure of a display driving apparatus 310b according to an embodiment.

According to one embodiment, the display driver 310b may be integrated with the electronic device 100b. According to another embodiment, the display driving device 310b may be provided with a display panel in a display device provided separately from the electronic device. The display driver 310b is a unit also called a DDI, which provides display data to the display panel and drives the display panel. 16, the display driving apparatus 310b is described in connection with the electronic apparatus 100a shown in FIG. 1. However, the embodiment of the present disclosure is not limited thereto.

The display driving apparatus 310b according to an embodiment includes a receiving unit 1610, a processing unit 1620, and a frame memory 1630. [

Receiving unit 1610 receives a data stream for transmitting display data from electronic device 100a. According to one embodiment, the receiver 1610 receives a data stream serially transmitted on a subblock or slice basis.

According to one embodiment, the receiver 1610 receives the MIPI DCS data stream. The receiving unit 1610 may be a DPHY according to the MIPI alliance, for example, as shown in FIG. According to the present embodiment, the receiving unit 1610 can update the display data stored in the frame memory 1630 by executing a command written in the 2Ch and 3Ch areas according to the address defined in the CASET and PASET of the MIPI DCS data stream .

According to one embodiment, the receiving unit 1610 receives the display data of the updated subblock in units of subblocks, and receives information about the position of the starting point of the subblock and the position of the end point together with the display data . Also, the receiving unit 1610 accesses the address corresponding to the position of the sub-block in the frame memory 1630 using the information about the position of the start point and the position of the end point of the sub-block, and updates the display data .

The frame memory 1630 stores display data. According to one embodiment, the frame memory 1630 may store one frame of display data. Therefore, if the display data is written to the frame memory 1630 faster than the expected time or is later written, the tearing phenomenon may occur. The frame memory may be implemented in the form of a GRAM as in the embodiment described above with reference to FIG. According to one embodiment, the frame memory may store display data in encoded form in accordance with the DSC standard.

The processor 1620 controls the overall operation of the display driver 310b. According to one embodiment, the display driver 310b may decode the display data encoded according to the DSC standard and output the decoded display data to the display panel.

17 is a flowchart illustrating a display driving method according to an embodiment.

The display driving method according to the disclosed embodiments can be performed by various electronic devices including a processor and a memory. In this disclosure, the display driving method or the display driving method according to the embodiment disclosed in FIGS. 3 and 16 will be described. However, the embodiments of the present disclosure are not limited to these embodiments. In addition, the embodiments of the display driver and the display driver described with reference to Figs. 1 to 16 can be applied to the display driving methods, and the embodiments of the display driving method can be applied to the embodiments of the display driver or the display driver .

The display driving device receives, in units of subblocks, at least one subblock having a data change, the serial transmission signal including the position of the start point of the updated subblock, the position of the end point of the updated subblock, (S1702). As described above, the serial transmission signal can be transmitted serially in units of subblocks, and can be a MIPI DCS data stream.

Next, the display driver updates the display data stored in the frame memory using the display data of at least one sub-block received (S1704). The display driving apparatus can update the display data of the updated sub-block in the frame memory by using information on the position of the start point and the end point of the update sub-block.

Next, the display driving apparatus outputs the display data stored in the frame memory to the display panel (S1706). According to one embodiment, the display data is stored in the frame memory in a state encoded in accordance with the DSC standard, and the display driving apparatus can decode the display data at a predetermined timing and output the decoded display data to the display panel.

As described above, exemplary embodiments have been disclosed in the drawings and specification. Although the embodiments have been described herein with reference to specific terms, it should be understood that they have been used only for the purpose of describing the technical idea of the present disclosure and not for limiting the scope of the present disclosure as defined in the claims . Therefore, those skilled in the art will appreciate that various modifications and equivalent embodiments are possible without departing from the scope of the present invention. Accordingly, the true scope of protection of the present disclosure should be determined by the technical idea of the appended claims.

Claims (20)

A processor for generating a slice update map indicating the location of at least one update slice with a data change in frame data comprising a plurality of slices; And
And a display controller for extracting frame data of the at least one update slice from a memory in which the frame data is stored based on the slice update map and transmitting the extracted frame data to the display driver. The method according to claim 1,
Wherein the processor outputs information on the slice update map, slice width, and slice height to the display controller. The method according to claim 1,
Wherein the display controller performs at least one of processing of converting color coordinates, image quality improvement processing, and blending on frame data of the at least one update slice based on the slice update map. The method according to claim 1,
The display controller divides the at least one update slice into at least one sub-block, transmits information on the position of the sub-block and display data to the display driver in units of sub-blocks,
Wherein the at least one sub-block is defined to have a rectangular shape comprising update slices. 5. The method of claim 4,
Wherein the display controller serially transmits display data to the display driver in units of subblocks. 5. The method of claim 4,
The display controller transmits, to the display driver, a serial transmission signal including a position of a start point of a sub-block, a position of an end point of the sub-block, and display data in units of sub-blocks for the at least one sub-block Electronic device. The method according to claim 1,
Wherein the display controller transmits information on the slice width and height to the display driver and transmits information on the slice position and display data to the display driver on a slice basis. The method according to claim 1,
Wherein the display controller transmits a TE signal to the display driver notifying the start of a frame each time a frame is switched. 9. The method of claim 8,
Wherein the display controller transmits the TE signal to the display driver by advancing at least one slice height from the frame switching point. The method according to claim 1,
Wherein the display controller holds a transmission of display data when a transmission time of display data of the at least one update slice is faster than a predicted time. The method according to claim 1,
Wherein the display controller divides the at least one update slice into at least one sub-block, transmits the display data to the display driver in units of sub-blocks,
The display driver displays an image in a raster scan mode,
Wherein the sub-block is defined such that the transverse length is set as long as possible. The method according to claim 1,
Wherein the display driver includes a frame memory for storing display data on a frame-by-frame basis. The method according to claim 1,
Wherein the processor sets the plurality of slices to reduce the number of update slices based on the location of the data change in the frame data. The method according to claim 1,
Wherein the display controller transmits the display data to the display driver in units of slices or a sub-block including a plurality of slices in accordance with a Mobile Industry Processor Interface (MIPI) alliance method. Generating a slice update map indicating a location of at least one update slice with a data change in frame data comprising a plurality of slices; And
Extracting frame data of the at least one update slice from a memory in which the frame data is stored based on the slice update map, and transmitting the extracted frame data to the display driver. 16. The method of claim 15,
And outputting information on the slice update map, slice width, and slice height to the display controller. A receiving unit for receiving, in units of sub-blocks, at least one sub-block with a data change, the serial transmission signal including the position of the start point of the updated sub-block, the position of the end point of the updated sub-block, and display data;
A frame memory for storing display data and updating the stored display data using display data for the received at least one sub-block; And
And a processing unit for outputting the display data to a display panel. 18. The method of claim 17,
Wherein the serial transmission signal includes a TE signal inserted at frame switching and at least one update subblock unit,
Wherein each of said at least one update subblock unit comprises a position of a start point of an update subblock, a position of an end point of an update subblock, and display data. 18. The method of claim 17,
Wherein when the image scanning of the area corresponding to the sub-block received in the frame currently being scanned is not completed, the processing unit performs the image scanning in the frame memory until the image scanning of the area corresponding to the received sub- Blocks the update of the sub-blocks. Receiving a serial transmission signal including at least one sub-block with a data change in units of sub-blocks, the position of the start point of the updated sub-block, the position of the end point of the updated sub-block, and the display data;
Updating the display data stored in the frame memory using display data for the received at least one sub-block; And
And outputting the display data to a display panel.

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