KR20170108803A - Appratus and method for detecting audio jack - Google Patents

Abstract

According to an embodiment of the present disclosure, an audio jack detection circuit comprises: an impedance detector generating a detection signal corresponding to an impedance between a ground pin and a ground detection pin, provided to be in contact with a ground terminal of an audio jack socket; and a controller for determining a state of the audio jack socket based on the detection signal. The impedance detector can change a detection range of the impedance by changing a pull-up resistance value connected to the ground detection pin.

Description

[0001] APPARATUS AND METHOD FOR DETECTING AUDIO JACK [0002]

The technical idea of the present disclosure relates to an apparatus and method for detecting an audio jack, and more particularly, to an apparatus and method for detecting whether or not a foreign object other than an audio jack has been introduced into an audio jack socket.

An audio accessory such as an earphone, headphone, headset, speaker, microphone, etc. may include an audio jack, and an audio jack may be inserted into the electronic device having the audio jack socket to receive a signal from the audio device, . The electronic device can detect whether or not the audio jack is inserted into the audio jack socket and can operate differently depending on the detected result. For example, if the audio jack is not detected, the electronic device may block the audio signal transmitted through the audio jack socket or block the power supplied to the block that generates the audio signal. For example, in a portable electronic device such as a smartphone, there is a high possibility that a foreign object other than an audio jack is introduced into the audio jack socket. Accordingly, accurately detecting whether or not an audio jack is inserted into the audio jack socket can be important in that it not only reduces the power consumption of the electronic device but also prevents malfunction of the electronic device.

One aspect of the technical idea of the present disclosure relates to an apparatus and method for detecting an audio jack, which device includes an audio jack detection circuit and a method of operation thereof.

According to an aspect of the present invention, there is provided an audio jack detection circuit for detecting an audio jack having a different detection range according to a detection mode and having a ground terminal of an audio jack when inserting an audio jack into an audio jack socket, A first impedance detector for generating at least one ground detection signal corresponding to a first impedance between the ground pin and the ground detection pin provided to be in contact with the at least one ground detection pin, And a controller for generating one of the first to third output signals corresponding to an open state of the audio jack socket, an immersed state, and an inserted state of the audio jack, respectively.

An audio apparatus according to one aspect of the technical idea of the present disclosure includes an audio jack including a first signal pin exposed on an inner wall of an audio jack socket, a jack detection pin, a second signal pin, a ground pin, a ground detection pin, Socket, a first impedance between the ground pin and the ground detection pin in each of at least two detection modes having different detection ranges, and based on the detected first impedance, an output signal indicating whether the audio jack socket is submerged And an audio signal processing module for initiating or stopping communication with the audio jack socket in response to the output signal.

The audio jack detection circuit according to the technical idea of the present disclosure can accurately detect whether or not the audio jack is inserted into the audio jack socket of the audio apparatus so as to reduce power consumption of the audio apparatus and prevent malfunction of the audio apparatus .

Further, according to the audio jack detection circuit according to the technical idea of the present disclosure, by removing noise that may occur during detection of insertion of the audio jack, noise can be prevented from being transmitted to the audio accessory when the audio jack is detected .

In addition, according to the audio jack detection circuit according to the technical idea of the present disclosure, it is possible not only to reduce the power consumed in detecting the insertion of the audio jack, but also to detect whether or not the audio jack is inserted quickly.

1 shows a block diagram of an audio device according to an exemplary embodiment of the present disclosure;
Figures 2A-2C schematically illustrate possible states of the audio jack socket of Figure 1 in accordance with an exemplary embodiment of the present disclosure.
3 shows a block diagram of an audio jack detection circuit according to an exemplary embodiment of the present disclosure;
FIG. 4 shows a block diagram of an audio jack detection circuit according to an exemplary embodiment of the present disclosure, and FIG. 5 shows a state machine diagram corresponding to the operation of the controller of FIG.
FIG. 6 shows a block diagram of an audio jack detection circuit according to an exemplary embodiment of the present disclosure, and FIG. 7 shows a state machine diagram corresponding to the operation of the controller of FIG.
FIG. 8 shows a block diagram of an audio jack detection circuit according to an exemplary embodiment of the present disclosure, and FIG. 9 shows a state machine diagram corresponding to the operation of the controller of FIG.
10 shows a block diagram of an audio jack detection circuit according to an exemplary embodiment of the present disclosure, and Fig. 11 shows a state machine diagram corresponding to the operation of the controller of Fig.
FIG. 12 shows a block diagram of an audio jack detection circuit according to an exemplary embodiment of the present disclosure, and FIG. 13 shows a state machine diagram corresponding to the operation of the controller of FIG.
14A to 14C are graphs showing the operation of the audio jack detection circuit of FIG. 12 according to the state change scenarios of the audio jack socket.
15 and 16 are diagrams illustrating a block diagram of an audio jack detection circuit in accordance with exemplary embodiments of the present disclosure.
17 is a flow chart illustrating an audio jack detection method in accordance with an exemplary embodiment of the present disclosure;
18 shows a block diagram of a computing system as an audio device in accordance with an exemplary embodiment of the present disclosure.

Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. The embodiments of the disclosure are provided to more fully describe the present disclosure to those skilled in the art. The present disclosure is capable of various modifications and may take various forms, and specific embodiments are illustrated and described in the drawings. It is to be understood, however, that this disclosure is not intended to limit the invention to the particular forms disclosed, but includes all modifications, equivalents, and alternatives falling within the spirit and scope of the disclosure. Like reference numerals are used for similar elements in describing each drawing. In the accompanying drawings, the dimensions of the structures are shown enlarged or reduced from the actual size for the sake of clarity of the present disclosure.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the disclosure. The singular expressions include plural expressions unless the context clearly dictates otherwise. In this application, the terms "comprises", "having", and the like are used to specify that a feature, a number, a step, an operation, an element, a part or a combination thereof is described in the specification, But do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof.

Unless otherwise defined, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. Terms such as those defined in commonly used dictionaries are to be construed to have meanings consistent with the contextual meanings of the related art and are not to be construed as ideal or overly formal meanings as are expressly defined in the present application .

1 shows a block diagram of an audio device 10 in accordance with an exemplary embodiment of the present disclosure. The audio device 10 communicates with the audio jack socket 100 when inserted into the audio jack socket 100 into which the audio jack 20 of the audio accessory such as an earphone, headphone, headset, speaker, (SIG) to an audio accessory or an audio signal (SIG) from an audio accessory.

Referring to FIG. 1, the audio jack 20 may include four terminals M, G, R, and L. In FIG. An electrical signal converted from the sound of the audio accessory including the audio jack 20 through the microphone terminal M can be output. The ground potential of the audio apparatus 10 into which the audio jack 20 is inserted may be applied to the ground terminal G. [ The audio signal provided to the right output component (e.g., the right speaker) of the audio accessory can be received through the right signal terminal R and the audio signal provided to the left output terminal An audio signal provided to the component (for example, the left speaker) can be received. As such, an audio jack 20 comprising four terminals M, G, R, L comprising a microphone terminal M may be referred to as a four-pole audio jack. 1, the audio jack 20, which includes three terminals G, R, L except for the microphone terminal M, can be referred to as a three-pole audio jack And it will be appreciated that the exemplary embodiments of the present disclosure described below can be applied not only to a three-pole audio jack, but also to a five-pole audio jack that includes additional terminals. The arrangement of the terminals M, G, R and L of the earphone jack 20 shown in Fig. 1 is merely an example, and the terminals M, G, R and L are different from those shown in Fig. It is to be understood that the invention may be embodied.

Referring to FIG. 1, an audio device 10 may include an audio jack socket 100, an audio jack detection circuit 200, and an audio signal processing module 300. The audio device 10 may include, but is not limited to, a personal computer (PC), a tablet PC, a mobile phone, a smart phone, an e-reader, a PDA personal digital assistant (EDA), digital still camera, digital still camera, digital video camera, portable multimedia player (PMP), personal navigation device or portable navigation device (PND) A console (handheld game console) or the like.

1, an audio signal processing module 300 may generate an audio signal SIG by processing audio data and may be coupled to an audio jack socket 100, such as an earphone, headphone, headset, It is possible to transmit the audio signal SIG to the audio jack 20 of the audio accessory outputting the sound. The audio signal processing module 300 can also receive an audio signal SIG from an audio jack 20 of an audio accessory that is inserted into the audio jack socket 100 and converts the sound into an electrical signal, And may generate audio data by processing the received audio signal. For example, the audio data may be digital data that may be stored in a computer-readable storage device, or may be data compressed by a codec. Audio data may include but are not limited to wma, mp3, mpga, rbs, mpeg3, wav, ra, rm, ram, m4a, m4b, mp4, m4r, mp4a, flac, aac, au, mp2, aif, aiff, aifc , amr, awb, ogg, oga,? voc, wv, asf, mpc, ac3, mod, s3m, xm, it, 669, amf, ams, dbm, dmf, dsm, headlight, mdl, med, mtm, oct , ptm, stm, ult, umx, mt2, psm, spx, 3gp, 3gpp, 3ga, 3g2, ape, shn, vqf, tta, qcp, qcelp, dts, caf, gsm, , oma, adx, and the like.

Referring to FIG. 1, the audio jack detection circuit 200 may be connected to the audio jack socket 100, and may generate the output signal OUT and provide the output signal OUT to the audio signal processing module 200. The output signal OUT generated by the audio jack detection circuit 200 may indicate whether or not the audio jack 20 is inserted into the audio jack socket 100 and the audio signal processing module 200 may indicate whether the received output signal And can control communication with the audio jack socket 100 in response to the audio signal OUT. For example, when the output signal OUT indicates that the audio jack 20 is inserted, the audio signal processing module 2300 transmits the audio signal SIG to the audio jack socket 100, 100 to receive the audio signal SIG. On the other hand, when the output signal OUT indicates a state in which the audio jack 20 is not inserted (for example, an open state or a foreign matter inflow state), the audio signal processing module 300 transmits the audio signal to the audio jack socket 100 It is possible to interrupt the transmission of the audio signal SIG, disconnect the connection of the audio signal SIG with the moving line, or cut off the power supplied to the circuit which generates or processes the audio signal SIG.

According to an exemplary embodiment of the present disclosure, the audio jack detection circuit 200 is configured to detect the presence or absence of a contact between the audio jack 20 and the ground terminal G of the audio jack 20 upon insertion of the audio jack 20 among the plurality of pins of the audio jack socket 100 It is possible to detect the impedance between the ground pin 164 and the ground detection pin 162 provided so as to determine whether or not the audio jack 20 is inserted based on the detected impedance. Thus, instead of the other pins of the audio jack socket 100 (for example, the jack detection pin 122 shown in FIGS. 2A to 2C), the ground detection pin 162 is used to detect whether or not the audio jack is inserted It can be advantageous. For example, in spite of variations in the electrical signal applied to one of the two pins 162 and 164 for the detection of the impedance between the two pins 162 and 164, Noise can be removed. Accordingly, the range of the impedance between the both pins 162 and 164 that can be detected by the audio jack detection circuit 200 can be enlarged, and as a result, whether or not the audio jack 20 is inserted or the foreign object is correctly detected .

According to an exemplary embodiment of the present disclosure, the audio jack detection circuit 200 may adjust the detection range of the impedance by changing the resistance value of a pull-up resistor connected to the ground detection pin 162. [ 1, the pull-up resistor R_PU may be located at the ground detection pin 162 and the pull-up voltage V_PU, and the audio jack detection circuit 200 may be connected to the ground detection pin 162, The impedance between the pin 162 and the ground pin 164 can be detected. To determine whether the audio jack 20 is inserted, for example, the resistance value of the pull-up resistor R_PU may be about 1 M to about 10 M OMEGA. 2A-2C, the ground terminal G of the audio jack 20 substantially shorts both pins 162 and 164, while in the case of foreign objects such as water, K < / RTI > The detection range of the impedance between the two pins 162 and 164 can be adjusted by changing the resistance value of the pull-up resistor connected to the ground detection pin 162 in order to accurately determine whether or not the audio jack is inserted and the foreign object is introduced. 1, the pull-up resistor R_PU is shown outside the audio jack detection circuit 200, but may be included in the audio jack detection circuit 200 as described below.

Figures 2A-2C schematically illustrate possible states of the audio jack socket 100 of Figure 1 in accordance with an exemplary embodiment of the present disclosure. 2B shows a state in which the audio jack 20 is inserted into the audio jack socket 100, and FIG. 2C shows a state in which the audio jack 20 is inserted into the audio jack socket 100. FIG. Shows a state in which the foreign object 30 has been introduced into the audio jack socket 100. FIG. 1, the audio jack detection circuit 200 of the audio device 10 according to the exemplary embodiment of the present disclosure includes a ground detection pin 162 and a ground pin (not shown) of the audio jack socket 100, 164 to detect whether the audio jack 20 is inserted or not.

2A and 2C, the audio jack socket 100 is configured such that when the audio jack 20 is inserted into the audio jack socket 100, the audio jack socket 100 is brought into contact with the left signal terminal L of the audio jack 20 A right signal pin 142 provided to contact the right signal terminal R of the audio jack 20 and a ground terminal G of the audio jack 20, And a ground pin 164 and a microphone pin 182 provided to contact the microphone terminal M of the audio jack 20. The microphone pin 182 is connected to the ground pin 172, The pins 122, 124, 142, 162, 164 and 182 of the audio jack socket 100 may be exposed to the inner wall of the audio jack socket 100 and may be made of metal Conductive material.

Referring to FIGS. 2A to 2C, the audio jack detection circuit 200 may include an impedance detector 210 and a controller 220. The impedance detector 210 may be coupled to the ground detection pin 162 of the audio jack socket 162 and may provide the detection signal DET to the controller 220 and may receive the control signal CTRL from the controller 220. [ Lt; / RTI > The impedance detector 210 may have a different detection range according to the control signal CTRL and may be configured to detect the ground detection pin 162 and the ground pin 164 of the audio jack socket 162 , It is possible to generate the detection signal DET corresponding to the detected impedance.

The controller 220 can generate the control signal CTRL for setting the detection range of the impedance detector 210 and can determine the state of the audio jack based on the detection signal DET, It is possible to generate a corresponding output signal OUT. For example, the controller 220 can change the detection range of the impedance detector 210 to the second detection range by generating the control signal CTRL based on the detection signal DET generated in the first detection range, The state of the audio jack socket 100, for example, the open state, the inserted state of the audio jack, and the flooded state based on the detection signals DET generated by the impedance detector 210 in each of the first and second detection ranges It is possible to generate a corresponding output signal OUT. For example, the controller 220 may be a processor that executes a plurality of instructions, or may be a dedicated logic block, such as an application specific integrated circuit (ASIC). The audio signal processing module 200 of Figure 1 may receive the output signal OUT generated by the controller 220 of the audio jack detection circuit 300, It is possible to control the communication with the audio jack socket 100 based on the output OUT. Details of the impedance detector 210 and the controller 220 will be described later with reference to Fig.

2A, when nothing is inserted into the audio jack socket 100, that is, when the audio jack socket 100 is in the open state, the conductive path between the ground detection pin 162 and the ground pin 164 The resistance value R_O between the ground detection pin 162 and the ground pin 164 may be infinite. Referring to FIG. 2B, when the audio jack 20 is inserted into the audio jack socket 100, the ground detection pin 162 and the ground pin 164 are commonly connected to the ground terminal G of the audio jack 20 So that the resistance value R_J between the ground detection pin 162 and the ground pin 164 can be substantially zero. 2C, when the foreign object 30 flows into the audio jack socket 100, the resistance value R_W between the ground detection pin 162 and the ground pin 164 varies depending on the property of the foreign object 30 . For example, the resistance value R_W may be about 300 kΩ when the foreign object 30 is distilled water, and about 150 kΩ to about 160 kΩ when the foreign object 30 is tap water containing impurities, 30) may be about 20 k? When it is sugar such as beverage. In this specification, the state in which the foreign object 30 is introduced into the audio jack socket 100 as shown in FIG. 2C is referred to as a flooded state.

As such, the impedance between the ground detection pin 162 and the ground pin 164 of the audio jack socket 100 can have various values depending on the state of the audio jack socket 100, and such values are distributed over a wide range . For example, the difference between the resistance value R_O of FIG. 2A and the resistance value R_W of FIG. 2C is relatively large, while the difference between the resistance value R_J of FIG. 2B and the resistance value R_W of FIG. 2C is relatively small . The controller 220 controls the detection range of the impedance detector 210 for determining the insertion state of the audio jack 20 of FIG. 2B and the detection range of the insertion state of the foreign body 30 of FIG. 2C through the control signal CTRL. The detection range of the impedance detector 210 can be set differently. As described below, in accordance with an exemplary embodiment of the present disclosure, the detection range of the impedance detector 210 can be changed by changing the resistance value of the pullup resistor connected to the ground detection pin 162. [ In the following figures, the audio jack socket 100 is shown for convenience of illustration, but the pins 122, 124, 142, 162, 164 and 182 included in the audio jack socket 100 are shown.

3 shows a block diagram of an audio jack detection circuit 200a according to an exemplary embodiment of the present disclosure. As described above with reference to Figs. 2A to 2C, the audio jack detection circuit 200a may include an impedance detector 210a and a controller 220a. The impedance detector 210a can receive the control signal CTRL from the controller 220a and can generate the detection signals DET1 and DET2 and provide it to the controller 220a. The impedance detector 210a may be connected to the ground detection pin 162 and may detect the impedance between the ground detection pin 162 and the ground pin 164, for example, the resistance value R_X. As described above with reference to Figs. 2A to 2C, the resistance value R_X can be changed according to the state of the audio jack socket 100. Fig. As shown in FIG. 3, the impedance detector 210a may include a first comparator 211a, a second comparator 212a, and a variable resistance circuit 214a.

3, the variable resistance circuit 214a may have a first terminal T1 to which a pull-up voltage V_PU is applied and a second terminal T2 to be connected to the ground detection pin 162, (R_PU) that varies between the first and second terminals (T1, T2) in response to the first control signal (CTRL). As described above with reference to Figs. 2A to 2C, the control signal CTRL can set the detection range of the impedance detector 210a and is set to a first value of the variable resistance circuit 214a set based on the control signal CTRL The detection range of the impedance detector 210a can be set based on the resistance value R_PU between the second terminal T1 and the second terminal T2.

Referring to FIG. 3, the first comparator 211a may compare the voltage (G_DET) of the ground detection pin 162 with the first reference voltage V_REF1. For example, the first comparator 211a may generate the first detection signal DET1 which is activated when the voltage G_DET of the ground detection pin 162 is lower than the first reference voltage V_REF1, The first detection signal DET1 may be an active low signal having a low level upon activation. Similarly, the second comparator 212a may compare the voltage (G_DET) of the ground detection pin 162 with the second reference voltage (V_REF2). For example, the second comparator 211b may generate the second detection signal DET2 which is activated when the voltage G_DET of the ground detection pin 162 is lower than the second reference voltage V_REF2, The second detection signal DET2 may be an active low signal having a low level upon activation.

According to an exemplary embodiment of the present disclosure, the second comparator 212a detects a lower resistance value R_X (for example, a resistance value R_W by the foreign object 30 in Fig. 2C) lower than the first comparator 211a . That is, the second reference voltage V_REF2 may be lower than the first reference voltage V_REF1, and the second comparator 212a may compare the voltage G_DET of the ground detection pin 162 with the second reference voltage V_REF2 The resistance value R_PU of the variable resistance circuit 214a may be relatively low. When the resistance value R_PU of the variable resistance circuit 214a is changed from a high value to a low value so that the resistance value R_X between the ground detection pin 162 and the ground pin 164 is relatively low The impedance detector 210 can accurately and easily detect the resistance value R_X even when the foreign object 30 of the audio jack socket 100 enters the audio jack socket 100).

In order to detect a wide range of resistance value R_X, it may be advantageous to vary the resistance value of the pull-up resistor as shown in FIG. For example, when the current source is connected to the ground detection pin 162 and the magnitude of the current generated by the current source is changed in order to change the detection range of the impedance, it is used for detecting the audio jack 20 Due to the limitation of the current size of the current source, the ground detection pin 162 voltage (G_DET) may be about several tens of nanometers, and as a result, a comparator with high comparative performance may be required. However, as shown in FIG. 3, when the resistance value of the pull-up resistor is varied according to the exemplary embodiment of the present disclosure, the voltage (G_DET) of the ground detection pin 162 is detected even when the resistance value R_X is relatively low So that a low cost comparator can be employed as a result.

FIG. 4 shows a block diagram of an audio jack detection circuit 200a 'according to an exemplary embodiment of the present disclosure, FIG. 5 shows a state machine diagram corresponding to the operation of the controller 220a' . 4, the impedance detector 210a 'of the audio device 10a' may include a first comparator 211a ', a second comparator 212a', and a variable resistance circuit 214a ' .

According to an exemplary embodiment of the present disclosure, the controller 220a 'may set the detection mode of the impedance detector 210a' via the control signal CTRL and may determine, based on the detection signals DET1 and DET2, (100). For example, the impedance detector 210a 'may be set to one of two detection modes, i.e., first and second detection modes, each providing a different detection range according to the control signal CTRL, and the variable resistance circuit 210a 'may be changed according to the detection mode. 4, the variable resistance circuit 210a 'may include two resistors each having different resistance values R1 and R2, and may include a switch SW controlled by a control signal CTRL . The switch SW can be opened in response to the control signal CTRL for setting the first detection mode and can be closed in response to the control signal CTRL for setting the second detection mode. Accordingly, the resistance value R_PU of the variable resistance circuit 210a 'may be R1 in the first detection mode and R1 / R2 (i.e. R1? R2 / (R1 + R2)) in the second detection mode . In one embodiment, R1 may be 1 M OMEGA, R2 may be 50 k OMEGA, and the pullup voltage V_PU may be 1.8V. When R2 is significantly smaller than R1, the resistance value R_PU of the variable resistive circuit 210a 'in the second detection mode may be approximately R2.

5, in the open state (S10a) of the audio jack socket 100, the impedance detector 210a 'can be set to the first detection mode by the controller 220a' (CTRL = M1) Accordingly, the resistance value R_PU of the variable resistance circuit 214a 'may be R1. When the first detection signal DET1 is deactivated (that is, when the audio jack socket 100 stays in the open state), the controller 220a 'can stay in the open state S10a while the first detection signal DET1) is activated (that is, when the audio jack 20 is inserted or the foreign object 30 is introduced), the controller 220a 'can transition to the flooded detection state S30a.

In the immersion detection state S30a, the impedance detector 210a 'can be set to the second detection mode by the controller 220a' (CTRL = M2) and accordingly the resistance value R_PU of the variable resistance circuit 214a ' ) Can be lowered to R1 // R2. When the first detection signal DET1 is activated and the second detection signal DET2 is deactivated (i.e., the foreign object 30 is kept in the audio jack socket 100), the controller 220a ' It can stay in the detection state S30a. When both the first and second detection signals DET1 and DET2 are deactivated (that is, when the audio jack socket 100 is dried or the audio jack 20 is disconnected), the controller 220a ' ), The controller 220a can shift to the audio jack insertion state (i.e., when the first and second detection signals DET1 and DET2 are activated, i.e., when insertion of the audio jack 20 is detected) (S50a).

In the audio jack insertion state S50a, the impedance detector 210a 'can be set to the second detection mode by the controller 220a' (CTRL = M2) and accordingly the resistance value of the variable resistance circuit 214'a (R_PU) can be maintained at R1 // R2. When the second detection signal DET2 is deactivated (i.e., when separation of the audio jack 20 is detected), the controller 220a 'can transition to the flooded detection state S30a, (220a ') can stay in the audio jack insertion state (S50a).

The controller 220a 'may generate an output signal OUT corresponding to the states (S10a, S30a, S50a) shown in FIG. For example, the controller 220a 'may generate the first output signal in the open state S10a, generate the second output signal in the flooded detection state S30a, and the audio jack inserted state S50a, Lt; RTI ID = 0.0 > a < / RTI > Since the open state S10a and the flood detection state S30a are in the state where the audio jack is not inserted, the first and second output signals may be the same in one embodiment.

FIG. 6 shows a block diagram of an audio jack detection circuit 200b according to an exemplary embodiment of the present disclosure, and FIG. 7 shows a state machine diagram corresponding to the operation of the controller 220b of FIG. Compared to the audio jack detection circuit 200a 'of FIG. 4, the audio jack detection circuit 200b of FIG. 6 may further include a variable voltage source 215b. Hereinafter, in the description of FIGS. 6 and 7, the description overlapping with the description of FIG. 4 and FIG. 5 will be omitted.

6, the variable voltage source 215b can generate an output voltage V_PU ', which is variable in response to the control signal CTRL for setting the detection mode of the impedance detector 210b And the output voltage V_PU 'generated by the variable voltage source 215b may be applied to the first terminal T1 of the variable resistance circuit T1. That is, the pull-up voltage V_PU 'of the ground detection pin 162 can be varied according to the detection mode.

In the second detection mode in which the variable resistance circuit 214b has a relatively low resistance value, the first and second terminals T1 and T2 of the variable resistance circuit 214b, the ground detection pin 162 The pull-up voltage V_PU 'generated by the variable voltage source 215b may be lower in the second detection mode than in the first detection mode in order to reduce the current flowing to the ground potential via the ground pin 164 and the ground potential. For example, the variable voltage source 215b may provide 1.8V in the first detection mode and 1V in the second detection mode as the pull-up voltage V_PU '. This can reduce the power consumed by the impedance detector 210b and consequently reduce the power consumption of the audio device including the audio jack detection circuit 200b (for example, the audio device 10 of FIG. 1) .

7, in the open state (S10b) of the audio jack socket 100, the variable voltage source 215b outputs the first voltage V1 in response to the control signal CTRL = M1 for setting the first detection mode Up voltage V_PU '. Further, in the submergence detection state S30b, the variable voltage source 215b can supply the second voltage V2 as the pull-up voltage V_PU 'in response to the control signal CTRL = M2 for setting the second detection mode And the second voltage V2 may be lower than the first voltage V1. In the audio jack insertion state S50b, the variable voltage source 215b may provide the second voltage V2 as the pull-up voltage V_PU 'in response to the control signal CTRL = M2 for setting the second detection mode .

FIG. 8 shows a block diagram of an audio jack detection circuit 200c according to an exemplary embodiment of the present disclosure, and FIG. 9 shows a state machine diagram corresponding to the operation of the controller 220c of FIG. Compared to the audio jack detection circuit 200a 'of FIG. 4, the audio jack detection circuit 200c of FIG. 8 may further include a power gating circuit 216c. Hereinafter, in the description of Figs. 8 and 9, the description overlapping with the description of Fig. 4 and Fig. 5 will be omitted.

8, the power gating circuit 216c supplies power to the second comparator 212c or blocks the second comparator 212c in response to the control signal CTRL for setting the detection mode of the impedance detector 210c . That is, the second comparator 212c can determine whether to operate according to the detection mode, and accordingly, the power consumed by the impedance detector 210c can be reduced. As a result, the audio comparator 212c, The power consumption of the device (e.g., audio device 10 of FIG. 1) may be reduced.

In order to remove the power consumed by the second comparator 212c in the first detection mode in which whether the activation of the second detection signal DET2 is not evaluated by the controller 220c is applied to the power gating circuit 216c The second comparator 212c can be cut off the supply of the power supply voltage VDD. On the other hand, in the second detection mode in which whether or not the second detection signal DET2 is activated is evaluated by the controller 220c, the power gating circuit 216c supplies the power source voltage VDD to the second comparator 212c .

9, in the open state (S10c) of the audio jack socket 100, the power gating circuit 216c outputs the power supply voltage VDD in response to the control signal CTRL = M1 for setting the first detection mode It can be prevented from being provided to the power supply node VDD2 of the second comparator 212c. In the first detection mode, the power supply node VDD2 of the second comparator 212c may be in a high impedance state (Z) and a ground potential may be applied. The power gating circuit 216c supplies the power supply voltage VDD to the power supply node of the second comparator 212c in response to the control signal CTRL = M2 for setting the second detection mode in the submergence detection state S30c VDD2. In the audio jack insertion state S50c, the power gating circuit 216c outputs the power supply voltage VDD to the power supply node VDD2 of the second comparator 212c in response to the control signal CTRL = M2 for setting the second detection mode ). ≪ / RTI >

FIG. 10 shows a block diagram of an audio jack detection circuit 200d according to an exemplary embodiment of the present disclosure, and FIG. 11 shows a state machine diagram corresponding to the operation of the controller 220d of FIG. Compared with the audio jack detection circuit 200a 'of FIG. 4, the audio jack detection circuit 200d of FIG. 10 may further include a third comparator 213d. In the following description of Figs. 10 and 11, the description overlapping with the description of Fig. 4 and Fig. 5 will be omitted.

The audio jack detection circuit 200d may detect the impedance between the jack detection pin 122 and the ground pin 164 and the controller 220d may detect the impedance between the ground detection pin 162 and the grounding pin 164. In this embodiment, It is possible to determine the state of the audio jack socket 100 based on the impedance (first impedance) between the ground pin 164 and the impedance (second impedance) between the jack detection pin 122 and the ground pin 164 have. That is, as shown in FIG. 2B, when the audio jack 20 is inserted into the audio jack socket 100, a jack detection pin 122 (not shown) provided to contact the left signal terminal L disposed at the end of the audio jack 20 May be located at the deepest portion of the audio jack socket 100 and may be used to determine whether the audio jack 20 is fully inserted into the audio jack socket 100. [

10, in order to detect the impedance (second impedance) between the jack detection pin 122 and the ground pin 164, the impedance detection section 210d is connected to the jack detection pin 122 and the resistance value R3 The third comparator 213d may include a pull-up resistor and may compare the voltage J_DET of the jack detection pin 122 with the third reference voltage V_REF3 to generate the third detection signal DET3 . Similarly to the first and second comparators 211d and 212d, the third comparator 213d outputs a deactivated detection signal (V_REF2) when the voltage J_DET of the jack detection pin 122 is higher than the third reference voltage V_REF3 DET3 can be generated and the activated detection signal DET3 can be generated when the voltage J_DET of the jack detection pin 122 is lower than the third reference voltage V_REF3. In one embodiment, the resistance value R3 of the pullup resistor connected to the jack detection pin 122 may be 1 M [Omega]. The pullup voltage V_PU of the ground detection pin 162 and the pullup voltage V_PU '' of the jack detection pin 122 may be the same (for example, 1.8 V) or may be different.

11, in the open state 110a of the audio jack socket 100, when the first detection signal DET1 or the third detection signal DET2 is inactivated (that is, when the audio jack socket 100 is opened The controller 220d can remain in the open state S10d while both the first and third detection signals DET1 and DET3 are activated (when the audio jack 20 is not fully inserted) That is, when the audio jack 20 is inserted or the foreign object 30 is introduced), the controller 220d can transition to the flooded detection state S30d.

When the first detection signal DET1 or the third detection signal DET3 is deactivated and the second detection signal DET2 is deactivated (that is, when the audio jack socket 100 is in the flooded state S30d) The controller 220d can transition to the open state S10d while both the first and third detection signals DET1 and DET3 are activated and the second detection signal DET2 is activated, The controller 220d can stay in the flooded detection state S30d when the audio jack socket 100 is inactivated (i.e., the foreign object 30 is kept in the audio jack socket 100). When all of the first to third detection signals DET1, DET2 and DET3 are activated (that is, when the audio jack 20 is completely inserted), the controller 220d can transition to the audio jack insertion state S50d have.

In the audio jack insertion state S50d, when the second detection signal DET2 is inactivated (that is, when the audio jack 20 is disconnected), the controller 220d can transition to the flood detection state S30d . Otherwise, the controller 220d may remain in the audio jack insertion state (S50d).

The controller 220d can generate the first to third output signals respectively in the open state S10d, the flood detection state S30d and the audio jack insertion state S50d, respectively, and in one embodiment, the first and second The output signal may be the same.

FIG. 12 shows a block diagram of an audio jack detection circuit 200e according to an exemplary embodiment of the present disclosure, and FIG. 13 shows a state machine diagram corresponding to the operation of the controller 220e of FIG. Compared with the audio jack detection circuit 200d of Fig. 10, the audio jack detection circuit 200e of Fig. 12 may further include a power gating circuit 216e and an OR gate 217e. Hereinafter, in the description of Figs. 12 and 13, the description overlapping with the description of Figs. 10 and 11 will be omitted.

Referring to Fig. 12, the power gating circuit 216e may operate similarly to the power gating circuit 216c of Fig. That is, the second comparator 212e can supply or cut off power according to the control signal CTRL. 13, the power gating circuit 216e provides the power supply voltage VDD to the power supply node VDD2 of the first comparator 212e in response to the control signal CTRL = M1 for setting the first detection mode And supply the power supply voltage VDD to the power supply node VDD2 of the first comparator in response to the control signal CTRL = M2 for setting the second detection mode.

12, the first and third detection signals DET1 'and DET3' generated by the first and third comparators 211e and 213e may be input to the OR gate 217e and the OR gate 217e May be provided to the controller 220e as the fourth detection signal DET4. That is, when one of the first and third detection signals DET1 ', DET3' is inactivated, the audio jack socket 100 can be judged to be in the open state, and the first and third detection signals DET1 ' The audio jack socket 100 may be determined to be in a non-opened state (e.g., a flooded state or an audio jack inserted state). Accordingly, referring to FIG. 13, the first and third detection signals DET1 and DET3 of FIG. 11 can be replaced with a fourth detection signal DET4.

14A to 14C are graphs showing the operation of the audio jack detection circuit 200e of FIG. 12 according to the state change scenarios of the audio jack socket 100. FIG. 14A to 14C, the magnitude of the voltage (G_DET) of the ground detection pin 122 is only an example, and the state may correspond to the states (S10e, S30e, S50e) shown in the state machine diagram of FIG. 13 . 14A to 14C, the pull-up voltage V_PU of FIG. 12 is 1.8 V, the first reference voltage V_REF1 is 1.05 V, and the second reference voltage V_REF2 is 0.45 V. In Figs. 14A to 14C, it is assumed that the variable resistance circuit 214e of Fig. 12 has 1 M [Omega] in the first detection mode and has 50 k [Omega] in the second detection mode. Hereinafter, Figs. 14A to 14C will be described with reference to Figs. 12 and 13. Fig.

14A shows a change in the voltage (G_DET) of the ground detection pin 122 and a change in the signals when the audio jack 20 is inserted into the audio jack socket 100 and then disconnected from the audio jack socket 200 FIG. Referring to Fig. 14A, at time T11, the audio jack 20 is inserted. At this time, since the resistance value R_X between the ground detection pin 162 and the ground pin 164 is substantially zero, the voltage G_DET of the ground detection pin 122 is increased from 1.8 V, which is the pullup voltage V_PU Can be lowered to 0V. Accordingly, the fourth detection signal DET4 can be activated, that is, transited to a low level. At time T12, the controller 220e can transition from the open state (S10e) to the flood detection state (S30e) due to the transition of the fourth detection signal (DET4), and accordingly, the control signal You can set the mode. At time T13, the resistance value of the variable resistive circuit 214e can be lowered in response to the control signal CTRL = M2 for setting the second detection mode. The resistance value R_X between the ground detection pin 162 and the ground pin 164 is substantially zero so that the voltage G_DET can be maintained at 0V even though the resistance value of the variable resistance circuit 214e is lowered have. Power is supplied to the second comparator 212e by the power gating circuit 216e and the voltage G_DET of the ground detecting pin 162 is lower than the second reference voltage V_REF2, It is possible to generate the second detection signal DET2. At time T14, the controller 220e can transition from the immersion detection state 30e to the audio jack insertion state S50e due to the activated second detection signal DET2.

Referring to Fig. 14A, at time T15, the audio jack 20 is disconnected. At this time, since the resistance value between the ground detection pin 162 and the ground pin 164 is substantially infinite, the voltage G_DET of the ground detection pin 162 can rise from 0 V to 1.8 V which is the pullup voltage V_PU . Accordingly, the second detection signal DET2 and the fourth detection signal DET4 can be inactivated, that is, transitioned to the high level, respectively. At time T16, the controller 220e can transition from the audio jack insertion state S50e to the flood detection state S30e due to the transition of the second detection signal DET2. At time T17, the controller 220e can transition from the submergence detection state S30e to the open state S10e due to the deactivated second and fourth detection signals DET2 and DET4, and accordingly the control signal CTRL Can set the first detection mode. Thus, the resistance value of the variable resistance circuit 214e can be raised again, and the power supplied to the second comparator 212e can be cut off.

14B is a graph showing changes in the voltage (G_DET) of the ground detection pin 162 and changes in the signals when submergence occurs in the audio jack socket 100, and then immersion is released. Referring to Fig. 14B, at time T21, immersion occurs due to, for example, the foreign object 30 of Fig. 2C being introduced. The resistance value R_X between the ground detection pin 162 and the ground pin 164 may be about 20 kOhm to 300 kOhm depending on the property of the foreign object 30 and therefore the voltage (G_DET ) Can drop from a pull-up voltage (V_PU) of 1.8V. The resistance value of the variable resistance circuit 214e connected to the ground detection pin 162 in the first detection mode is about 1 MΩ and the resistance value between the ground detection pin 162 formed by the foreign object 30 and the ground pin 164 R_X is about 40 k ?, the voltage G_DET can be lowered to substantially 0 V as shown in Fig. 14B. Thus, the fourth detection signal DET4 can be activated, that is, transited to a low level. At time T22, the controller 220e can transition from the open state (S10e) to the flood detection state (S30e) due to the transition of the fourth detection signal (DET4), and accordingly, the control signal You can set the mode. At time T23, the resistance value of the variable resistive circuit 214e can be lowered in response to the control signal CTRL = M2 for setting the second detection mode. When the resistance value of the variable resistance circuit 214e in the second detection mode is about 50 k? And the resistance value R_X between the ground detection pin 162 and the ground pin 164 is 40 k ?, as shown in FIG. 14B, The voltage G_DET may rise higher than the second reference voltage V_REF2 of 0.45V. Power is supplied to the second comparator 212e by the power gating circuit 216e and the voltage G_DET of the ground detecting pin 162 is higher than the second reference voltage so that the second comparator 212e outputs the inactivated second The detection signal DET2 can be generated.

Referring to Fig. 14B, at time T24, as the audio jack socket 100 is dried, immersion is released. At this time, since the resistance value between the ground detection pin 162 and the ground pin 164 is substantially infinite, the voltage G_DET of the ground detection pin 162 can rise to 1.8 V which is the pullup voltage V_PU. As a result, the fourth detection signal DET4 can be inactivated, that is, shifted to a high level. At time T25, the controller 220e can transition from the submergence detection state S30e to the open state S10e due to the deactivated second and fourth detection signals DET2 and DET4, and accordingly the control signal CTRL Can set the first detection mode. Thus, the resistance value of the variable resistance circuit 214e can be raised again, and the power supplied to the second comparator 212e can be cut off.

14C is a graph showing changes in the voltage (G_DET) of the ground detection pin 162 and changes in the signals when immersion occurs in the audio jack socket 100 and then the audio jack 20 is inserted. Referring to Fig. 14C, at time T31, flooding occurs. The change of the voltage G_DET and the change of the signals generated at the times T21, T22, and T23 in Fig. 14B can occur similarly at times T31, T32, and T33 in Fig. 14C, respectively. Thus, since the time T33, the voltage G_DET of the ground detection pin 162 can be maintained at 0.45 V, the controller 220e can stay in the flooded detection state S30e, 2 mode can be set.

Referring to Fig. 14C, at time T34, the audio jack 20 is inserted. At this time, since the resistance value R_X between the ground detection pin 162 and the alc ground pin 164 is substantially zero, the voltage G_DET of the ground detection pin 162 can be lowered to 0V. Thus, the fourth detection signal DET4 can be activated, that is, transited to the low level, and the second detection signal DET2 can also be activated, that is, transited to the low level. At time T35, the controller 220e can transition from the immersion detection state (S30e) to the audio jack insertion state (S50e) due to the activated second and fourth detection signals (DET2, DET4) 16 is a block diagram of an audio jack detection circuit in accordance with the exemplary embodiments of the present disclosure; As shown in Figs. 15 and 16, the audio jack detection circuits 200f and 200g may include impedance detectors 210f and 210g and controllers 220f and 220g.

15, the impedance detector 210f of the audio jack detection circuit 200f includes one comparator 218f to detect the resistance value R_X between the ground detection pin 162 and the ground pin 164, . ≪ / RTI > The comparator 218f can generate the detection signal DET by comparing the voltage G_DET of the ground detection pin 162 with the reference voltage V_REF. The reference voltage V_REF may have a size suitable for detecting the insertion of the audio jack 20 of Fig. 2B and the inflow of the foreign object 30 of Fig. 2C, respectively. For example, referring to FIG. 14C, the reference voltage V_REF may have a magnitude between 0.45 V and 0 V, so that the comparator 218f outputs a detection signal DET activated upon insertion of the audio jack 20, While generating a deactivated detection signal DET when the foreign object 30 is introduced.

According to an exemplary embodiment of the present disclosure, the reference voltage V_REF may be changed according to the detection mode. That is, in the first detection mode in which the variable resistance circuit 214f has a relatively high resistance value, the reference voltage V_REF may be high, and in the second detection mode in which the variable resistance circuit 214f has a relatively low resistance value, (V_REF) may be low. For example, referring to FIG. 14C, the reference voltage V_REF may be 1.05V (i.e., the first reference voltage V_REF1) in the first detection mode, and the reference voltage V_REF may be 0.45 V (i.e., the second reference voltage V_REF2).

16, the impedance detector 210g of the audio jack detection circuit 200g includes an analog-to-digital converter (not shown) for detecting the resistance value R_X between the ground detection pin 162 and the ground pin 164, a digital converter (ADC) 218g. The analog-to-digital converter 219g may provide the digital signal corresponding to the magnitude of the voltage (G_DET) of the ground detection pin 162 to the controller 220g as the detection signal DET.

17 is a flow chart illustrating an audio jack detection method in accordance with an exemplary embodiment of the present disclosure; Specifically, FIG. 17 is a flowchart showing a process in which the audio jack detection circuit 200 of FIG. 1 generates an output signal OUT corresponding to the state of the audio jack socket 100 once. As described above, the audio jack detection circuit 200 may generate an output signal OUT corresponding to the states of the audio jack socket 100, respectively. Hereinafter, Fig. 17 will be described with reference to Figs. 8 and 9, but the technical idea of the present disclosure is not limited thereto.

Referring to Fig. 17, an operation of setting the first detection mode may be performed in step S110. For example, the controller 220c can generate the control signal CTRL in the first detection mode, whereby the variable resistance circuit 214c of the impedance detector 210c can have a relatively high resistance value, 2 power supplied to the comparator 212c may be cut off.

In step S120, an operation of determining whether the audio jack socket 100 is in the open state can be performed. For example, the controller 220c can determine whether the audio jack socket 100 is in the open state based on the first detection signal DET1 of the first comparator 211c. If the audio jack socket 100 is open (i.e., the first detection signal DET1 is deactivated), an operation may be performed to generate a first output signal corresponding to the open state in step S130 .

If the audio jack socket 100 is not in the open state (i.e., the first detection signal DET1 is activated), an operation of setting the second detection mode may be performed in step S140. For example, the controller 220c can generate the control signal CTRL in the second detection mode, whereby the variable resistance circuit 214c of the impedance detector 210c can have a relatively low resistance value, 2 comparator 212c can be supplied with power.

In step S150, an operation of determining whether the audio jack socket 100 is in the flooded state can be performed. For example, the controller 220c determines that the audio jack socket 100 is in a flooded state (i.e., when the first detection signal DET1 of the first comparator 211c is activated and the second detection of the second comparator 212c The signal DET2 is inactivated), an operation of generating a second output signal corresponding to the flooded state in step S160 may be performed.

In the case where the audio jack socket 100 is not in the flooded state (i.e., when both of the first and second detection signals DET1 and DET2 are activated), in step S170, the third output signal corresponding to the audio jack- The generating operation can be performed.

FIG. 18 shows a block diagram of a computing system 1000 as an audio device in accordance with an exemplary embodiment of the present disclosure. Similar to the audio device 10 of FIG. 1, the computing system 2000 may output an audio signal through an audio jack socket 1400, or may receive an audio signal. The computing system 1000 may include, but is not limited to, a personal computer (PC), a tablet PC, a mobile phone, a smart phone, an e-reader, a personal computer digital assistant, EDA, digital still camera, digital video camera, portable multimedia player (PMP), personal navigation device or portable navigation device (PND), portable game console a handheld game console, or the like.

18, the computing system 1000 includes an application processor (AP) 1100, a PCM mixer 2200, an audio jack detection circuit 1300, an audio jack socket 1400, a modem 1500 ), An external memory 1600, and a memory card 1700.

The application processor 1100 is a system-on-chip (SoC) that activates an operating system and applications for the computing system 1000 to control other components of the computing system 1000 can do. The application processor 1100 may include a host CPU 1110, a multimedia acceleration block 1120, peripherals 1130, an internal memory 1140, and a memory interface 1150, as shown in FIG. The components of the application processor 1100 may be communicatively coupled to the system bus 1150, and the system bus 1150 may be a multi-layer bus.

As shown in FIG. 18, the host CPU 110 may include a plurality of cores 1111 to 1114, and each of the cores may independently execute instructions. Although not shown in FIG. 18, the host CPU 1110 may include a layered cache memory, and unlike the one shown in FIG. 18, the host CPU 1110 may include fewer than four or more than four cores .

The multimedia acceleration block 1120 may include a plurality of logic blocks for processing multimedia data. Each of the plurality of logic blocks included in the multimedia acceleration block 1120 can increase the efficiency of the application processor 1100 and the computing system 1000 by taking charge of the processing of the multimedia data. 18, the multimedia acceleration block 1120 may include an audio processing module 1121, a video processing module 1122, a display drive module 1123, and an image processing module 1124, for example, . The audio processing module 1121 can generate audio data for reproducing sound by processing the source audio data. The audio processing module 1121 may also generate target audio data by processing the audio data generated from the sound. The video processing module 1122 may decode the compressed source video data according to the video codec. Display drive module 1123 may generate data corresponding to a signal provided to a display device (not shown) of computing system 1000. The image processing module 1124 may decode the compressed source image data according to the image codec.

Peripherals 1130 may include a plurality of logic blocks, each performing various functions. 18, the peripherals 1130 may include a direct memory access (DMA) controller 1131, a connectivity module 1132, and an analog to digital converter 1133. For example, as shown in FIG.

The DMA controller 1131 can control a DMA operation performed through the system bus 1150. [ For example, the DMA controller 1131 may access the data stored in the external memory 1600 via the internal memory 1140 or the memory interface 1150 when the audio processing module 1121 does not participate in the host CPU 1110 Can be controlled.

The connectivity module 1132 may include a plurality of logic blocks supporting communication standards for communicating with the application processor 1100 and other components of the computing system 1000 or with external devices of the computing system 1000. For example, as shown in FIG. 18, the connectivity module 1132 may include a logic block that supports a serial bus interface standard such as I2S (integrated interchip sound), and may be generated by the audio processing module 1121 To the PCM mixer 1200 that generates audio signals from the audio data through I2S.

According to exemplary embodiments of the present disclosure, the audio jack detection circuit 1300 detects the impedance between the ground detection pin and the ground pin of the audio jack socket 1400 in a plurality of detection modes corresponding to different detection ranges And provide an output signal to the PCM mixer 1200 that corresponds to the state of the audio jack socket based on the detected impedance. The PCM mixer 1200 may initiate or block communication with the audio jack socket 1400 based on the output signal of the audio jack detection circuit 1300. [ Although the output signal of the audio jack detection circuit 1300 is shown as being provided to the PCM meander 1200 in Figure 18, the output signal of the audio jack detection circuit 1300 may be provided to the application processor 1100, The connectivity module 1132 included in the peripheral devices 1130 of the application processor 1100 may start or stop the communication with the PCM mixer 1200 based on the output signal of the audio jack detection circuit 1300. [

Referring to FIG. 18, the connectivity module 1132 may include a logic block that supports communication with the modem 1500. The modem 1500 may provide an interface for the computing system 1000 to communicate with other computing systems external to the computing system 1000. For example, the modem 1500 may provide an interface for wireless mobile communication, receive source audio data from another computing system via an antenna, and transmit target audio data.

The connectivity module 1132 may include a card interface such as a Compact Flash Card (CFC), a Microdrive, a Smart Media Card (SMC) Multimedia Card (MMC) A Security Digital Card (SDC), and a Memory Stick. The connectivity module 1132 can read the source audio data stored in the memory card 1700 from the memory card 1700 and write the read source audio data to the audio processing module 1121, the internal memory 1140, 1600). The analog-to-digital converter 1133 can output digital data by receiving an analog signal. For example, the analog to digital converter 1133 may be used to convert the user's input received via a touch screen (not shown) included in the computing system 1000. The host CPU 1110 can interpret the input of the user by referring to the output data of the analog-to-digital converter 1133 of the peripherals 1130. [

Internal memory 1140 is a memory subsystem included in application processor 1100 and may be communicatively coupled to system bus 1150. 18, internal memory 1140 may include SRAM 1141 and ROM 1142 and components of application processor 1100 may be coupled to SRAM 1141 and / And can access the ROM 1142.

The memory interface 1150 may provide an interface of the application processor 1100 to the external memory 1600. For example, external memory 1600 may include DRAM 1610 and flash 1620, and memory interface 1150 may include a DRMA controller and a flash controller. The audio data generated while the audio processing module 1121 performs audio processing may be stored in the DRAM 1610 of the external memory 1600 or the SRAM 1141 of the internal memory 1140. [

As described above, exemplary embodiments have been disclosed in the drawings and specification. Although the embodiments have been described herein with reference to specific terms, it should be understood that they have been used only for the purpose of describing the technical idea of the present disclosure and not for limiting the scope of the present disclosure as defined in the claims . Therefore, those skilled in the art will appreciate that various modifications and equivalent embodiments are possible without departing from the scope of the present invention. Accordingly, the true scope of protection of the present disclosure should be determined by the technical idea of the appended claims.

Claims (10)

At least one ground detection corresponding to a first impedance between a ground pin and a ground detection pin provided to contact a ground terminal of the audio jack when an audio jack is inserted into an audio jack socket, A first impedance detector for generating a signal; And
And generating a control signal for setting the detection mode, and based on the at least one ground detection signal, selects one of the first to third output signals corresponding to the open state of the audio jack socket, An audio jack detection circuit comprising a controller for generating one. The method according to claim 1,
The first impedance detector has a first terminal to which a pull-up voltage is applied and a second terminal to be connected to the ground detection pin and has a resistance value variable between the first and second terminals in response to the control signal The branch includes a variable resistance circuit,
Wherein the variable resistance circuit has a first resistance value in a first detection mode and a second resistance value in a second detection mode lower than the first resistance value. 3. The method of claim 2,
The controller determines whether or not the audio jack socket is in the open state in the first detection mode and determines that the audio jack socket is in the insertion state or the flooded state of the audio jack in the second detection mode Audio jack detection circuit. 3. The method of claim 2,
Wherein the first impedance detector comprises:
A first comparator for generating a first ground detection signal that is activated when the voltage from the ground detection pin is lower than a first reference voltage; And
And a second comparator for generating a second ground detection signal which is activated when the voltage from the ground detection pin is lower than a second reference voltage lower than the first reference voltage,
Wherein the controller generates the control signal to set the second mode when the first ground detection signal is activated in the first mode. 5. The method of claim 4,
Wherein the controller generates the first output signal when the first ground detection signal is deactivated in the first detection mode and generates the second output signal when the second ground detection signal is deactivated in the second detection mode, And generates a third output signal when the second ground detection signal is activated in the second detection mode. 5. The method of claim 4,
Wherein the audio jack detection circuit includes a power gating circuit responsive to the control signal for supplying or blocking power to the second comparator,
Wherein the power gating circuit interrupts power supplied to the second comparator in the first mode and supplies power to the second comparator in the second mode. 5. The method of claim 4,
The audio jack detection circuit generates a jack detection signal corresponding to a second impedance between the jack detection pin and the ground pin provided to be in contact with the signal pin to the signal terminal of the audio jack when the audio jack is inserted into the audio jack socket Further comprising a second impedance detector,
Wherein the controller generates one of the first to third output signals based on the jack detection signal. 8. The method of claim 7,
Wherein the second impedance detector includes a third comparator that generates the jack detection signal that is activated when the voltage from the jack detection pin is lower than the third reference voltage,
Wherein the controller generates the first output signal when the jack detection signal or the first ground detection signal is deactivated in the first mode and the jack detection signal and the first ground detection signal And generates the second output signal when the second ground detection signal is activated and inactivates the third output signal when the jack detection signal, the first and second ground detection signals are activated in the second mode The audio jack detection circuit generates the audio jack detection signal. 3. The method of claim 2,
Wherein the first impedance detector further comprises a variable voltage source for generating the pull-up voltage,
Wherein the variable voltage source generates a first pull-up voltage in the first mode and a second pull-up voltage lower than the first pull-up voltage in the second mode in response to the control signal, Detection circuit. The method according to claim 1,
Wherein the first and second output signals are identical.

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