KR20170104343A - Trench power mosfet device having one source contact and method of manufacturing the same - Google Patents

Trench power mosfet device having one source contact and method of manufacturing the same Download PDF

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KR20170104343A
KR20170104343A KR1020160027319A KR20160027319A KR20170104343A KR 20170104343 A KR20170104343 A KR 20170104343A KR 1020160027319 A KR1020160027319 A KR 1020160027319A KR 20160027319 A KR20160027319 A KR 20160027319A KR 20170104343 A KR20170104343 A KR 20170104343A
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mosfet
trench
gate
source
source region
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최영석
김장래
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최영석
김장래
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Abstract

When making a trench D/MOS, an ion is injected as an n+ or a p+ type in a trench gate and a source part between the trench gates, and the total chip area can be significantly reduced by making a single source contact part.

Description

한 개 소스 콘택으로 만드는 트렌치 파워 모스펫 디바이스 및 그 제조방법{TRENCH POWER MOSFET DEVICE HAVING ONE SOURCE CONTACT AND METHOD OF MANUFACTURING THE SAME}  TECHNICAL FIELD [0001] The present invention relates to a trench power MOSFET device and a method of manufacturing the same. More particularly, the present invention relates to a trench power MOSFET device,

본 발명은 각 단위소자 마다 있는 모스펫 소스 부분의 콘택홀(Contact hole)을 사용하지 않는 방법을 제시하며 각 소자가 가지고 있는 콘택부분 면적이 제거되어 전체 모스펫 칩면적을 획기적으로 축소시킬 수 있는 파워 모스펫 및 그 제조 방법에 관한 것이다  The present invention proposes a method that does not use the contact hole of the MOSFET source part in each unit element and removes the contact area area of each element and thereby reduces power MOSFET And a manufacturing method thereof

전기 및 전자 제품들이 갈수록 복잡한 회로와 다양한 소자들이 필요하게 된다.    Electrical and electronic products require increasingly complex circuits and diverse devices.

기본적으로 전기 및 전자 제품들에 사용되는 파워 모스펫(Power MOSFET)은 낮은 온 저항(ON resistance: Ron), 고내압(Breakdown Voltage: BV) 및 빠른 스위칭 속도(Switching speed)가 요구되고 있다. 또한 파워 모스펫 시장이 커지면서 고성능은 말할 필요 없이 중요하고 고성능 내에서도 가격 경쟁력이 가장 중요한 요인이 된지 오래되었다. 좋은 가격 경쟁력을 갖기 위해서는 소자 크기를 줄여 원가를 감소시켜야 한다. 그러나 기존 방식의 소스 콘택홀(Source Contact Hole)을 사용한 방식은 기본적으로 콘택 사이즈(Size)가 포함된 소자가 될 수 밖에 없다. 그리하여 소자를 제조하는 장비의 물리적인 한계에 부딪히게 된다. 트렌치 모스펫(Trench MOSFET)을 제조는 일반적으로 소스(Source)에서 다음 소스까지 피치(Pitch)가 감소 할수록 온 저항(Ron)을 낮게 만들 수가 있다. 본 발명은 각 소자 마다 콘택홀을 사용한 기존공정의 약점을 하나의 콘택으로 칩을 만드는 방법을 제시한다. Basically, power MOSFETs used in electric and electronic products are required to have low on-resistance (Ron), high breakdown voltage (BV) and fast switching speed. Also, as the market for power MOSFETs has grown, high performance has become important and price competitiveness has been the most important factor even within high performance. In order to have a good price competitiveness, it is necessary to reduce the device size to reduce the cost. However, a conventional method using a source contact hole is basically a device including a contact size. Thus, the physical limitations of the device making the device are encountered. Manufacture of trench MOSFETs can generally reduce the on-resistance (Ron) as the pitch decreases from the source to the next source. The present invention proposes a method of making a chip with one contact as a weak point of a conventional process using a contact hole for each device.

또한 이 모스펫을 구동하기 위해서는 모스펫 외부 회로에 저항, 다이오드, 정전기방지 회로등 기타 수동소자들이 꼭 있어야 제품의 신뢰성을 향상시킬 뿐만 아니라 모스펫을 정상적으로 구동시킬 수 있게 된다..In addition, in order to drive this MOSFET, other passive elements such as resistors, diodes, and anti-static circuits must be present in the external circuit of the MOSFET to improve the reliability of the product and also to be able to drive the MOSFET normally.

종래의 모스펫에서는 모스펫 하나만을 만들어 외부에 수동소자를 연결하여 구동하였으나 본 발명은 내부 모스펫을 획기적으로 줄일 뿐만 아니라 외부에 꼭 필요한 소자를 모스펫 내부에 내장하여 제품의 신뢰성을 향상시킬 수 있으며 또한 외부의 부품을 줄여 제품의 원가 경쟁력을 확보 할 수 있게 하였다.In the conventional MOSFET, only one MOSFET is formed and the passive device is connected to the external device. However, the present invention not only dramatically reduces the internal MOSFET, but also improves the reliability of the product by integrating the necessary elements inside the MOSFET. We have reduced parts to ensure cost competitiveness of products.

모스펫과 같이 만들 수 있는 수동소자는 P형 저항, N형 저항, Zener다이오드 및 모스펫 게이트 산화막을 보호 할 수 있는 ESD형 다이오드 등 이다. Passive devices, such as MOSFETs, are P-type resistors, N-type resistors, Zener diodes, and ESD-type diodes that can protect the MOSFET gate oxide.

1. 각 각의 단위소자 소스 부분의 콘택홀(Contact Hole)을 제거하여 전체 모스펫칩에 하나의 전면 소스콘택 모스펫을 만드는 기술이다.   1. A technique of making a single source contact MOSFET in the entire MOSFET chip by removing the contact hole of each unit device source part.

2. 모스펫을 구동하기 위해 필요한 수동소자를 모스펫 제조과정에 삽입하여 원칩(One Chip)화하는 기술이다..  2. It is a technology to make one chip by inserting the passive elements necessary for driving the MOSFET into the manufacturing process of the MOSFET.

본 발명에 따르면, 모스펫 칩에 한 개의 전면 소스 콘택으로 각 소자 마다 있어야 하는 소스 콘택홀을 제거하여 획기적으로 작게 모스펫칩 사이즈를 만들 수 있어 파워 모스펫에서 가장 중요한 낮은 온저항(Low Rdson)을 구현 할 수 있다.   According to the present invention, it is possible to reduce the source contact hole, which is required for each device, from one front source contact to the MOSFET chip, so that the MOSFET chip size can be dramatically reduced, thereby realizing a low on- .

또한 이 발병의 효과와 더불어 외부에 연결하는 수동소자 대신 내부 소자를 사용하므로 부품의 원가절약 및 회로설계의 단순화를 할 수 있다. 그리고 부품연결등의 외부요인으로 생길 수 있는 정전기로 인한 산화막 파괴현상, 모스펫을 사용한 제품의 신뢰성 취약점을 방지하는 효과가 있다.In addition to the effect of the onset, internal components are used in place of passive elements that connect to the outside, which can save parts cost and simplify circuit design. It also has the effect of preventing oxide film breakdown due to static electricity caused by external factors such as component connection and reliability weakness of products using MOSFET.

1. 기존 구조도
평면형이나 트렌치형의 모스펫 하나만 있는 단순한 구조[도 1]
2. 본발명의 구조도 [도 2]
소스콘택홀을 없앤 한 개의 소스 콘택을 갖는 트렌치모스펫 과
추가 적용 가능한 구조 (이 모스펫 주위에 저항, 다이오드 그리고 정전기방지소자가 결합된 복합구조 (MOSFET with Integrated Passive Devices)) [도 3]은 [도 2]을 구체화한 평면도이며 [도 4]는 [도 2]와 같이 구현가능한 구조
첨부한 [도2a]에서 보는것 처럼 소스 전면 콘택된 트렌치모스펫 소자를 만들기 위해서는 N+실리콘 위에 에피(12)로 만든 실리콘표면에 두꺼운 패드산화막(Pad oxide(17))를 기른 후 실리콘을 에칭(18)하는 작업을 하게 된다. 이렇게 두꺼운 패드산화막 및 실리콘을 에칭한 후 ?湛? 게이트 산화막(20)을 키우게 된다.
그리고 게이트 폴리실리콘(22)을 증착[도2-2]후 [도2c]처럼 폴리실리콘을 에칭하여 모스펫 게이트 부분을 만들고 다시 얇게 패드산화막(23)를 기른다.
모스펫 바디 패턴을 실시하여 두꺼운 산화막을 제거하고 [도2d]처럼 만든다. 이때 실리콘표면에는 게이트산화막보다 두꺼운 산화막(25)이 남아있어야한다.
그리고 피타입 이온주입을 위해 패드산화막을 한후 바디이온주입을 한다.[도2-5]
다음 [도2f]는 N+ 패턴으로 모스펫 소스부분 P+패턴으로 또한 모스펫소스부분 이온주입을 한후 두꺼운 산화막을 증착하고 확산을 진행하여. 피타입바디(14), N+(24) 또는 P+(24)가 있는 소자를 만들어 준다.
[도2g]은 본 특허의 핵심으로 소스전면콘택에칭을 진행하여 소스부분의 콘택홀 없이 소스부분위의 산화막 전체를 제거한다, 이렇게 에치백을 진행하여도 게이트폴리실리콘 위에는 산화막(26)이 남아있어야한다.
그 후 공정은 메탈 등 일반적인 모스펫제조 방법과 동일한 방법으로 진행하여 트렌치모스펫을 만들 수 있다.[도2-8]
[도3]은 [도2]의 실시예로 평면도를 나타내며 N+와 P+을 교차(면적기준 N+대 P+는 3대1 또는 5대1로 한다)하여 소스전극을 만드는 방법을 도식화하였다.
첨부한 [도4]이하는 본 특허의 옵션으로 수동소자를 모스펫내에 내장하는 기술이다. IPM(Integrated Passive Devices)소자를 만들기 위해서는 N+실리콘(10)위에 에피(12)로 만든 실리콘표면에 일정한 Pad oxide(17)를 기른 후 실리콘을 에칭(18)하는 작업을 하게 된다. 이렇게 실리콘을 에칭한 후 게이트 산화막(20)을 키우게 된다. 그리고 게이트 폴리실리콘(22)을 증착 에칭한후 [도4a]처럼 모스펫부분을 만들고 IPM소자는 두꺼운 Pad 산화막위에 다른 폴리실리콘을 증착하여 전면 P-타입 이온주입을 실시하여 저항(19) 및 제너다이오드(21), 정전기 다이오드(23)를 만들기 위한 준비를 한다. [도4b]처럼 폴리실리콘을 에칭하여 각 IPM소자를 분리한다. 또 다른 방법으로는 [도4a], [도4b]을 한번의 폴리실리콘증착후 모스펫부분과 IPM소자를 같이 에칭 할 수 있다. 이렇게 모스펫이 형성된 부분과 IPM소자가 형성되는 부분이 분리되어 각각 소자들이 만들어 진다.
[도4c]은 모스펫 바디 패던을 실시하고 피타입 이온주입을 진행한다. 다음 [도4d]는 N+ /P+ 패턴으로 모스펫 소스부분과 IPM의 제너 및 정전기소자의 N/P-type 전극을 만들어 준다. 여기서 N-type의 폭과 길이는 제너 및 정전기소자의 특성에 중요한 부분을 차지한다. 그 후[도4e] N+확산을 진행하여 Diode형태소자를 만들어준다.
그 후 공정은 콘택, 메탈 등 일반적인 모스펫제조 방법과 동일한 방법으로 진행하여 IPM소자를 만든다.1. Existing structure
Simple structure with only one flat or trench type MOSFET [Fig. 1]
2. Structural drawing of the present invention (Fig. 2)
A trench MOSFET with one source contact with the source contact hole removed
3 is a plan view embodying [Figure 2], and [Figure 4] is a plan view embodying [Figure 3]. [Figure 3] 2]
As shown in the accompanying FIG. 2a, to form a trench MOSFET device with source contact on the surface, a thick pad oxide (17) is formed on the silicon surface made of the epi (12) on the N + silicon, ). After etching the thick pad oxide and silicon, The gate oxide film 20 is grown.
After the gate polysilicon 22 is deposited (FIG. 2-2), polysilicon is etched as shown in FIG. 2C to form a MOSFET gate portion, and the pad oxide film 23 is thinned again.
The body pattern of the MOSFET is removed to remove the thick oxide film, as shown in FIG. 2D. At this time, the oxide film 25 thicker than the gate oxide film should remain on the silicon surface.
Then, a pad oxide film is formed for ion implantation of the blood type, followed by body ion implantation. [Figure 2-5]
Next, as shown in FIG. 2F, a MOSFET is implanted with a N + pattern and a MOSFET is implanted with P + pattern, followed by deposition of a thick oxide film and diffusion. Type body 14, N + (24), or P + (24).
FIG. 2G is a schematic view of the present invention. Referring to FIG. 2G, the source front contact etching is performed to remove the entire oxide film on the source portion without the contact hole of the source portion. .
Thereafter, the process can be performed in the same manner as the general method of manufacturing a MOSFET, such as a metal, to form a trench MOSFET. [2-8]
3 is a plan view of the embodiment of FIG. 2, illustrating a method of forming a source electrode by crossing N + and P + (area reference N + vs. P + is 3: 1 or 5: 1).
Attached [Figure 4] Hereinafter, a passive device is incorporated in a MOSFET as an option of the present patent. In order to make an IPM (Integrated Passive Devices) device, a certain pad oxide 17 is grown on the silicon surface made of the epi 12 on the N + silicon 10, and then the silicon is etched 18. After the silicon is etched in this manner, the gate oxide film 20 is grown. 4A, the IPM element is formed by depositing another polysilicon layer on the thick pad oxide layer and performing a front P-type ion implantation to form a resistor 19 and a Zener diode (21) and the electrostatic diode (23). As shown in FIG. 4B, polysilicon is etched to separate each IPM device. Alternatively, [Fig. 4A] and [Fig. 4B] can be etched together with polysilicon once, and the MOSFET and the IPM device can be etched together. The portion where the MOSFET is formed and the portion where the IPM element is formed are separated to make respective elements.
FIG. 4C shows a mosep body padding and proceeds with the ion implantation of the blood type. Figure 4d then shows the N + / P + pattern to create the MOSFET source, the Zener of the IPM, and the N / P-type electrode of the electrostatic device. Here, the width and length of the N-type are important for the characteristics of the zener and the electrostatic device. Thereafter [FIG. 4E] N + diffusion proceeds to form a diode type device.
Thereafter, the process proceeds in the same manner as a general MOSFET fabrication method such as contact and metal to produce an IPM device.

Claims (5)

트렌치 게이트를 구비한 파워 모스펫(Power MOSFET)으로서,
N+ 기판; 상기 N+ 기판 상에 형성된 N- 에피텍셜 층;
상기 N- 에피텍셜 층 상에 형성된 P- 보디 층;
상기 P-보디 층의 일부 내에 형성된 N+ 소스 영역;
상기 N+ 소스 영역 및 상기 P- 보디 층을 관통하여 상기 N- 에피텍셜 층에 이르는 트렌치;
상기 트렌치 내에 형성된 게이트 절연막 및 게이트 전극;
상기 N+ 소스 영역에 접속된 소스 전극; 및
상기 게이트 전극과 상기 소스 전극을 분리하기 위하여 상기 게이트 전극 위에 형성된 두꺼운 절연막을 포함하며, N+/P+가 형성되는 소스영역에 콘택홀이 없는 전면 오픈되어 하나의 콘택형태로 메탈이 덮어진 형태로 구성된 모스펫.
상기 트렌치에 포함된 폴리실리콘이 n- 에피층보다 아래에 형성된 트렌치 게이트를 구비한 파워 모스펫과 그모스펫에 인접하여 저항 및 제너다이오드, ESD소자를 같이 만들어진 구조나 모스펫 소자안에 저항, 제너다이오드 및 ESD소자를 같이 만들어진 구조.
As a power MOSFET having a trench gate,
N + substrate; An N-epitaxial layer formed on the N + substrate;
A P-body layer formed on the N-epitaxial layer;
An N + source region formed in a portion of the P-body layer;
A trench through the N + source region and the P-body layer to the N-epitaxial layer;
A gate insulating film and a gate electrode formed in the trench;
A source electrode connected to the N + source region; And
And a thick insulating film formed on the gate electrode to separate the gate electrode and the source electrode, wherein the source region in which N + / P + is formed is formed in a form of a contact-open metal Mosfet.
A power MOSFET having a trench gate in which the polysilicon included in the trench is formed below the n-epi layer, and a resistor, a zener diode, and an ESD device adjacent to the MOSFET, Structure made with the device.
[청구항 1] 구조에서 트렌치 모스펫 구조에서 게이트 폴리실리콘위에 두껍게 형성된 산화막위로 메탈과 접촉된 모스펫구조.
[Claim 1] A MOSFET structure in which a metal is contacted with an oxide film formed thickly on a gate polysilicon in a trench MOSFET structure.
에피된 실리콘아래로 즉 N+소스아래로 게이트폴리실리콘이 형성되어 만들어진 모스펫구조
A MOSFET structure formed by the formation of gate polysilicon beneath the epitaxial silicon, ie, the N + source
모스펫 소스 구성에 있어서 각소자 게이트(gate) 사이에 N+ / P+ / N+로 구성된 소자가 아니라 N+ 또는 P+만 있는 구조이며 게이트 방향으로 N+/P+/N+/P+로 반복된 구조P + / N + / P + in the direction of the gate, and N + or P +, not the element composed of N + / P + / N + 모스펫과 같이 만들어 진 저항은 N type저항과 P type저항을 포함한다.
모스펫과 같이 만들어 진 소자는 Zener Diode과 ESD diode을 포함한다
Resistors made with MOSFETs include N type resistors and P type resistors.
Devices made like MOSFETs include Zener diodes and ESD diodes
KR1020160027319A 2016-03-07 2016-03-07 Trench power mosfet device having one source contact and method of manufacturing the same KR20170104343A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117334584A (en) * 2023-09-14 2024-01-02 中晶新源(上海)半导体有限公司 Method for forming semiconductor device and semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117334584A (en) * 2023-09-14 2024-01-02 中晶新源(上海)半导体有限公司 Method for forming semiconductor device and semiconductor device

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