KR20170094857A - Semiconductor device - Google Patents

Abstract

A semiconductor device of an embodiment of the present invention includes an n-type first semiconductor layer, a p-type first semiconductor layer, an active layer disposed between the n-type first semiconductor layer and the p-type first semiconductor layer, a p-type electrode disposed on the p-type first semiconductor layer, and an n-type electrode disposed on the n-type first semiconductor layer, wherein the entire active layer is a depletion region. The semiconductor device has excellent response.

Description

Semiconductor device

Embodiments relate to semiconductor devices.

In general, a light receiving element such as a photodetector is a kind of transducer that detects light and converts its intensity into an electric signal. Photodiodes, phototransistors, photomultiplier tubes, phototransducer (vacuum, gas filled), etc., are available as photodetectors, such as photocells (silicon, selenium), photoconductive elements (cadmium sulfide, cadmium selenide)

The light receiving element can be fabricated using a direct bandgap semiconductor having excellent light conversion efficiency. A light receiving device using a semiconductor converts electromagnetic energy into electric energy through a photoelectric effect generated in the semiconductor. Such a light receiving element can be implemented in various forms. As a structure of the most common light receiving element, there are a PIN diode type structure using a p-n junction, a Schottky structure using a Schottky junction, and a metal semiconductor metal (MSM) structure.

Of the above structures, the PIN diode type structure has excellent response properties, and research is underway. The responsiveness of a light receiving element employing a PIN diode type structure is related to the width (or size) of the depletion region. In the case of the conventional light receiving element, the response area of the light receiving element is poor due to the small depletion region. In addition, in the case of a light receiving element adopting the PIN method, there is a problem that a negative bias must be applied in order to completely deplete the I region.

The embodiment provides a semiconductor device having excellent response.

A semiconductor device according to an embodiment includes: an n-type first semiconductor layer; a p-type first semiconductor layer; An active layer disposed between the n-type first semiconductor layer and the p-type first semiconductor layer; A p-type electrode on the p-type first semiconductor layer; An n-type electrode on the n-type first semiconductor layer, and the entire active layer may be a depletion region.

For example, the active layer includes a plurality of PIN structures that are repeatedly stacked, and each of the plurality of PIN structures includes an n-type second semiconductor layer; a p-type second semiconductor layer; And a first intrinsic semiconductor layer disposed between the n-type second semiconductor layer and the p-type second semiconductor layer.

For example, at least one of the n-type second semiconductor layer, the first intrinsic semiconductor layer, and the p-type second semiconductor layer may be a superlattice layer.

For example, the active layer may further include a second intrinsic semiconductor layer disposed between adjacent PIN structures of the plurality of PIN structures. The second intrinsic semiconductor layer may be a super lattice layer.

For example, the active layer includes a plurality of PN structures that are repeatedly stacked, and each of the plurality of PN structures includes an n-type third semiconductor layer; And a p-type third semiconductor layer on the n-type third semiconductor layer.

For example, the n-type third semiconductor layer and the p-type third semiconductor layer may have the same thickness.

For example, each of the n-type third semiconductor layer and the p-type third semiconductor layer may be a super lattice layer.

For example, the active layer can absorb light having a wavelength band of 280 nm or less.

The semiconductor device according to the embodiment has a wide response area because the depletion layer region is wide, and it is not necessary to apply a negative bias during driving.

1 is a plan view of a light receiving element according to an embodiment.
2 is a cross-sectional view taken along the line I-I 'shown in FIG.
3 is a cross-sectional view of the active layer shown in FIG. 2 according to an embodiment of the present invention.
FIG. 4 shows a cross-sectional view of another embodiment of the active layer shown in FIG.
5 shows a cross-sectional view of another embodiment of the active layer shown in FIG.
FIG. 6A shows an energy band diagram of a light receiving element according to a comparative example, and FIG. 6B shows an energy band diagram of a light receiving element according to an embodiment.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings in order to facilitate understanding of the present invention. However, the embodiments according to the present invention can be modified into various other forms, and the scope of the present invention should not be construed as being limited to the embodiments described below. Embodiments of the invention are provided to more fully describe the present invention to those skilled in the art.

In the description of the embodiment according to the present invention, in the case of being described as being formed on the "upper" or "on or under" of each element, on or under includes both elements being directly contacted with each other or one or more other elements being indirectly formed between the two elements. Also, when expressed as "on" or "on or under", it may include not only an upward direction but also a downward direction with respect to one element.

It is also to be understood that the terms "first" and "second," "upper / upper / upper," and "lower / lower / lower" But may be used only to distinguish one entity or element from another entity or element, without necessarily requiring or implying an order.

Hereinafter, the semiconductor device 100 according to the embodiment will be described using a Cartesian coordinate system, but the embodiment is not limited to this. That is, according to the Cartesian coordinate system, the x-axis, the y-axis and the z-axis are orthogonal to each other, but the embodiment is not limited to this. That is, the x-axis, the y-axis, and the z-axis may cross each other instead of being orthogonal.

In addition, the semiconductor device according to the embodiment may be implemented using a semiconductor and may mean various devices. For example, the semiconductor device according to the embodiment may mean a light receiving element or a light emitting element. Here, the light emitting device is implemented using a semiconductor and may mean a light emitting diode, a laser diode, or the like. The light receiving element may also be implemented using a semiconductor and may mean a light receiving diode or a solar cell. In addition, the semiconductor device according to the embodiment is not necessarily made of a semiconductor, and may further include a metal material in some cases. Therefore, the light receiving element described below is a kind of semiconductor element that can be implemented using a semiconductor.

FIG. 1 is a plan view of a light receiving element 100 according to an embodiment, and FIG. 2 is a cross-sectional view taken along a line I-I 'shown in FIG.

1 and 2, a light receiving device 100 according to an embodiment includes a substrate 110, a buffer layer 120, an n-type first semiconductor layer 130, a p-type first semiconductor layer 140, A second electrode 150, a first electrode 160, and a second electrode 170.

A light receiving structure is disposed on the substrate 110. For example, the light receiving structure may be formed on the (0001) plane of the sapphire substrate 110. [

A buffer layer 120 may be further disposed between the substrate 110 and the n-type first semiconductor layer 130.

For example, the buffer layer 120 may be implemented as AlN, and the first thickness t1 of the buffer layer 120 may be 100 nm, but the embodiments are not limited thereto. Optionally, the buffer layer 120 may be omitted.

The light receiving structure may include an n-type first semiconductor layer 130, a p-type first semiconductor layer 140, and an active layer 150.

The n-type first semiconductor layer 130 may be implemented with heavily doped GaN and the second thickness t2 of the n-type first semiconductor layer 130 may be 250 nm, although embodiments are not limited thereto Do not.

The p-type first semiconductor layer 140 may be implemented with heavily doped GaN and the third thickness t3 of the p-type first semiconductor layer 140 may be 30 nm, but embodiments are not limited thereto Do not.

The active layer 150 may be disposed between the n-type first semiconductor layer 130 and the p-type first semiconductor layer 140.

Photon input to the light receiving element 100 generates electron and hole pairs in the active layer 150. The generated electrons and holes may move in opposite directions due to an electric field across the active layer 150, and may be detected as current when they meet with the n-type and p-type electrodes 160 and 170, respectively. Although not shown, a negative terminal and a positive terminal of an ammeter (not shown) are connected to the n-type electrode 160 and the p-type electrode 170, respectively, to measure the current generated in the light receiving element 100 have.

According to an embodiment, the entire active layer 150 may be a depletion region. The active layer 150 can absorb light in the deep ultraviolet wavelength band. For example, the active layer 150 can absorb light having a wavelength band of 280 nm or less. However, the embodiment is not limited to a specific wavelength band of light absorbed in the active layer 150.

For example, the fourth thickness t4 of the active layer 150 may be between 10 Å and several tens of 탆, but the embodiment is not limited to a specific value of the fourth thickness t4.

Each of the n-type first semiconductor layer 130, the p-type first semiconductor layer 140, and the active layer 150 may include a nitride semiconductor.

FIG. 3 shows a cross-sectional view of the active layer 150 shown in FIG. 2, according to an embodiment 150A.

Referring to FIG. 3, the active layer 150A may include a plurality of PIN structures 150A-1 to 150A-K that are repeatedly stacked. Here, K represents a positive integer of 2 or more.

Each of the plurality of PIN structures 150A-1 to 150A-K each includes an n-type second semiconductor layer 152A, a first intrinsic semiconductor layer 154A, and a p-type second semiconductor layer 156A ). Here, 1? K? K.

The first intrinsic semiconductor layer 154A may be disposed between the n-type second semiconductor layer 152A and the p-type second semiconductor layer 156A. The first intrinsic semiconductor layer 154A is not intentionally doped but may have a weak doping concentration.

n-type second semiconductor layer (152A) is _{Al x Ga (1-x)} N can include a semiconductor material having a composition formula of (0 ≤ x ≤ 1), p -type second semiconductor layer (156A) is Al _{y Ga (1-y) N (} 0 ≤ y ≤ 1), may include a semiconductor material having the compositional formula of the first intrinsic semiconductor layer (154A) is _{Al z Ga (1-z)} N (0 ≤ z ≤ 1 ). ≪ / RTI >

The light receiving element 100 may be a back illumination type in which photons are incident on the substrate 110 or a forward illumination type in which they are incident on the p-type first semiconductor layer 140.

If the energy bandgap of the p-type second semiconductor layer 156A and the first intrinsic semiconductor layer 154A are equal to each other, the p-type second semiconductor layer 156A, The carrier may be excited to be absorbed and hardly provided to the first intrinsic semiconductor layer 154A. Therefore, if aluminum (Al) is added to the first intrinsic semiconductor layer 154A, the phenomenon that carriers are absorbed in the p-type second semiconductor layer 156A may be further exacerbated. In order to prevent this, the energy band gap of the p-type second semiconductor layer 156A may be increased to prevent carriers from being absorbed in the p-type second semiconductor layer 156A. Therefore, in order to increase the energy band gap of the p-type second semiconductor layer 156A more than the energy band gap of the first intrinsic semiconductor layer 154A, Al can be added to the p-type second semiconductor layer 156A have. That is, the content z of aluminum contained in the first intrinsic semiconductor layer 154A may be equal to or larger than the content y of the aluminum contained in the p-type second semiconductor layer 156A. However, the energy band gap between the p-type second semiconductor layer 156A and the first intrinsic semiconductor layer 154A is not limited to this. This is because, if the thickness of the p-type second semiconductor layer 156A is sufficiently reduced, the carrier may not be absorbed by the p-type second semiconductor layer 156A.

For example, n-type second semiconductor layer (152A) comprises GaN, and, p-type second semiconductor layer (156A) and a first intrinsic semiconductor layer (154A) each of which Al _{0 .45} Ga _{0 .55} N formula And the like. In addition, as described above, the thickness of the p-type second semiconductor layer 156A may be much thinner than the thickness of the first intrinsic semiconductor layer 154A.

The energy band between the n-type second semiconductor layer 152A, the first intrinsic semiconductor layer 154A, and the p-type second semiconductor layer 156A is changed according to the application of the light-receiving element 100 to the front- The size and thickness of the gap can be determined, and the embodiment is not limited to a specific value of the relative size and thickness of such an energy band gap.

At least one of the n-type second semiconductor layer 152A, the first intrinsic semiconductor layer 154A and the p-type second semiconductor layer 156A may be a super lattice (SL) ) Layer.

The minimum thickness of each of the n-type second semiconductor layer 152A, the first intrinsic semiconductor layer 154A and the n-type second semiconductor layer 156A may be 50 ANGSTROM, 50 ANGSTROM and 10 ANGSTROM, but the embodiments are not limited thereto .

FIG. 4 shows a cross-sectional view of another embodiment 150B of the active layer 150 shown in FIG.

The active layer 150B shown in FIG. 4 may include L-1 second intrinsic semiconductor layers 154C-1 to 154C-L-1 as well as L PIN structures 150B-1 to 150B-L . Here, L represents a positive integer of 2 or more.

Each of the plurality of PIN structures 150B-1 to 150B-L includes an n-type second semiconductor layer 152B, a first intrinsic semiconductor layer 154B, and a p-type second semiconductor layer 156B can do. Here, 1? L? L.

The first intrinsic semiconductor layer 154B may be disposed between the n-type second semiconductor layer 152B and the p-type second semiconductor layer 156B.

The n-type second semiconductor layer 152B, the first intrinsic semiconductor layer 154B and the p-type second semiconductor layer 156B shown in Fig. 4 correspond to the n-type second semiconductor layer 152A shown in Fig. The first intrinsic semiconductor layer 154A, and the p-type second semiconductor layer 156A, respectively.

L-1 second intrinsic semiconductor layers 154C-1 to 154C-L-1 may be disposed between the plurality of PIN structures 150B-1 to 150B-L. That is, the second intrinsic semiconductor layer can be inserted and disposed between adjacent PIN structures. For example, a second intrinsic semiconductor layer 154C-1 is disposed between adjacent PIN structures 150B-1 and 150B-2, and a second intrinsic semiconductor layer 154C-1 is disposed between adjacent PIN structures 150B- The intrinsic semiconductor layer 154C-2 may be disposed and the second intrinsic semiconductor layer 154C-L-1 may be disposed between adjacent PIN structures 150B-L-1 and 150B-L.

4, except that the active layer 150B further includes L-1 second intrinsic semiconductor layers 154C-1 to 154C-L-1, Is the same as the active layer 150A.

Each of the second intrinsic semiconductor layers 154C-1 to 154C-L-1 shown in FIG. 4 may be a super lattice layer SL (or a super junction layer SJ).

FIG. 5 shows a cross-sectional view of another embodiment 150C of the active layer 150 shown in FIG.

Referring to FIG. 5, the active layer 150C may include a plurality of PN structures 150C-1 to 150C-M that are repeatedly stacked. Here, M represents a positive integer of 2 or more.

Each of the plurality of PN structures 150C-1 to 150C-M may include an n-type third semiconductor layer 153 and a p-type third semiconductor layer 155, respectively. Here, 1? M? M.

The n-type third semiconductor layer 153 and the p-type third semiconductor layer 155 may include AlGaN. The p-type third semiconductor layer 155 may be disposed on the n-type third semiconductor layer 153. In addition, the n-type third semiconductor layer 153 and the p-type third semiconductor layer 155 may have the same thickness. At least one of the n-type third semiconductor layer 153 and the p-type third semiconductor layer 155 may be a superlattice layer SL (or a super-junction layer SJ).

Referring again to FIG. 2, the light receiving element 100 may further include a fourth p-type semiconductor layer 180. The p-type fourth semiconductor layer 180 may be disposed between the p-type first semiconductor layer 140 and the active layer 150. For example, the p-type fourth semiconductor layer 180 may be implemented with a grading AlGaN having a concentration gradient, and the fifth thickness t5 of the p-type fourth semiconductor layer 180 may be 15 nm. However, the embodiment is not limited to this. In some cases, the p-type fourth semiconductor layer 180 may be omitted.

The n-type electrode 160 may be disposed on the n-type first semiconductor layer 130 and the p-type electrode 170 may be disposed on the p-type first semiconductor layer 140.

2, the p-type electrode 170 is disposed at the center of the p-type first semiconductor layer 140, but the embodiment is not limited thereto. That is, the p-type electrode 170 is not disposed on the entirety of the p-type first semiconductor layer 140, but the p-type first semiconductor layer (the p- 140). ≪ / RTI >

The n-type electrode 160 may have a single-layer structure or a multi-layer structure. For example, the n-type electrode 160 may include an n-type first layer (not shown) and an n-type second layer (not shown). The n-type first layer may include Ti and be disposed on the n-type first semiconductor layer 130. The n-type second layer includes Al and may be disposed on the first layer.

The p-type electrode 170 may have a single layer or a multi-layer structure. For example, the p-type electrode 170 may include a p-type first layer (not shown) and a p-type second layer (not shown). The p-type first layer includes Ni and is disposed on the p-type first semiconductor layer 140, and the p-type second layer contains Au and can be disposed on the p-type first layer.

Hereinafter, the light receiving element according to the comparative example and the light receiving element according to the embodiment will be described with reference to the accompanying drawings. The light-receiving elements according to the comparative example and the embodiment are different in structure from each other in the active layer 150. That is, the active layer of the light receiving device according to the comparative example includes one PIN structure, and the active layer 150A of the light receiving device according to the embodiment includes the repeatedly stacked PIN structures 150A-1 to 150A- 150A-K). In addition, the energy band diagram described below is a case where the light receiving element is an all-light incident type.

FIG. 6A shows an energy band diagram of the light receiving element according to the comparative example, and FIG. 6B shows an energy band diagram of the light receiving element 100 according to the embodiment including the active layer 150A shown in FIG.

6A and 6B, the horizontal axis represents the distance in the thickness direction (for example, the x axis direction) of the light receiving structure and the vertical axis represents the energy level, respectively. Also, E _C represents the energy level of the conduction band, and E _V represents the energy level of the valence band.

In the case of the light receiving device according to the comparative example, only one PIN structure is included in the active layer, and the depletion region of the active layer has the first width W1 as shown in FIG. 6A.

On the other hand, in the case of the light-receiving device 100 according to the embodiment, the active layer 150A includes a plurality of PIN structures 150A-1 to 150A-K, and the depletion region of the active layer 150A is formed as shown in FIG. And has the same second width W2. Here, the second width W2 is larger than the first width W1.

When the photon hv is incident on the light receiving element 100, the electron-hole pairs increase as the width of the depletion region increases. This is because the main current source in the light receiving element 100 is a photoexcited carrier generated in the depletion region. Considering this, in the light receiving element 100 according to the above-described embodiment, since the active layers 150A, 150B and 150C include a plurality of PIN structures or include a plurality of PN structures, the region of the depletion layer increases , The entire active layer 150 is fully depleted and can have excellent responsiveness.

In the case of the light-receiving device 100 according to the embodiment, the active layer 150 is completely depleted in the zer bias state. Therefore, it is not necessary to apply a negative bias to the light receiving element at the time of driving.

The light emitting device 100 according to the embodiment described above may have peak sensitivity in a visible blind or true solar blind spectral regions. TrueSolar blind detection requires sensitivity at wavelengths below about 300 nm, while visibility blind detection requires sensitivity at wavelengths below about 400 nm. If a TrueSolar blind detector is developed, the light source under the atmosphere can be detected while excluding the sun's interference. These techniques can be applied to fields such as biological absorption spectra, non-visible hydrogen flames, and satellite communications.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, It will be understood that various modifications and applications are possible. For example, each component specifically shown in the embodiments can be modified and implemented. It is to be understood that all changes and modifications that come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.

100: light receiving element 110: substrate
120: buffer layer 130: n-type first semiconductor layer
140: p-type first semiconductor layer 150, 150A, 150B, 150C: active layer
160: first electrode 170: second electrode
150A-1 to 150A-K, 150B-1 to 150B-L: PIN structures
150C-1 to 150C-M: PN structures 152A,. 152B: an n-type second semiconductor layer
153: n-type third semiconductor layer 154A, 154B: first intrinsic semiconductor layer
154C-1 to 154C-L-1: the second intrinsic semiconductor layer
155: p-type third semiconductor layer 156A, 156B: p-type second semiconductor layer
180: p-type fourth semiconductor layer

Claims (9)

an n-type first semiconductor layer;
a p-type first semiconductor layer;
An active layer disposed between the n-type first semiconductor layer and the p-type first semiconductor layer;
A p-type electrode on the p-type first semiconductor layer; And
And an n-type electrode on the n-type first semiconductor layer, wherein the active layer as a whole is a depletion region. The method of claim 1, wherein the active layer comprises a plurality of PIN structures that are repeatedly stacked,
Each of the plurality of PIN structures
an n-type second semiconductor layer;
a p-type second semiconductor layer; And
And a first intrinsic semiconductor layer disposed between the n-type second semiconductor layer and the p-type second semiconductor layer. The semiconductor device according to claim 2, wherein at least one of the n-type second semiconductor layer, the first intrinsic semiconductor layer, and the p-type second semiconductor layer is a superlattice layer. 3. The device according to claim 2, wherein the active layer
And a second intrinsic semiconductor layer disposed between adjacent PIN structures of the plurality of PIN structures. 5. The semiconductor device according to claim 4, wherein the second intrinsic semiconductor layer is a superlattice layer. 2. The device of claim 1, wherein the active layer comprises a plurality of PN structures that are repeatedly stacked,
Each of the plurality of PN structures
an n-type third semiconductor layer; And
And a p-type third semiconductor layer on the n-type third semiconductor layer. The semiconductor device according to claim 6, wherein the n-type third semiconductor layer and the p-type third semiconductor layer have the same thickness. The semiconductor device according to claim 6, wherein each of the n-type third semiconductor layer and the p-type third semiconductor layer is a super lattice layer. The semiconductor device according to claim 1, wherein the active layer absorbs light having a wavelength band of 280 nm or less.

Images