KR20170087561A - Organic light emitting display device - Google Patents

Abstract

An organic light emitting display including a gate electrode having a thin thickness and a second lower electrode disposed simultaneously in the same layer includes a substrate including a plurality of pixel regions each having sub pixel regions and a transmissive region, A gate electrode overlying the active layer on the substrate; a first electrode disposed on the active layer and connected to the first portion of the active layer; a second electrode disposed on the active layer, spaced apart from the first electrode, A second electrode connected to the second portion, a first lower electrode disposed in the sub pixel region on the first and second electrodes, the first lower electrode having a first thickness, the first light emitting layer disposed in the sub pixel region on the first lower electrode, A second lower electrode disposed in the transmissive region on the substrate and positioned in the same layer as the gate electrode and having a second thickness smaller than the first thickness, A first light emitting layer disposed on the transmissive region on the first light emitting layer and an upper electrode disposed on the second light emitting layer. Thus, the number of manufacturing steps can be reduced, and the manufacturing cost of the organic light emitting display device can be reduced.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an organic light-

The present invention relates to an organic light emitting display. More particularly, the present invention relates to an organic light emitting display having a transmissive region.

The flat panel display device is used as a display device for replacing the cathode ray tube display device because of its light weight and thin characteristics. As typical examples of such flat panel display devices, there are a liquid crystal display device and an organic light emitting display device. Among these, the organic light emitting display device has an advantage of being excellent in luminance characteristics and viewing angle characteristics as compared with a liquid crystal display device, and it can be realized as an ultra thin type because it does not require a backlight. Such an organic light emitting display uses a phenomenon in which excitons are formed by recombination of electrons and holes injected through an anode and a cathode into an organic thin film and light of a specific wavelength is generated by energy from the excitons formed.

Recently, a transparent display device having a transmissive region and capable of transmitting an image of an object located on the rear surface of the organic light emitting display device has been developed. Here, since the organic light emitting display device includes the transmissive region, the aperture ratio of the pixel can be relatively reduced. In addition, since the transmissive region of the organic light emitting display device performs only the function of transmitting external light, the organic light emitting display having the reduced aperture ratio operates in a high luminance driving mode in order to realize a video image of the level of the conventional organic light emitting display . As a result, there is a problem that the lifetime of a pixel of the organic light emitting display device is drastically reduced and the power consumption of the organic light emitting display device is increased.

It is an object of the present invention to provide an organic light emitting diode display having a light emitting layer in a transmissive region.

However, the present invention is not limited to the above-mentioned objects, but may be variously expanded without departing from the spirit and scope of the present invention.

According to an exemplary embodiment of the present invention, there is provided an organic light emitting display including a substrate including a plurality of pixel regions each having sub pixel regions and a transmissive region, An active layer disposed in the active layer, a gate electrode overlying the active layer on the substrate, a first electrode disposed on the active layer and connected to the first portion of the active layer, A first lower electrode disposed on the sub-pixel region on the first and second electrodes and having a first thickness, a second lower electrode disposed on the second sub- A first light emitting layer disposed in a sub pixel region on an electrode, a first light emitting layer disposed in a transmission region on the substrate and positioned in the same layer as the gate electrode, A second lower electrode for transmitting light, a second light emitting layer disposed in a transmissive region on the first lower electrode, and an upper electrode disposed on the first light emitting layer and the second light emitting layer. have.

In exemplary embodiments, the thickness of the second lower electrode may be equal to the thickness of the gate electrode, and the second lower electrode and the gate electrode may comprise the same material and may be formed at the same time.

In exemplary embodiments, the gate electrode may be disposed on the active layer.

The gate insulating layer extending in the first direction in a direction parallel to the top surface of the substrate on the substrate and covering the active layer, the gate insulating layer extending in the first direction on the gate insulating layer, A first interlayer insulating layer covering the gate electrode in the sub pixel region and a first opening exposing a part of the second lower electrode in the transmissive region, and a second interlayer insulating layer extending in the first direction on the first interlayer insulating layer And a second opening exposing a portion of the second lower electrode in the transmissive region, and a planarization layer covering the first and second electrodes in the sub pixel region.

In exemplary embodiments, the gate insulating layer may include a gate interconnection disposed on the first interlayer insulating layer and transmitting a gate signal to the gate electrode, the gate interconnection having a thickness greater than the thickness of the gate electrode, And a third opening that is disposed between the planarization layer and extends in the first direction on the first interlayer insulating layer and exposes a portion of the second lower electrode in the transmissive region, And a second interlayer insulating layer covering the wiring.

In exemplary embodiments, the planarization layer covers the sidewall of the first opening of the first interlayer insulating layer in the transmissive region, and may contact the upper surface of the gate insulating layer.

In exemplary embodiments, the size of the second opening may be smaller than the size of the first opening.

In exemplary embodiments, the gate insulating layer and the first interlayer insulating layer include an inorganic material, and the planarizing layer may include an organic material.

In the exemplary embodiments, the second electrode may extend in a second direction opposite to the first direction on the first interlayer insulating layer, and may overlap with at least a part of the second lower electrode.

In the exemplary embodiments, the first interlayer insulating layer in the overlapped portion includes a first contact hole exposing a part of the second lower electrode, and the second interlayer insulating layer in the overlapping portion includes And a second contact hole exposing the first contact hole, wherein the second electrode fills the first and second contact holes in the overlapping portion and is in contact with the second lower electrode.

In exemplary embodiments, in a portion where the second electrode and the first lower electrode overlap, the planarization layer includes a third contact hole, the first lower electrode fills the third contact hole, And can be contacted with the second electrode.

In exemplary embodiments, the active layer may be disposed on the gate electrode.

In exemplary embodiments, the substrate includes a first opening extending in a first direction parallel to an upper surface of the substrate on the substrate, the first opening exposing a portion of the second lower electrode in the transmissive region, A gate insulating layer covering the gate electrode in the pixel region, and a second opening extending in the first direction on the gate insulating layer and exposing a part of the second lower electrode in the transmissive region, And a third opening extending in the first direction on the interlayer insulating layer and exposing a portion of the second lower electrode in the transmissive region, wherein the planarization layer covering the first and second electrodes Wherein the planarizing layer is formed on the sidewall of the first opening of the gate insulating layer and the side wall of the second opening of the interlayer insulating layer in the transmissive region, Was covered, it can be brought into contact with the upper surface of the gate insulating layer.

In exemplary embodiments, the size of the third opening may be smaller than the size of each of the first and second openings.

In exemplary embodiments, the gate insulating layer and the interlayer insulating layer include an inorganic material, and the planarizing layer may include an organic material.

In the exemplary embodiments, the second electrode extends on the interlayer insulating layer in a second direction opposite to the first direction, overlaps with at least a part of the second lower electrode, Wherein the gate insulating layer includes a first contact hole exposing a portion of the second lower electrode, and the interlayer insulating layer in the overlapping portion includes a second contact hole exposing the first contact hole, The second electrode fills the first and second contact holes in the overlapped portion and contacts the second lower electrode. In a portion where the second electrode overlaps with the first lower electrode, the planarization layer contacts the third contact hole And the first lower electrode fills the third contact hole and can contact the second electrode.

In the exemplary embodiments, the first light emitting layer emits light in a direction perpendicular to an upper surface of the substrate, the second light emitting layer has a direction perpendicular to the upper surface of the substrate, a direction perpendicular to the upper surface of the substrate, It is possible to emit light in the opposite direction.

In exemplary embodiments, the first lower electrode reflects light emitted from the first light emitting layer, and the second lower electrode may transmit light emitted from the second light emitting layer.

In exemplary embodiments, the second light emitting layer may emit white light.

In exemplary embodiments, when the second light emitting layer does not emit light, an image of an object positioned on the rear surface of the organic light emitting display may be transmitted through the transmissive region.

The OLED display according to the exemplary embodiments of the present invention includes a second lower electrode that is simultaneously disposed on the same layer as the gate electrode, thereby reducing the number of manufacturing steps of the OLED display, Can be reduced. Further, since the first interlayer insulating layer is arranged to have a small thickness, the capacitance of the storage capacitor constituted by the gate electrode and the gate wiring can be increased. Furthermore, since the gate electrode has a small thickness, the breakage of the first interlayer insulating layer covering the gate electrode can be reduced. On the other hand, the organic light emitting display may include a second light emitting layer. Thus, rapid deterioration of a pixel included in the organic light emitting display device can be prevented. Further, the second light emitting layer emits white light, so that the power consumption of the OLED display device can be reduced.

The organic light emitting display according to the exemplary embodiments of the present invention includes the second lower electrode which is simultaneously disposed on the same layer as the gate electrode and has a thickness smaller than the thickness of the gate electrode, Thereby reducing the manufacturing cost of the OLED display. Further, the organic light emitting display may include a second light emitting layer. Thus, rapid deterioration of a pixel included in the organic light emitting display device can be prevented. Further, the second light emitting layer emits white light, so that the power consumption of the organic light emitting display device can be reduced.

However, the effects of the present invention are not limited to the above-described effects, and can be variously extended without departing from the spirit and scope of the present invention.

1 is a plan view showing an organic light emitting diode display according to exemplary embodiments of the present invention.
FIG. 2 is a cross-sectional view of the organic light emitting diode display of FIG. 1 taken along the line I-I '.
3 is a cross-sectional view illustrating the first lower electrode of FIG.
FIGS. 4 to 10 are cross-sectional views illustrating a method of manufacturing an organic light emitting display according to exemplary embodiments of the present invention.
10 is a cross-sectional view illustrating an organic light emitting diode display according to exemplary embodiments of the present invention.
11 is a cross-sectional view showing an organic light emitting diode display according to exemplary embodiments of the present invention.
12 is a cross-sectional view illustrating an organic light emitting diode display according to exemplary embodiments of the present invention.
13 is a cross-sectional view illustrating an organic light emitting diode display according to exemplary embodiments of the present invention.
14 is a cross-sectional view illustrating an organic light emitting diode display according to exemplary embodiments of the present invention.

Hereinafter, an organic light emitting diode (OLED) display device and a method of manufacturing an OLED display according to exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the accompanying drawings, the same or similar reference numerals are used for the same or similar components.

1 is a plan view showing an organic light emitting diode display according to exemplary embodiments of the present invention.

Referring to FIG. 1, the OLED display 100 may have a plurality of pixel regions. One pixel region 10 may include a sub pixel region II and a transmissive region III. For example, the pixel regions 10 may be arranged entirely on the substrate along a first direction parallel to the top surface of the substrate included in the OLED display 100 described later and a direction orthogonal to the first direction .

The first to third sub pixels 15, 20 and 25 may be arranged in the sub pixel region II. For example, the first sub-pixel 15 may emit red light, the second sub-pixel 20 may emit green light, and the third sub-pixel 25 may emit blue light . The first to third sub pixels 15, 20, and 25 may be substantially surrounded by the pixel defining layer 310.

A transmissive window may be located in the transmissive region III. The transmissive window may be substantially surrounded by the pixel defining layer 310. The light incident from the outside can be transmitted through the transmission window. In the exemplary embodiments, the fourth sub-pixel 35 may also be arranged in the transmissive region III. The fourth sub-pixel 35 may be surrounded by the planarization layer 270. In order for the light to pass through the transmissive region III, the fourth subpixel 35 has a thickness that is relatively thinner than the thickness of the first lower electrode included in the first to third subpixels 15, 20, And a second lower electrode having a second electrode. In addition, the fourth sub-pixel 35 can emit white light. Alternatively, the fourth sub-pixel 35 may emit red light, green light or blue light. Accordingly, light can be emitted by the fourth sub-pixel 35 even in the transmissive region III of the OLED display 100. [

However, the structure of the present invention is not limited thereto, and a plurality of pixel regions may be shared with one transmissive region. Further, although the arrangement of the plurality of pixel regions is shown as being regularly arranged, the pixel regions may be arranged irregularly.

FIG. 2 is a cross-sectional view taken along line I-I 'of FIG. 1, and FIG. 3 is a cross-sectional view illustrating the first lower electrode of FIG.

2 and 3, the OLED display 100 includes a substrate 110, a semiconductor device 250, a gate wiring 180, a planarization layer 270, a first lower electrode 290, The second light emitting layer 335, the upper electrode 340, the sealing substrate 350, and the like. Here, the semiconductor device 250 includes an active layer 130, a gate electrode 170, a first electrode 210 and a second electrode 230, a gate insulating layer 150, a first interlayer insulating layer 190, And may include a second interlayer insulating layer 195. Also, the first lower electrode 290 may have a first thickness, and the second lower electrode 360 may have a second thickness that is less than the first thickness.

As described above, the OLED display 100 may include a plurality of pixel regions. The one pixel region may include a sub-pixel region I and a transmissive region II.

The semiconductor element 250, the first lower electrode 290, the first light emitting layer 330, and the like may be disposed in the sub pixel region I '. The second lower electrode 360, the second light emitting layer 335, and the like may be disposed in the transmissive region II. Meanwhile, the upper electrode 340 may be disposed entirely in the sub pixel region I and the transmissive region II.

An image can be displayed in the sub pixel region I and light can be emitted by the second light emitting layer 335 even in the transmissive region II. However, the second light emitting layer 335 and the second lower electrode 360 may be substantially transparent. Accordingly, in the transmissive region II, when the semiconductor device 250 is inactivated (for example, the first light emitting layer 330 and the second light emitting layer 335 are turned off) The image of the object positioned on the rear side of the display device can be transmitted. With this transmissive region II, the OLED display 100 can function as a transparent display device.

The semiconductor device 250 may be disposed on the substrate 110. The substrate 110 may be composed of a transparent material. For example, the substrate 110 can be a quartz substrate, a synthetic quartz substrate, a calcium fluoride substrate, a fluorine-doped quartz substrate, a sodalime substrate, a non-alkali ) Substrate, and the like. Alternatively, the substrate 110 may be made of a transparent resin substrate having flexibility. An example of a transparent resin substrate that can be used as the substrate 110 is a polyimide substrate. In this case, the polyimide substrate may be composed of a first polyimide layer, a barrier film layer, a second polyimide layer, or the like. For example, the polyimide substrate may have a configuration in which a first polyimide layer, a barrier film layer, and a second polyimide layer are laminated on a hard glass substrate. (For example, a semiconductor device 250, a second lower electrode (for example, a semiconductor device), and a second insulating film (for example, a semiconductor device) may be formed on a second polyimide layer of the polyimide substrate, The second light emitting layer 335, the first lower electrode 290, the first light emitting layer 330, the upper electrode 340, and the like) may be disposed. After formation of such a pixel structure, the hard glass substrate can be removed. That is, since the polyimide substrate is thin and flexible, it may be difficult to directly form the light emitting structures on the polyimide substrate. In consideration of this point, the light emitting structure may be formed using the hard glass substrate, and then the glass substrate may be removed, so that the polyimide substrate may be used as the substrate 110. The organic light emitting display 100 may include the sub pixel region I and the transmissive region II so that the substrate 110 may be divided into the sub pixel region I and the transmissive region II.

A buffer layer (not shown) may be disposed on the substrate 110. The buffer layer may be disposed entirely on the substrate 110. The buffer layer can prevent metal atoms and impurities from diffusing from the substrate 110 and control the heat transfer rate during the crystallization process to form the active layer 130 to provide a substantially uniform active layer 130 Can be obtained. In addition, the buffer layer can improve the flatness of the surface of the substrate 110 when the surface of the substrate 110 is not uniform. Depending on the type of substrate 110, more than one buffer layer may be provided on the substrate 110, or the buffer layer may not be disposed.

The semiconductor device 250 includes an active layer 130, a gate electrode 170, a first electrode 210, a second electrode 230, a gate insulating layer 150, a first interlayer insulating layer 190, An interlayer insulating layer 195, and may be disposed in the sub pixel region I on the substrate 110.

The active layer 130 may be disposed in the sub pixel region I on the substrate 110. For example, the active layer 130 may include an oxide semiconductor, an inorganic semiconductor (for example, amorphous silicon, poly silicon), an organic semiconductor, or the like.

A gate insulating layer 150 may be disposed on the active layer 130. The gate insulating layer 150 is formed on the substrate 110 in a first direction parallel to the upper surface of the substrate 110 (for example, from the transmissive region II to the sub pixel region I) . The gate insulating layer 150 may cover the active layer 130 in the sub pixel region I and may be disposed entirely on the substrate 110. [ For example, the gate insulating layer 150 may sufficiently cover the active layer 130 and may have a substantially planar top surface without creating a step around the active layer 130. Alternatively, the gate insulating layer 150 may cover the active layer 130 and may be disposed with a substantially uniform thickness along the profile of the active layer 130. The gate insulating layer 150 may include a silicon compound, a metal oxide, or the like. For example, the gate insulating layer 150 may be formed of a material selected from the group consisting of silicon oxide (SiOx), silicon nitride (SiNx), silicon oxynitride (SiOxNy), silicon oxycarbide (SiOxCy), silicon carbonitride (SiCxNy) , Aluminum oxide (AlOx), aluminum nitride (AlNx), tantalum oxide (TaOx), hafnium oxide (HfOx), zirconium oxide (ZrOx), titanium oxide (TiOx) and the like. In the exemplary embodiments, the gate insulating layer 150 may comprise an inorganic material.

The gate electrode 170 may be disposed on the gate insulating layer 150. The gate electrode 170 may be located on a portion of the gate insulating layer 150 in the sub pixel region I where the active layer 130 is located. In the exemplary embodiments, the gate electrode 170 may have a relatively thin thickness (e.g., a second thickness) and may be substantially transparent. Since the thickness of the gate electrode 170 is thin, the wiring resistance can be increased. Accordingly, the gate electrode 170 may not serve as a wiring for transmitting the gate signal of the OLED display 100, and may function as a gate electrode for switching the active layer 130. For example, the gate signal of the organic light emitting display 100 may be transmitted by the gate wiring 180, the gate wiring 180 may be electrically connected to the gate electrode 170, May provide the gate signal to the gate electrode 170.

The second lower electrode 360 may be disposed apart from the gate electrode 170 in the transmissive region II on the gate insulating layer 150 and a part of the sub pixel region I. In the exemplary embodiments, the second lower electrode 360 may be located on the same layer as the gate electrode 170, and may be formed simultaneously, including the same material. The second lower electrode 360 and the gate electrode 170 may have the same thickness and the second lower electrode 360 may transmit light. For example, in the transmissive region II, external light may be transmitted. When the organic light emitting display 100 has a high transmittance in the transmissive region II, the image of the object located on the rear surface of the organic light emitting display 100 can be clearly seen. Therefore, in order that the organic light emitting diode display 100 has a high transmittance in the transmissive region II, no electrode, wiring, semiconductor element, or the like capable of reducing the transmittance is disposed in the transmissive region II on the substrate 110 . However, even if the second lower electrode 360 is disposed in the transmissive region II, the second lower electrode 360 is thin and substantially transparent, so that the transmittance of the OLED display 100 is not significantly reduced .

As described above, the organic light emitting diode display 100 can be manufactured in the transmissive region II in a double-sided light emitting manner to transmit external light in the transmissive region II. That is, the second lower electrode 360 may be transparent. For example, the light emitted from the second light emitting layer 335 may be incident on the rear surface of the OLED display 100 (e.g., the fourth direction perpendicular to the first direction and the second direction opposite to the first direction) Direction). Each of the gate electrode 170 and the second lower electrode 360 may include a metal, a metal alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like. For example, each of the gate electrode 170 and the second lower electrode 360 may be formed of a metal such as gold (Au), silver (Ag), aluminum (Al), platinum (Pt), nickel (Ni), titanium (Pd), magnesium (Mg), calcium (Ca), lithium (Li), chromium (Cr), tantalum (Ta), molybdenum (Mo), scandium (Sc), neodymium (Nd) (AlNx), an alloy containing silver, tungsten (W), tungsten nitride (WNx), an alloy containing copper, an alloy containing molybdenum, a titanium nitride (TiNx), an aluminum- Tantalum nitride (TaNx), strontium ruthenium oxide (SrRuxOy), zinc oxide (ZnOx), indium tin oxide (ITO), tin oxide (SnOx), indium oxide (InOx), gallium oxide (GaOx), indium zinc oxide (IZO) And the like.

Although the second lower electrode 360 of the organic light emitting diode display 100 includes a single layer structure, the structure of the present invention is not limited thereto. The second lower electrode 360 may include a multi-layer structure It is possible. The second lower electrode 360 is formed on the same layer as the gate electrode 170. However, the structure of the present invention is not limited thereto. The second lower electrode 360 may be formed on the active layer 130, May be formed at the same time in the same layer.

The first interlayer insulating layer 190 may be disposed on the gate electrode 170 and the second lower electrode 360. The first interlayer insulating layer 190 may extend in the first direction on the gate insulating layer 150 and may include a first opening exposing a portion of the second lower electrode 360 in the transmissive region II And may cover the gate electrode 170 in the sub pixel region I. For example, the first interlayer insulating layer 190 may sufficiently cover the gate electrode 170, and may have a substantially flat upper surface without generating a step around the gate electrode 170. Alternatively, the first interlayer insulating layer 190 may cover the gate electrode 170 and be disposed at substantially the same thickness along the profile of the gate electrode 170 with a uniform thickness. In the exemplary embodiments, the breakage of the first interlayer insulating layer 190 at the portion that covers the gate electrode 170 having a relatively thin thickness can be greatly reduced. For example, when the thickness of the conventional gate electrode is relatively thick and the first interlayer insulating layer is disposed at substantially the same thickness along the profile of the gate electrode having the thick thickness, The first interlayer insulating layer may break frequently in a portion covering the organic light emitting display device 100, and the organic light emitting display device 100 may be defective. On the other hand, the gate electrode 170 according to the exemplary embodiments of the present invention has a relatively thin thickness, so that the breakage of the first interlayer insulating layer 190 can be greatly reduced. In addition, the gate electrode and the gate wiring may function as a storage capacitor in another cut surface of the organic light emitting diode display 100. In this case, because of the first interlayer insulating layer 190 having a relatively thin thickness, the distance between the gate electrode functioning as the lower electrode of the storage capacitor and the gate wiring functioning as the upper electrode of the storage capacitor can be reduced . Thus, the capacitance of the storage capacitor can be increased. The first interlayer insulating layer 190 may include a silicon compound, a metal oxide, or the like. In the exemplary embodiments, the first interlayer insulating layer 190 may include an inorganic material.

The gate wiring 180 may be disposed on the first interlayer insulating layer 190. The thickness of the gate wiring 180 may be thicker than the thickness of the gate electrode 170. As described above, the gate wiring 180 can transmit the gate signal of the OLED display 100 to the gate electrode 170. The gate wiring 180 can be connected to the gate electrode 170 while filling the contact hole located in the first interlayer insulating layer 190 and the gate wiring 180 can be connected to the first interlayer insulating layer 190. [ And the gate electrode 170 may be electrically connected to each other. Since the thickness of the gate wiring 180 is relatively larger than the thickness of the gate electrode 170, the gate signal can be transmitted with a relatively low wiring resistance.

A second interlayer insulating layer 195 may be disposed on the gate wiring 180. The second interlayer insulating layer 195 may be located between the first interlayer insulating layer 190 and the planarization layer 270. The second interlayer insulating layer 195 may extend in the first direction on the first interlayer insulating layer 190 and may have an opening that exposes a part of the second lower electrode 360 in the transmissive region II And may cover the gate wiring 180 in the sub-pixel region I, for example. For example, the second interlayer insulating layer 195 may sufficiently cover the gate wiring 180, and may have a substantially flat upper surface without generating a step around the gate wiring 180. Alternatively, the first interlayer insulating layer 190 may cover the gate electrode 170 and be disposed at substantially the same thickness along the profile of the gate electrode 170 with a uniform thickness. The second interlayer insulating layer 195 may include a silicon compound, a metal oxide, or the like. In the exemplary embodiments, the second interlayer insulating layer 195 may include an inorganic material.

The first electrode 210 and the second electrode 230 may be disposed on the second interlayer insulating layer 195. The first electrode 210 and the second electrode 230 pass through a part of the gate insulating layer 150, the first interlayer insulating layer 190 and the second interlayer insulating layer 195, One side and the other side, respectively. For example, the first electrode 210 may extend through a portion of the gate insulating layer 150, the first interlayer insulating layer 190, and the second interlayer insulating layer 195 to form a first portion of the active layer 130 And the second electrode 230 may pass through a portion of the gate insulating layer 150, the first interlayer insulating layer 190 and the second interlayer insulating layer 195 to form a second portion of the active layer 130 Lt; / RTI > The semiconductor device 250 including the active layer 130, the gate electrode 170, the first electrode 210, and the second electrode 230 may be formed.

In the exemplary embodiments, the second electrode 230 may extend in a second direction opposite to the first direction (e.g., in a direction from the sub pixel region I to the transmissive region II) have. The second electrode 230 extending in the second direction may overlap at least part of the second lower electrode 360. In the overlapping portion, the first interlayer insulating layer 190 may include a first contact hole exposing a portion of the second lower electrode 360. In addition, in the overlapped portion, the second interlayer insulating layer 195 may include a second contact hole exposing the first contact hole. The second electrode 230 extending in the second direction fills the first and second contact holes and may contact the second lower electrode 360. Accordingly, the semiconductor device 250 may be electrically connected to the second lower electrode 360. For example, the first electrode 210 may be a source electrode, and the second electrode 230 may be a drain electrode. Alternatively, the first electrode 210 may be a drain electrode, and the second electrode 230 may be a source electrode. Each of the first electrode 210 and the second electrode 230 may include a metal, a metal alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like.

The planarization layer 270 may be disposed on the first electrode 210 and the second electrode 230. The planarization layer 270 may extend in the first direction on the second interlayer insulating layer 195 and may have openings for exposing a portion of the second lower electrode 360 in the transmissive region II And may cover the first electrode 210 and the second electrode 230 in the sub pixel region I. [ For example, the planarization layer 270 is disposed to have a relatively thick thickness enough to cover the first electrode 210 and the second electrode 230, in which case the planarization layer 270 has a substantially planar top surface And a planarization process may be added to the planarization layer 270 to realize a planar upper surface of the planarization layer 270. [ Alternatively, the planarization layer 270 may cover the first electrode 210 and the second electrode 230 and may have substantially uniform thickness along the profile of the first electrode 210 and the second electrode 230, Thickness.

In the exemplary embodiments, the planarization layer 270 is formed to cover the side walls of the first opening of the first interlayer insulating layer 190 and the side walls of the third opening of the second interlayer insulating layer 195 in the transmissive region II And may be in contact with the upper surface of the second lower electrode 360. For example, the planarization layer 270 may not expose the sidewalls of each of the first and third openings. That is, the size (or area) of the second opening of the planarization layer 270 may be smaller than the size of each of the first and third openings. At least a portion of the planarization layer 270 is located on the second lower electrode 360 so that the planarization layer 270 can function as a pixel defining layer in the transmissive region II. For example, in the transmissive region II, the planarization layer 270 may define a portion where the second emission layer 335 is disposed, and the second emission layer 335 may be located in the second opening. The planarization layer 270 may include an organic material or an inorganic material. In exemplary embodiments, the planarization layer 270 may comprise an organic material. For example, the planarization layer 270 may be formed of a photoresist, a polyacrylic resin, a polyimide resin, a polyamide resin, a siloxane resin, an acrylic resin, an epoxy resin, or the like.

The first lower electrode 290 may be disposed on the planarization layer 270. The first lower electrode 290 may be disposed in the sub pixel region I on the planarization layer 270 and may have a first thickness that is thicker than the second thickness of the second lower electrode 360. The first lower electrode 290 may be connected to the second electrode 230 through the contact hole of the planarization layer 270. In addition, the first lower electrode 290 may be electrically connected to the semiconductor device 250. The organic light emitting display 100 may be fabricated in a top emission mode in the sub pixel region I. Accordingly, the first lower electrode 290 may include a light reflecting layer. For example, as shown in FIG. 3, the first lower electrode 290 may have a multi-layer structure. The multi-layer structure may include first to third electrode films 291, 292 and 293. The first electrode film 291 may be disposed in the sub pixel region I on the planarization layer 270 and the second and third electrode films 292 and 293 may be disposed on the first electrode film 291 in sequence As shown in FIG. Here, the first and third electrode films 291, 292 and 293 may include substantially the same material, and the second electrode film 292 may include substantially the same material as the first and third electrode films 291 and 293 As shown in FIG. Each of the thicknesses of the first and third electrode films 291 and 293 may be substantially thinner than the thickness of the second electrode film 292 and the thickness of the first and third electrode films 291 and 293 may be Can be substantially the same as each other.

The first electrode layer 291 may cover the uneven upper surface of the planarization layer 270. The first electrode film 291 is disposed on the planarization layer 270 to help form the second electrode film 292. [ The third electrode film 293 is disposed on the second electrode film 292, so that the color coordinates of the OLED display 100 can be easily adjusted. And the second electrode film 292 can function as the light reflection layer. The second electrode layer 292 may reflect the light emitted from the first light emitting layer 330 in the front surface of the OLED display 100 (e.g., a third direction opposite to the fourth direction). Accordingly, the first lower electrode 290 including the second electrode film 292 may be substantially opaque. Alternatively, the first lower electrode 290 may have a multi-layer structure including the first electrode layer 291 and the second electrode layer 292 and may have a single-layer structure including the second electrode layer 292 May also be configured. For example, the second electrode film 292 may be formed of a metal alloy, a metal nitride, a conductive metal oxide, or the like. Each of the first and third electrode films 291 and 293 may be substantially transparent. For example, each of the first and third electrode films 291 and 293 may include a transparent conductive material or the like.

Referring again to FIG. 2, the pixel defining layer 310 may be disposed on the planarization layer 270 while exposing at least a portion of the first lower electrode 290 and the second lower electrode 360. For example, the pixel defining layer 310 may cover both sides of the first lower electrode 290 and may expose the second opening of the planarization layer 270. In this case, the first and second light emitting layers 330 and 335 may be positioned on the first and second lower electrodes 290 and 360, respectively, at least partially exposed by the pixel defining layer 310. Here, the opening for exposing the second lower electrode 295 formed in the transmissive region III may correspond to the transmissive window of FIG. The pixel defining layer 310 may be formed of an organic material or an inorganic material. In the exemplary embodiments, the pixel defining layer 310 may comprise an organic material.

The first light emitting layer 330 (e.g., the light emitting layer included in the first sub-pixel 15 of FIG. 1) may be disposed on the first lower electrode 290 at least partially exposed. The first light emitting layer 330 may include at least one of light emitting materials capable of emitting different color lights (i.e., red light, green light, blue light, and the like) in the third direction according to the first through third sub- May be formed using one. Alternatively, the first light emitting layer 330 may emit white light as a whole by laminating a plurality of light emitting materials capable of generating other color light such as red light, green light, and blue light. In this case, the color filter may be disposed on the first light emitting layer 330, and the color filter may not be disposed in the transmissive region III. The color filter may include at least one of a red color filter, a green color filter, and a blue color filter. Optionally, the color filter may include a yellow color filter, a cyan color filter, and a magenta color filter. The color filter may be composed of a photosensitive resin.

The second light emitting layer 335 (for example, the light emitting layer included in the fourth sub-pixel 35 in FIG. 1) may be disposed on the second lower electrode 360 at least partially exposed. The second light emitting layer 335 may emit white light according to the fourth sub-pixel illustrated in FIG. The second light emitting layer 335 may be controlled by the semiconductor element 250. For example, when the semiconductor element 250 is activated, the second light emitting layer 335 may emit the white light in the third direction and the fourth direction. When the semiconductor device 250 is deactivated, an image of an object positioned on the rear surface of the organic light emitting display 100 can be transmitted through the transmission region II. Accordingly, light can be emitted by the second light emitting layer 335 even in the transmissive region II of the OLED display 100. [ The second light emitting layer 335 may have a tandem structure to emit white light. For example, the second light emitting layer 335 may include a red light emitting layer, a green light emitting layer, and a blue light emitting layer, and a charge generation layer CGL may be formed between the red light emitting layer and the green light emitting layer, Can be intervened. For example, the red light emitting layer, the first charge generating layer, the green light emitting layer, the second charge generating layer, and the blue light emitting layer may be disposed in this order on the second lower electrode 360. Alternatively, the charge generating layer may be disposed on at least one of the red light emitting layer and the green light emitting layer and between the green light emitting layer and the blue light emitting layer. In other exemplary embodiments, the second light emitting layer 335 may emit white light as a whole by mixing a plurality of light emitting materials capable of generating other color light such as red light, green light, and blue light. For example, the second light emitting layer 335 may emit blue light and yellow light using a blue fluorescent material and a yellow-green fluorescent material, and they may be mixed to realize white light. In addition, various color lights may be emitted by adjusting the mixing ratio of the light emitting materials. For example, the light emitting materials may emit light of colors such as yellow, violet, and sky blue. Alternatively, the second light emitting layer 335 may emit red light, green light, or blue light in the same manner as the first light emitting layer 330.

The upper electrode 340 may be disposed on the pixel defining layer 310 and the first and second light emitting layers 330 and 335. The upper electrode 340 may cover the pixel defining layer 310 and the first and second light emitting layers 330 and 335 in the sub pixel region I and the transmissive region II. That is, the upper electrode 340 may be shared by the first and second light emitting layers 330 and 335. The upper electrode 340 may be formed of a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like. These may be used alone or in combination with each other.

An encapsulation substrate 350 may be disposed on the upper electrode 340. The encapsulation substrate 350 may be substantially composed of the same material as the substrate 110. For example, the sealing substrate 350 may include a quartz substrate, a synthetic quartz substrate, a calcium fluoride or fluorine-doped quartz substrate, a soda lime substrate, a non-alkali substrate, or the like. In other exemplary embodiments, the encapsulation substrate 350 may be composed of a transparent inorganic material or a flexible plastic. For example, the sealing substrate 350 may include a transparent resin substrate having flexibility. In this case, in order to improve the flexibility of the OLED display 100, at least one inorganic layer and at least one organic layer may be alternately stacked.

The organic light emitting diode display 100 according to the exemplary embodiments of the present invention includes the second lower electrode 360 disposed in the same layer as the gate electrode 170, It is possible to reduce the number of process steps (for example, the number of mask processes), thereby reducing the manufacturing cost of the OLED display 100. In addition, since the first interlayer insulating layer 190 is arranged to have a small thickness, the capacitance of the storage capacitor formed of the gate electrode 170 and the gate wiring 180 can be increased. Furthermore, since the gate electrode 170 has a small thickness, the breakage of the first interlayer insulating layer 190 covering the gate electrode 170 can be reduced. Meanwhile, the OLED display 100 may include a second emission layer 335. Accordingly, rapid deterioration of the pixels included in the OLED display 100 can be prevented. Further, the second light emitting layer 335 emits white light, so that the power consumption of the OLED display 100 can be reduced.

FIGS. 4 to 10 are cross-sectional views illustrating a method of manufacturing an organic light emitting display according to exemplary embodiments of the present invention.

Referring to FIG. 4, an active layer 530 may be formed in the sub pixel region I of the substrate 510. The active layer 530 may be formed using an oxide semiconductor, an inorganic semiconductor, an organic semiconductor, or the like. The substrate 510 may be formed using glass, a quartz substrate, a synthetic quartz substrate, a calcium fluoride or a fluorine-doped quartz substrate, a soda lime substrate, a non-alkali substrate, or the like. Alternatively, a buffer layer may be formed on the substrate 510. The buffer layer may extend in a first direction parallel to the top surface of the substrate 510 on the substrate 510. That is, the buffer layer can be formed entirely on the substrate 510, and diffusion of metal atoms or impurities from the substrate 510 can be prevented. A gate insulating layer 550 may be formed on the substrate 510. The gate insulating layer 550 may cover the active layer 530 and extend in the first direction on the substrate 510. A gate insulating layer 550 may be formed entirely in the sub pixel region I and the transmissive region II on the substrate 510. [ The gate insulating layer 550 may be formed using a silicon compound, a metal oxide, or the like.

The gate electrode 570 may be formed on a portion of the gate insulating layer 550 below the active layer 530. The second lower electrode 760 may be formed apart from the gate electrode 570 in the transmissive region II on the gate insulating layer 550 and a part of the sub pixel region I. In the exemplary embodiments, the second lower electrode 760 may be located in the same layer as the gate electrode 570, and may be formed simultaneously, including the same material. In addition, the second lower electrode 760 and the gate electrode 570 may have the same thickness (e.g., the second thickness), and the second lower electrode 760 may transmit the light. In the exemplary embodiments, the second lower electrode 760 may be substantially transparent.

Each of the gate electrode 570 and the second lower electrode 760 may include a metal, a metal alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like. For example, each of the gate electrode 570 and the second lower electrode 760 may be formed of a metal such as gold, silver, aluminum, platinum, nickel, titanium, palladium, magnesium, calcium, lithium, chromium, tantalum, molybdenum, scandium, neodymium , Iridium, alloys containing aluminum, aluminum nitrides, alloys containing silver, tungsten, tungsten nitride, alloys containing copper, alloys containing molybdenum, titanium nitride, tantalum nitride, strontium ruthenium oxide, zinc oxide, Indium tin oxide, tin oxide, indium oxide, gallium oxide, indium zinc oxide, or the like.

Referring to FIG. 5, a preliminary first interlayer insulating layer 591 may be formed on the gate electrode 570 and the second lower electrode 760. The preliminary first interlayer insulating layer 591 may extend in the first direction on the gate insulating layer 550 to cover the gate electrode 570 and the second lower electrode 760. That is, on the gate insulating layer 550.

The gate wiring 580 may be formed on the preliminary first interlayer insulating layer 591. [ The thickness of the gate wiring 580 may be thicker than the thickness of the gate electrode 570. The gate wiring 580 can transfer the gate signal of the organic light emitting display device to the gate wiring 580.

A preliminary second interlayer insulating layer 596 may be formed on the gate wiring 580. The preliminary second interlayer insulating layer 596 may cover the gate wiring 580 and extend in the first direction on the preliminary first interlayer insulating layer 591. [ That is, the preliminary second interlayer insulating layer 596 may be formed entirely on the preliminary first interlayer insulating layer 591. [

5 and 6, an opening may be formed in the transmissive region II in the preliminary first interlayer insulating layer 591 and the preliminary second interlayer insulating layer 596, 1 through third contact holes may be formed. Accordingly, the first interlayer insulating layer 590 and the second interlayer insulating layer 595 can be formed. The first interlayer insulating layer 590 may include a first opening exposing a portion of the second lower electrode 760 in the transmissive region II on the gate insulating layer 550.

In addition, the second interlayer insulating layer 595 may include an opening (e.g., a third opening) that exposes a portion of the second lower electrode 760 in the transmission region II. The first and second interlayer insulating layers 590 and 595 may include a silicon compound, a metal oxide, or the like. In the exemplary embodiments, the first and second interlayer insulating layers 590 and 595 may be formed using an inorganic material.

The first electrode 610 and the second electrode 630 may be formed on the second interlayer insulating layer 595. [

The first electrode 610 and the second electrode 630 may fill the first through third contact holes. For example, a first electrode 610 may fill the third contact hole and be connected to a first portion of the active layer 610, a second electrode 630 may fill the second contact hole, 610). ≪ / RTI > The semiconductor element 550 including the active layer 530, the gate electrode 570, the first electrode 610, and the second electrode 530 may be formed.

In the exemplary embodiments, the second electrode 630 may extend in a second direction opposite to the first direction (e.g., from the sub pixel region I to the transmissive region II) have. The second electrode 630 extending in the second direction may overlap at least part of the second lower electrode 760. In the overlapping portion, the second electrode 630 may fill the first contact hole exposing a portion of the second lower electrode 760 and may be connected to the second lower electrode 760. Accordingly, the semiconductor device 650 can be electrically connected to the second lower electrode 760. [ Each of the first electrode 610 and the second electrode 630 may be formed using a metal, a metal alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like.

7, a preliminary planarization layer 671 may be formed on the first electrode 610 and the second electrode 630, the second interlayer insulating layer 595, and the second lower electrode 760. [ The preliminary planarization layer 671 covers the first electrode 610 and the second electrode 630, the second interlayer insulating layer 595 and the second lower electrode 760, and the first electrode 610 and the second Electrode 630, the second interlayer insulating layer 595, and the second lower electrode 760 in the first direction. After the preliminary planarization layer 671 is formed, the preliminary planarization layer 671 may be provided with a fourth contact hole exposing at least a part of the second electrode 630. The first lower electrode 690 may be formed on the preliminary planarization layer 671 to have a first thickness that is thicker than the second thickness. A first lower electrode 690 may fill the fourth contact hole and be connected to the second electrode 630. Accordingly, the first lower electrode 690 and the semiconductor device 650 can be electrically connected. For example, as shown in FIG. 3, the first lower electrode 690 may have a multi-layer structure. The multi-layer structure may include first to third electrode films. The first electrode film may be disposed in the sub pixel region (I) on the planarization layer, and the second and third electrode films may be disposed in order on the first electrode film. The first lower electrode 690 may be formed using a metal, a metal alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like.

Referring to FIG. 8, a spare pixel defining layer 711 may be formed on the preliminary planarization layer 671. The preliminary pixel defining layer 711 covers the first lower electrode 690 on the preliminary planarization layer 671 and may extend in the first direction. That is, the preliminary pixel defining layer 711 may be formed entirely on the preliminary planarization layer 671.

8 and 9, at least a portion of the second lower electrode 760 may be exposed by removing a portion of the preliminary planarization layer 671 and the spare pixel defining layer 711 in the transmissive region II. Accordingly, a planarization layer 670 can be formed. The planarization layer 670 may include an opening (e.g., a second opening) exposing a portion of the second lower electrode 760 in the transmissive region II. For example, the planarization layer 670 may be formed to have a relatively thick thickness to sufficiently cover the first electrode 610 and the second electrode 630, and in this case, the planarization layer 670 may have a substantially planar top surface And a planarization process may be added to the planarization layer 670 in order to realize a planar upper surface of the planarization layer 670.

In the exemplary embodiments, the planarization layer 670 has sidewalls of the first opening of the first interlayer insulating layer 590 and a side wall of the third opening of the second interlayer insulating layer 595 in the transmissive region II And may be in contact with the upper surface of the second lower electrode 760. For example, the planarization layer 670 may not expose the sidewalls of each of the first and third openings. That is, the size (or area) of the second opening of the planarization layer 670 may be smaller than the size of each of the first and third openings. At least a portion of the planarization layer 670 is formed on the second lower electrode 760 so that the planarization layer 670 can function as a pixel defining film in the transmissive region II. The planarization layer 670 may include an organic material or an inorganic material. In exemplary embodiments, the planarization layer 670 may comprise an organic material. For example, the planarization layer 670 may be formed using a photoresist, a polyacrylic resin, a polyimide resin, a polyamide resin, a siloxane resin, an acrylic resin, an epoxy resin, or the like.

At least a portion of the first lower electrode 690 may be exposed by removing at least a portion of the spare pixel defining layer 711 in the sub pixel region I. Accordingly, the pixel defining layer 710 can be formed. The pixel defining layer 710 may expose at least a portion of the first lower electrode 690 and the second lower electrode 760. For example, the pixel defining layer 710 may cover both sides of the first lower electrode 690 and may expose the second opening of the planarization layer 670. The pixel defining layer 710 may be formed of an organic material or an inorganic material. In the exemplary embodiments, the pixel defining layer 710 may be formed using an organic material.

The first light emitting layer 730 may be formed on the first lower electrode 690 at least partially exposed. The first light-emitting layer 730 may include at least one of light-emitting materials capable of emitting different color lights (i.e., red light, green light, and blue light) in the third direction according to the first through third sub- May be formed using one. Alternatively, the first light emitting layer 730 may emit white light as a whole by laminating a plurality of light emitting materials capable of generating other color light such as red light, green light, and blue light. In such a case, a color filter may be disposed on the first light emitting layer 730, and the color filter may not be disposed in the transmissive region III. The color filter may include at least one of a red color filter, a green color filter, and a blue color filter. Optionally, the color filter may comprise a yellow color filter, a blue-blue color filter and a purple color filter. The color filter may be composed of a photosensitive resin.

The second light emitting layer 735 may be formed on the second lower electrode 360 at least partially exposed. The second light emitting layer 735 may emit white light according to the fourth sub-pixel illustrated in FIG. The second light emitting layer 735 can be controlled by the semiconductor element 650. For example, when the semiconductor device 650 is activated, the second light emitting layer 735 may emit the white light in the third direction and the fourth direction perpendicular to the first and second directions. When the semiconductor device 650 is deactivated, the image of the object located on the rear side of the organic light emitting display can be transmitted through the transmission region II. The second light emitting layer 735 may have a tandem structure to emit white light. For example, the second light emitting layer 735 may include a red light emitting layer, a green light emitting layer, and a blue light emitting layer, and a charge generating layer may be interposed between the red light emitting layer and the green light emitting layer and between the green light emitting layer and the blue light emitting layer, respectively. For example, the red light emitting layer, the first charge generating layer, the green light emitting layer, the second charge generating layer, and the blue light emitting layer may be formed in this order on the second lower electrode 760.

Referring to FIG. 10, an upper electrode 740 may be formed on the pixel defining layer 710 and the first and second light emitting layers 730 and 735. The upper electrode 740 may cover the pixel defining layer 710 and the first and second light emitting layers 730 and 735 in the sub pixel region I and the transmissive region II. The upper electrode 740 may be formed using a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like.

An encapsulating substrate 750 may be formed on the upper electrode 740. The encapsulation substrate 750 may be substantially composed of the same material as the substrate 510. For example, the sealing substrate 750 may be formed using a quartz substrate, a synthetic quartz substrate, a calcium fluoride or fluorine-doped quartz substrate, a soda lime substrate, a non-alkali substrate, or the like. The sealing substrate 750 may be bonded to the substrate 510 by performing an encapsulating process on the upper electrode 740. Accordingly, the organic light emitting diode display 100 shown in FIG. 2 can be manufactured.

11 is a cross-sectional view showing an organic light emitting diode display according to exemplary embodiments of the present invention. The organic light emitting display device 200 illustrated in FIG. 11 may have substantially the same or similar configuration as the organic light emitting display device 100 described with reference to FIG. 2, except for the semiconductor device 255. In Fig. 11, a duplicate description of components substantially the same as or similar to those described with reference to Fig. 2 is omitted.

11, the OLED display 200 includes a substrate 110, a gate insulating layer 150, a semiconductor device 255, a first interlayer insulating layer 190, a second interlayer insulating layer 195, The pixel defining layer 310, the second lower electrode 361, the first luminescent layer 330, the second luminescent layer 336, the upper electrode 340, the encapsulation layer 330, the first lower electrode 290, A substrate 350, and the like. Here, the semiconductor device 255 may include an active layer 135, a gate electrode 175, a first electrode 215, and a second electrode 235. Also, the first lower electrode 290 may have a first thickness, and the second lower electrode 361 may have a second thickness that is less than the first thickness.

The gate electrode 175 may be disposed on the substrate 110. The gate electrode 175 may be located below the portion of the substrate 110 where the active layer 135 is located in the sub pixel region I. In the exemplary embodiments, the gate electrode 175 may have a relatively thin thickness (e.g., a second thickness) and may be substantially transparent. Since the thickness of the gate electrode 175 is thin, the wiring resistance can be increased. Therefore, the gate electrode 170 may not serve as a wiring for transmitting the gate signal of the OLED display 200, and may function as a gate electrode for switching the active layer 135. For example, the gate signal of the organic light emitting display 200 may be transmitted by a gate line, and the gate line may be electrically connected to the gate electrode 175, (Not shown).

The second lower electrode 361 may be disposed apart from the gate electrode 175 in the transmissive region II on the substrate 110 and a part of the sub pixel region I. [ In the exemplary embodiments, the second lower electrode 361 may be located on the same layer as the gate electrode 175, and may be formed simultaneously including the same material. The second lower electrode 361 and the gate electrode 175 may have the same thickness and the second lower electrode 361 may transmit light. For example, in the transmissive region II, external light may be transmitted.

A gate insulating layer 150 may be disposed on the second lower electrode 361 and the gate electrode 175. The gate insulating layer 150 is formed on the substrate 110 in a first direction parallel to the upper surface of the substrate 110 (for example, from the transmissive region II to the sub pixel region I) . The gate insulating layer 150 may include a first opening exposing a portion of the second lower electrode 361 in the transmissive region II and may cover the gate electrode 175 in the sub pixel region I. [ The gate insulating layer 150 may include a silicon compound, a metal oxide, or the like. In the exemplary embodiments, the gate insulating layer 150 may comprise an inorganic material.

The active layer 135 may be disposed in the sub pixel region I on the gate insulating layer 150. The active layer 135 may overlap the gate electrode 175. For example, the active layer 135 may include an oxide semiconductor, an inorganic semiconductor (e.g., amorphous silicon, polysilicon), an organic semiconductor, or the like.

The first interlayer insulating layer 190 may be disposed on the active layer 135. The first interlayer insulating layer 190 may extend in the first direction on the gate insulating layer 150 and may include a second opening exposing a portion of the second lower electrode 361 in the transmissive region II And may cover the active layer 135 in the sub-pixel region I. The first interlayer insulating layer 190 may include a silicon compound, a metal oxide, or the like. In the exemplary embodiments, the first interlayer insulating layer 190 may include an inorganic material.

The gate interconnection may be disposed on the first interlayer insulating layer 190. As described above, the gate wiring can transfer the gate signal of the organic light emitting diode display 200 to the gate electrode 175. However, the gate wiring may be disposed on another cut surface of the OLED display 200. The gate wiring may fill the contact hole located in the first interlayer insulating layer 190 and may be connected to the gate electrode 175 and the gate wiring 175 and the gate electrode 175 may be electrically connected. Since the thickness of the gate wiring is relatively larger than the thickness of the gate electrode 175, the gate signal can be transmitted with a relatively low wiring resistance.

A second interlayer insulating layer 195 may be disposed on the gate wiring. The second interlayer insulating layer 195 may be located between the first interlayer insulating layer 190 and the planarization layer 270. The second interlayer insulating layer 195 may extend in the first direction on the first interlayer insulating layer 190 and may include an opening exposing a portion of the second lower electrode 360 in the transmissive region II And can cover the gate wiring in the sub-pixel region I. The second interlayer insulating layer 195 may include a silicon compound, a metal oxide, or the like. In the exemplary embodiments, the second interlayer insulating layer 195 may include an inorganic material.

The first electrode 215 and the second electrode 235 may be disposed on the second interlayer insulating layer 195. The first electrode 215 and the second electrode 235 are respectively connected to one side and the other side of the active layer 135 through a part of the first interlayer insulating layer 190 and the second interlayer insulating layer 195 . For example, the first electrode 210 may be connected to the first portion of the active layer 135 through a portion of the first interlayer insulating layer 190 and the second interlayer insulating layer 195, The electrode 235 may be connected to the second portion of the active layer 135 through a part of the interlayer insulating layer 190 and the second interlayer insulating layer 195. [ The semiconductor element 255 including the active layer 135, the gate electrode 175, the first electrode 215 and the second electrode 235 can be constituted.

In the exemplary embodiments, the second electrode 235 may extend in a second direction opposite to the first direction (e.g., in a direction from the sub pixel region I to the transmissive region II) have. The second electrode 235 extending in the second direction may be overlapped with at least a part of the second lower electrode 361. In the overlapping portion, the gate insulating layer 150 may include a first contact hole exposing a portion of the second lower electrode 361. In addition, in the overlapped portion, the first interlayer insulating layer 190 may include a second contact hole exposing the first contact hole. Furthermore, the second interlayer insulating layer 195 may include a third contact hole exposing the second contact hole. The second electrode 235 extending in the second direction fills the first through third contact holes and may contact the second lower electrode 361. Accordingly, the semiconductor device 255 can be electrically connected to the second lower electrode 361. [ Each of the first electrode 215 and the second electrode 235 may include a metal, a metal alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like.

The planarization layer 270 may be disposed on the first electrode 215 and the second electrode 235. The planarization layer 270 may include a third opening that extends in the first direction on the second interlayer dielectric layer 195 and exposes a portion of the second lower electrode 361 in the transmissive region II. And may cover the first electrode 215 and the second electrode 235 in the sub pixel region I. [

In the exemplary embodiments, the planarization layer 270 is formed on the sidewall of the first opening of the gate insulation layer 150 in the transmissive region II, the sidewall of the second opening of the first interlayer dielectric 190, It may cover the side wall of the opening of the interlayer insulating layer 195 and may be in contact with the upper surface of the second lower electrode 361. For example, the planarization layer 270 may not expose the sidewalls of each of the openings. That is, the size (or area) of the third opening of the planarization layer 270 may be less than the size of each of the openings. At least a part of the planarization layer 270 is located on the second lower electrode 361 so that the planarization layer 270 can function as a pixel defining film in the transmission region II. The planarization layer 270 may include an organic material or an inorganic material. In exemplary embodiments, the planarization layer 270 may comprise an organic material.

Accordingly, the OLED display 200 including the semiconductor device 255 having a bottom gate structure can be realized.

12 is a cross-sectional view illustrating an organic light emitting diode display according to exemplary embodiments of the present invention. The organic light emitting display device illustrated in FIG. 12 may have substantially the same or substantially similar structure as the organic light emitting display device 100 described with reference to FIG. 2, except for the planarization layer 271. In Fig. 12, a duplicate description of components substantially the same as or substantially similar to those described with reference to Fig. 2 is omitted.

12, an OLED display includes a substrate 110, a gate insulating layer 150, a semiconductor device 250, a first interlayer insulating layer 190, a gate wiring 180, a second interlayer insulating layer The second light emitting layer 330, the second light emitting layer 336, the upper electrode 340, and the upper electrode 340. The upper electrode 340 is formed on the lower electrode 360, An encapsulation substrate 350, and the like. Here, the semiconductor device 250 may include an active layer 130, a gate electrode 170, a first electrode 210, and a second electrode 230.

In the exemplary embodiments, the planarization layer 271 is formed on the sidewall of the first opening of the gate insulating layer 150 in the transmissive region II, the sidewall of the second opening of the first interlayer insulating layer 190, The side wall of the opening of the interlayer insulating layer 195 may not be covered. In this case, after the preliminary gate insulating layer, the preliminary first interlayer insulating layer, the preliminary second interlayer insulating layer, the preliminary planarization layer, and the preliminary pixel defining layer are disposed on the substrate 110, , The preliminary first interlayer insulating layer, the preliminary second interlayer insulating layer, the preliminary planarization layer, and the preliminary pixel defining layer may be removed to expose at least a part of the second lower electrode 360.

13 is a cross-sectional view illustrating an organic light emitting diode display according to exemplary embodiments of the present invention. The organic light emitting display shown in FIG. 13 may have substantially the same or substantially similar structure as the organic light emitting display 100 described with reference to FIG. 2, except for the second semiconductor element 955. In Fig. 13, a duplicate description of components substantially the same as or substantially similar to those described with reference to Fig. 2 is omitted.

13, the OLED display includes a substrate 110, a gate insulating layer 150, a first semiconductor element 250, a second semiconductor element 955, a first interlayer insulating layer 190, The pixel defining layer 310, the second lower electrode 360, the first light emitting layer 330, the first interlayer insulating layer 195, the planarization layer 270, the first lower electrode 290, 2 light emitting layer 336, an upper electrode 340, an encapsulation substrate 350, and the like. The second semiconductor element 955 may include a first semiconductor element 250, an active layer 130, a gate electrode 170, a first electrode 210 and a second electrode 230, A layer 835, a gate electrode 875, a first electrode 915, and a second electrode 935. [

In the exemplary embodiments, the organic light emitting display includes the second semiconductor element 955, so that the second light emitting layer 335 can emit light independently. That is, the first semiconductor element 250 controls the first light emitting layer 330 and the second semiconductor element 955 controls the second light emitting layer 335 to form the first light emitting layer 330 and the second light emitting layer 335 ) May emit light at the same time or only one of them may emit light.

14 is a cross-sectional view illustrating an organic light emitting diode display according to exemplary embodiments of the present invention. 14 may have substantially the same or substantially similar structure as the organic light emitting display 100 described with reference to FIG. 2, except for the gate wiring 181 and the conductive pattern 182. The organic light emitting display 100 shown in FIG. have. In Fig. 14, duplicate explanations of components that are substantially the same as or substantially similar to those described with reference to Fig. 2 are omitted.

14, the OLED display includes a substrate 110, a gate insulating layer 150, a semiconductor device 250, a first interlayer insulating layer 190, a gate wiring 181, a conductive pattern 182, The pixel defining layer 310, the second lower electrode 360, the first luminescent layer 330, the second luminescent layer 336, the upper electrode 340, the encapsulation layer 340, A substrate 350, and the like. Here, the semiconductor device 250 may include an active layer 130, a gate electrode 170, a first electrode 210, and a second electrode 230.

In exemplary embodiments, the gate wiring 181 may be disposed on the gate electrode 170, and the conductive pattern 182 may be disposed on at least a portion of the second lower electrode 360. For example, a preliminary gate electrode may be entirely disposed on the gate insulating layer 150, and a preliminary gate wiring may be disposed entirely on the preliminary gate electrode. Then, the preliminary gate electrode and the preliminary gate wiring are partially removed using a halftone mask or a slit mask to form the gate electrode 170, the gate wiring 181, the conductive pattern 182 and the second lower electrode 360 Can be simultaneously formed.

In this case, the gate wiring 181 and the conductive pattern 182 can reduce the wiring resistance of the second lower electrode 360 and the gate electrode 170, respectively.

While the present invention has been described in connection with what is presently considered to be practical and exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, It will be understood that various modifications and changes may be made.

The present invention can be applied to various display devices having an organic light emitting display. For example, the present invention is applicable to a large number of display devices such as display devices for vehicles, marine and airplanes, portable communication devices, display devices for display or information transmission, medical display devices and the like.

10: pixel region 15: first sub pixel region
20: second sub pixel region 25: third sub pixel region
30: transmission region 100, 200: organic light emitting display
110, 510: substrate 130, 135, 530, 835: active layer
150, 550: gate insulating layer
170, 175, 570, 875: gate electrode 180, 181, 580: gate wiring
182: conductive pattern 190, 590: first interlayer insulating layer
591: preliminary first interlayer insulating layer 195, 595: second interlayer insulating layer
596: preliminary second interlayer insulating layer 210, 215, 610, 915: first electrode
230, 235, 630, and 935:
250, 255, 650, 955: semiconductor devices 270, 271, 670: planarization layer
671: preliminary planarization layer 290, 690: lower electrode
291: first electrode film 292: second electrode film
293: Third electrode film 360, 361, 790: Second lower electrode
310, 710: pixel definition film 711: spare pixel definition film
330, 730: First light emitting layer 335, 336, 735: Second light emitting layer
340, 740: upper electrode 350, 750: sealing substrate

Claims (20)

A substrate including a plurality of pixel regions each having sub pixel regions and a transmissive region;
An active layer disposed in the sub pixel region on the substrate;
A gate electrode overlying the active layer on the substrate;
A first electrode disposed on the active layer and connected to a first portion of the active layer;
A second electrode disposed on the active layer and spaced apart from the first electrode, the second electrode being connected to a second portion of the active layer;
A first lower electrode disposed in the sub pixel region on the first and second electrodes, the first lower electrode having a first thickness;
A first light emitting layer disposed in the sub pixel region on the first lower electrode;
A second lower electrode disposed in the transmissive region on the substrate and positioned in the same layer as the gate electrode, the second lower electrode having a second thickness thinner than the first thickness, the second lower electrode transmitting light;
A second light emitting layer disposed in a transmissive region on the first lower electrode; And
And an upper electrode disposed on the first light emitting layer and the second light emitting layer. The organic light emitting display according to claim 1, wherein the thickness of the second lower electrode is equal to the thickness of the gate electrode, and the second lower electrode and the gate electrode comprise the same material and are simultaneously formed. Device. The OLED display of claim 1, wherein the gate electrode is disposed on the active layer. The method of claim 3,
A gate insulating layer extending in a first direction parallel to an upper surface of the substrate on the substrate, the gate insulating layer covering the active layer;
A first interlayer insulating layer extending in the first direction on the gate insulating layer and including a first opening exposing a portion of the second lower electrode in the transmissive region, the first interlayer insulating layer covering the gate electrode in the sub pixel region; And
And a second opening that extends in the first direction on the first interlayer insulating layer and exposes a part of the second lower electrode in the transmissive region, and a second opening that covers the first and second electrodes in the sub- Wherein the organic light emitting display further comprises a planarization layer. 5. The method of claim 4,
A gate interconnection disposed on the first interlayer insulating layer and transmitting a gate signal to the gate electrode, the gate interconnection having a thickness greater than the thickness of the gate electrode; And
And a third opening which is disposed between the first interlayer insulating layer and the planarization layer and extends in the first direction on the first interlayer insulating layer and exposes a part of the second lower electrode in the transmission region And a second interlayer insulating layer covering the gate wiring in the sub pixel region. 5. The organic light emitting diode display according to claim 4, wherein the planarization layer covers a side wall of the first opening of the first interlayer insulating layer in the transmissive region, and contacts the upper surface of the gate insulating layer. The organic light emitting diode display according to claim 6, wherein a size of the second opening is smaller than a size of the first opening. The organic light emitting diode display according to claim 7, wherein the gate insulating layer and the first interlayer insulating layer include an inorganic material, and the planarization layer includes an organic material. The organic light emitting display according to claim 5, wherein the second electrode extends in a second direction opposite to the first direction on the first interlayer insulating layer, and overlaps at least a part of the second lower electrode. Device. 10. The semiconductor device according to claim 9, wherein in the overlapped portion, the first interlayer insulating layer includes a first contact hole exposing a part of the second lower electrode, and in the overlapped portion, And a second contact hole exposing one contact hole,
Wherein the second electrode fills the first and second contact holes in the overlapped portion and is in contact with the second lower electrode. 10. The semiconductor device of claim 9, wherein, in a portion where the second electrode and the first lower electrode overlap, the planarization layer includes a third contact hole, the first lower electrode fills the third contact hole, And the electrode is in contact with the electrode. The OLED display of claim 1, wherein the active layer is disposed on the gate electrode. 13. The method of claim 12,
And a first opening extending in a first direction parallel to an upper surface of the substrate on the substrate and exposing a portion of the second lower electrode in the transmissive region, A gate insulating layer;
An interlayer insulating layer covering the gate electrode, the interlayer insulating layer including a second opening extending in the first direction on the gate insulating layer and exposing a portion of the second lower electrode in the transmissive region; And
And a third opening extending in the first direction on the interlayer insulating layer and exposing a portion of the second lower electrode in the transmissive region, the planarization layer covering the first and second electrodes,
Wherein the planarization layer covers the side wall of the first opening of the gate insulating layer and the side wall of the second opening of the interlayer insulating layer in the transmissive region and is in contact with the upper surface of the gate insulating layer. . 14. The OLED display of claim 13, wherein a size of the third opening is smaller than a size of each of the first and second openings. 15. The organic light emitting display as claimed in claim 14, wherein the gate insulating layer and the interlayer insulating layer include an inorganic material, and the planarizing layer includes an organic material. 14. The semiconductor device according to claim 13, wherein the second electrode extends on the interlayer insulating layer in a second direction opposite to the first direction, overlaps with at least a part of the second lower electrode,
Wherein the gate insulating layer in the overlapping portion includes a first contact hole exposing a portion of the second lower electrode, and the interlayer insulating layer in the overlapping portion includes a second contact hole exposing the first contact hole, / RTI >
Wherein the second electrode fills the first and second contact holes in the overlapping portion and contacts the second lower electrode,
Wherein the planarization layer includes a third contact hole at a portion where the second electrode and the first lower electrode are overlapped with each other and the first lower electrode fills the third contact hole and contacts the second electrode To the organic light emitting display device. The organic electroluminescence device according to claim 1, wherein the first light emitting layer emits light in a direction perpendicular to an upper surface of the substrate, and the second light emitting layer has a direction perpendicular to an upper surface of the substrate and a direction opposite to a direction perpendicular to an upper surface of the substrate Emitting device according to claim 1, The organic light emitting diode display according to claim 1, wherein the first lower electrode reflects light emitted from the first light emitting layer, and the second lower electrode transmits light emitted from the second light emitting layer. The organic light emitting diode display according to claim 18, wherein the second light emitting layer emits white light. The organic light emitting diode display according to claim 19, wherein when the second light emitting layer does not emit light, an image of an object positioned on the rear surface of the organic light emitting display is transmitted through the transmissive region.

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