KR20170064985A - Method and device for processing graphics data in graphics processing unit - Google Patents

Abstract

A method and apparatus for processing graphics data on a GPU are provided. The poles data is received in the candidate DOG layer of the image. Obtain the candidate DOG layer as an intermediate layer of the image. Further, pole data representing the pole data is obtained by comparing the values of the candidate DOG layer with the values of the lower DOG layer and the upper DOG layer. And stores the acquired pole data.

Description

TECHNICAL FIELD [0001] The present invention relates to a method and apparatus for processing graphic data in a GPU,

This disclosure relates to an image processing method and apparatus, and more particularly to a method and apparatus for obtaining a pole value in a tile-based graphics processing unit (GPU).

In general, object acquisition methods identify local features or interest points in an image that can be used in computer vision applications such as object detection, object recognition, and face detection. Object acquisition methods provide various approaches to computerized object recognition, object acquisition, image matching, and 3D reconstruction. Various operations are performed in the GPU to identify local features or feature points in the image.

The feature points in the image can be defined based on an image function such as a series of filtering operations performed after the search for pole values. The pole values are one of the important features of the object. The pole values are generally defined as the extremum, extreme, extreme, and extreme points of the object relative to the reference frame of the image. A bounding box of a rectangular shape including the object is defined by the pole data. A bounding box is used to define the image area to be analyzed in order to identify the intimate characteristics of the object.

Scale Invariant Feature Transform (SIFT) is a method for obtaining and extracting unchanging local feature descriptors for changes in light, image noise, rotation, scale, perspective, and so on. SIFT can be applied to computer vision problems such as object recognition, face recognition, object acquisition, image matching, 3D structure construction, stereo correspondence and motion tracking. SIFT can be a time-consuming task, and SIFT features should be extracted and matched in real time in some cases (e.g., online object recognition). SIFT feature extraction is executed or accelerated in the GPU. However, SIFT is continuous and allows it to operate on a single processor system. Parallelization of SIFT may cause load imbalance and may degrade the scaling efficiency.

Conventional systems use various methods for object acquisition. Conventional methods, however, required high power and computing resources. The memory and computing power of GPUs is limited and GPUs are energy sensitive, so there is a need for a method of obtaining a pole value that can efficiently use energy.

Provides a method for obtaining pole values in a tile-based GPU. Also provided is a method of receiving a candidate Difference of Gaussian (DOG) layer. A candidate DOG layer operation is performed based on the image tiles. A method for acquiring a candidate DOG layer as an intermediate layer of an image is provided. And comparing the values of the candidate DOG layer with the values of the lower and upper DOG layers to obtain pole data representing the pole. And a method of storing the acquired pole data in an extreme buffer unit.

As a technical means for achieving the above technical object, one aspect of the present invention provides a method of generating a digital image, comprising: receiving a Difference of Gaussian (DOG) layer of an image; Obtaining a candidate Difference of Gaussian (DOG) layer of the image from the DOG layer as an intermediate layer from the received DOG layer; Obtaining pole data representing at least one pole by comparing values of the candidate DOG layer with values of a previous DOG layer and a next DOG layer; And storing the one or more pole data in a buffer. The method may further include obtaining a pole extreme from a tile-based graphics processing unit (GPU).

According to another aspect of the present invention, there is provided an image processing method including receiving a candidate DOG layer of an image, acquiring the candidate DOG layer of the image as an intermediate layer, calculating values of the candidate DOG layer with values of a lower DOG layer and a higher DOG layer A GPU for obtaining one or more pole data by comparison; And a buffer for storing the one or more pole data. The present invention can provide a pole data acquiring device including a GPU.

In addition, the three aspects of the present invention can provide a computer-readable recording medium on which a program for causing a computer to execute the method of the first aspect is recorded.

1 is a diagram illustrating a Gaussian image in a scale-space pyramid, according to one embodiment.
2 is a diagram illustrating a method of determining a pole value, according to one embodiment.
3 is a block diagram of a pole value acquisition system including a GPU, in accordance with one embodiment.
4 is a diagram for explaining a DOG layer calculation process of an image according to an embodiment.
5 is a view for explaining a process of obtaining pole data according to an embodiment.
6 is a diagram for explaining a minutiae point localization process according to an embodiment.
7 is a flow diagram illustrating a method for obtaining pole data in a GPU, in accordance with one embodiment.
8 is a block diagram illustrating an arithmetic environment for performing a method of obtaining pole data in a GPU, in accordance with one embodiment.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings, which will be readily apparent to those skilled in the art. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. In order to clearly illustrate the present invention, parts not related to the description are omitted, and similar parts are denoted by like reference characters throughout the specification.

Whenever a component is referred to as "including" an element throughout the specification, it is to be understood that the element may include other elements, not the exclusion of any other element, unless the context clearly dictates otherwise.

To assist in understanding embodiments of the present invention, content related to polar value acquisition is disclosed.

The GPU can acquire feature points using the DOG pyramid generation and the pole acquisition method.

The DOG pyramid will be described. DOG may refer to a bandpass filter operator that is obtained by calculating the difference between versions that filtered (blurred) the same grayscale image with two lowpass filters. Each filtered version can be obtained by convolving the image with two bi-dimensional Gaussian filters with different radii. For example, the relationship according to the following equation (1) can be established.

With respect to formula 1], G (x, y , σ) = e ^ {- (x 2 + y 2-) / 2σ 2}? / 2 σ 2, I (x, y) is the input image, k ∈ R, and "*" is the convolution operator.

A DOG filter with a typical Mexican hat transfer curve is an approximation of the well-known scale normalized Laplacian of Gaussian (LOG) and can be used for edge detection. The DOG operator acts as a starting point for various image acquisition algorithms and can be efficient because it has less computation than LOG due to the separability of Gaussian filters.

A DOG image is obtained for each of the images L (x, y, σ i + 1) and L (x, y, σ i) pairs. Multiple candidates of feature points may be obtained from DOG images corresponding to different scales of each input image.

Since digital images belong to a discrete domain, a 2D Gaussian filter can be represented by a combination of two 1D convolutions. Thus, the discrete scale-space for all pixels of (i, j) can be computed by convolving the result with a 1D Gaussian kernel and convolving the result into a complementary kernel of an equivalent 2D filter. By separating the operations as described above, the complexity of the computation can be reduced from O (n ² ) to O (2n).

Referring to FIG. 1, the process of constructing the scale-space pyramid is as follows. 1. Blur the input images with Gaussian filters with increasing σ values (ie, increased scale). 2. As in (1), we can calculate DOGs from blurred images with adjacent sigma. 3. You can repeat steps 1 and 2 above for double-sampling (ie, octave) versions of the input image.

According to the established theory, the parameter k in the discrete domain is set equal to 2 ^{1 / S} , where S + 3 represents the number of scales for each octave. As with the software implementation, S = 2 is set to maintain the accuracy of the hardware (HW) and to limit the size of the proposed processor. As a result, each octave contains five scales, and the down-sampled images are included in the remaining octaves 12 by 2, 4, and 8 times smaller than the existing image used in the first octave 10. [ In terms of the scalability of the proposed design, the scale of the scale-space pyramid can be varied to improve the power / speed efficiency as well as reduce the size of the processor.

Although the Gaussian filters have infinite regions, a proper approximation value can be obtained when limiting the range of one side to 6σ + 1. Where σ is the standard deviation of the general Gaussian kernel. If the range of one side is limited as above, the ratio of the average value of the Gaussian kernel to the overlooked value is calculated by approximation, which is 1000 times or more, so that the accuracy of the filter can be sufficiently maintained.

When the initial standard value is σ ₀ = 1.4, the above five scales are σ = {1.4; 2; 2.8; 4; 5.6}, and the size of the filter according to each scale becomes 9X9, 13X13, 17X17, 25X25, 35X35 in order.

As described below, other standard deviation values can be selected to simplify the synchronization of all scales when the filter is actually implemented.

Even though the amount of computation can be reduced by the operation of one-dimensional filters using the separable nature of the Gaussian filters, a large number of multiply-accumulator (MAC) operators are required to perform convolution on appropriately sized filters. All DOG operation pipelines are limited by floating-point arithmetic, the 32-bit single precision IEEE-754 constraint ("FP32"). FP32 units typically require additional logic to be used to synchronize the data paths from or to the CPUs. These additional logic is implemented as generally as synchronous / loosely coupled coprocessors in SoCs (System on Chips). Thus, in terms of speed and code compression, the above method has a lower efficiency than an operation using only integers. When designing legacy hardware for DOG, the FP32 is designed to fit large, limited platforms. In this context, a fixed-point approach can help to obtain an efficient system by reducing previously required physical resources. For this purpose, tests have been conducted to demonstrate the effectiveness of exchanging the minimum number of bits required in a fixed-point operation and its 1 + 1D separable counterpart to implement a full Gaussian kernel. In addition, to illustrate a 2D full (non-decoupled) kernel, it has been proven that a limited difference is obtained by coding intermediate results of intermediate-Gaussian results with 10 bits and coding the 2D filtered pixels of the pyramid with 14 bits.

In addition, the DOG filtering process may be applied to smoothed images corresponding to different scales to obtain a pair of DOG images for each input image. For example, four DOG images 14 and 16 pairs may be generated from five smoothed images 10 and 12 corresponding to respective scales for each input image.

Referring to Fig. 2, each pixel in the DOG image Di (x, y, sigma) 20 may be set to a pixel (denoted X) displayed adjacent to 26 comparison pixels. The comparison pixels are 8 pixels in the 3x3 pixel area of the DOG image Di-1 (x, y, sigma) 22 and 9 pixels in the 3x3 pixel area of the DOG image Di + 1 (x, y, Pixels. Then, it can be determined whether the data of the displayed pixels out of the data of the displayed pixels and the comparison pixels is pole data (i.e., maximum or minimum). If the displayed pixel is determined to be a pole, the displayed pixel may be set as a candidate object feature point. Once the minutiae candidate is determined as the object minutiae, the scale value sigma -i of the DOG image Di with the minutiae object minus points can be used to calculate the image feature of the object minutiae.

The pole value acquisition will be described. Once the DOG pyramid is created, minutiae points can be identified by comparing each pixel in the DOG image with 8 adjacent pixels of the same scale and 9 pixels of the two adjacent scales 20 and 30. If the pixel is a polar value (maximum or minimum), then the pixel may be considered a valid feature point from now on. Since four DOGs can be computed from five scales in each octave, pole-value acquisition can be accomplished by comparing the first and second groups of three DOGs by two parallel pipes for each octave .

In this specification, acquiring a pole value may include the detection of a pole value, the case of acquiring, generating or receiving data representing a pole value.

The present disclosure provides a method of obtaining and acquiring pole values in a tile-based GPU. The method also includes receiving a candidate DOG layer of the image. In one embodiment, the candidate DOG layer is calculated based on the tiles in the image. And obtaining a candidate DOG layer as an intermediate layer of the image. And comparing the values of the candidate DOG layer with values of the lower and higher DOG layers to obtain the pole point. The pole point includes either a maximum value or a minimum value. The method also includes storing the acquired pole data. In addition, it includes a method of transferring pole data to a shader core to obtain feature localization.

In one embodiment, a method of obtaining pole data of a candidate DOG layer and a lower DOG layer by comparing a value of a candidate DOG layer with a value of a lower DOG layer. The method also includes a method of obtaining pole data of the candidate DOG layer, the lower DOG layer, and the upper DOG layer by comparing the pole data of the candidate DOG layer and the lower DOG layer with the value of the upper DOG layer.

In one embodiment, the values of the lower DOG layer may be stored in a tile buffer.

The present disclosure provides a method for obtaining pole values in a tile-based GPU energy-efficient. The methods described in this disclosure can be implemented in GPUs, and more particularly, in energy sensitive mobile GPUs. A Z comparison circuit available in mobile GPUs can be used to perform pole-value acquisitions.

The disclosed graphics processing methods may be implemented through three different paths that can be pipelined to programmable GPUs and non-programmable hardware. In one embodiment, GPU graphics fixed function hardware is used to implement the methods of the present disclosure. Further, in carrying out the method of the present disclosure, additional components may be needed such as a buffer (or pole value buffer) for storing the layer ID corresponding to the pole, and a state machine for determining a final list of poles have. In one embodiment, on-chip frame buffer memory is used to store intermediate data, thereby providing more memory for storing intermediate data. With the use of on-chip frame buffer memory, the shared memory can be emptied for other passes. By using the GPU hardware efficiently in the method of the present disclosure, the processing speed is increased and energy saving is possible.

Hereinafter, the method of the present disclosure will be described in detail with reference to Figs.

3 is a block diagram of a pole value acquisition system including a GPU 102, in accordance with one embodiment. As shown in FIG. 3, the system may include a GPU 102. In one embodiment, the GPU 102 may include a shader core 104, a tile buffer 106, a comparison unit 108, and a pole value buffer 110. In the following, tile buffer 106 and pole value buffer 110 may refer to the same buffer.

The shader core 104 may calculate the candidate DOG layer. In one embodiment, the candidate DOG layer may be computed based on the tiles in the image.

In addition, the shader core 104 may receive a list of pole points. The shader core 104 may utilize the list of received poles to perform localization of the feature points and generation of descriptors for the feature points.

The tile buffer 106 may store the values of the DOG layer. For example, when the candidate DOG layer is referred to as an "A layer ", the values of the" A-1 layer " The tile buffer 106 may comprise one or more computer readable media. The tile buffer 106 may include non-volatile storage elements. Non-volatile storage elements may include magnetic hard disks, optical disks, floppy disks, flash memory, or electrically programmable memories (EPROM) or electrically erasable programmable memories (EEPROM). In addition, the tile buffer 106 may be a non-transitory storage medium. The term "non-transient" may refer to a storage medium that is not implemented as a carrier wave or a propagated signal. However, the term "non-transient" should not be construed as meaning that the tile buffer 106 is fixed. In one embodiment, the tile buffer 106 may store a greater amount of information than the memory. In one embodiment, a non-volatile storage medium (e.g., RAM (Random Access Memory) or cache) may store data that varies over time.

In one embodiment, the comparator 108 is a Z compare circuit present in mobile GPUs. The Z compare circuit in the GPU 102 can be understood to be used for polar value acquisition. In one embodiment, the comparing unit 108 may receive the candidate DOG layer of the image. The comparing unit 108 can acquire a candidate DOG layer as an intermediate layer.

Also, the comparing unit 108 can obtain the pole data by comparing the values of the candidate DOG layer with the values of the lower DOG layer and the upper DOG layer. For example, when the candidate DOG layer is referred to as "A layer", the lower DOG layer is referred to as "A-1 layer", and the upper DOG layer is referred to as "A + A " layer "and" A + 1 layer "pixel values.

In one embodiment, the comparison unit 108 may obtain the pole data of the candidate DOG layer and the lower DOG layer by comparing the value of the candidate DOG layer with the corresponding value of the lower DOG layer. That is, in obtaining the pole data of the candidate DOG layer and the lower DOG layer, the comparing unit 108 may compare the pixel values of the "A layer" with the corresponding pixel values of the "A-1 layer".

In addition, the comparing unit 108 can obtain the pole data of the candidate DOG layer, the lower DOG layer, and the upper DOG layer by comparing the pole data of the candidate DOG layer and the lower DOG layer with the values of the upper DOG layer. In obtaining the pole data of the candidate DOG layer, the lower DOG layer, and the upper DOG layer, the comparator 108 compares the obtained pole data for the "A layer" and the "A-1 layer" Pixel values.

The obtained pole data can be stored in the pole value buffer 110. [ In addition, the ID of the DOG layer corresponding to the obtained pole value can be stored in the pole value buffer 110. [ The polar value buffer 110 may comprise one or more computer readable recording media. The polar value buffer 110 may comprise non-volatile storage elements. Non-volatile storage elements may include magnetic hard disks, optical disks, floppy disks, flash memory, or electrically programmable memories (EPROM) or electrically erasable programmable memories (EEPROM). Also, the pole value buffer 110 may be a non-transitory storage medium. The term "non-transient" may refer to a storage medium that is not implemented as a carrier wave or a propagated signal. However, the term "non-transient" should not be interpreted to mean that the pole value buffer 110 is fixed. In one embodiment, the pole value buffer 110 may store a greater amount of information than the memory. In one embodiment, a non-volatile storage medium (e.g., RAM (Random Access Memory) or cache) may store data that varies over time.

4 is a diagram for explaining a DOG layer calculation process of an image according to an embodiment. A first pass for the DOG layer operation of the image is shown in FIG. The first pass is executed in the shader core 104. The first pass includes a control unit 202, a plurality of processing elements (PE) 204a-204d, a shared memory 206, an L2 / LL cache 208, a Dynamic Random Access Memory (DRAM) Raster Operations Pipeline) 212. The input of the first pass is the tile of the image that created the Gaussian pyramid and the DOG pyramid. As shown in FIG. 4, the input tile is obtained from the DRAM 210 via the L2 / LL cache 208, and the obtained tile is transferred to the plurality of PEs 204a-204d. The shared memory 206 is a memory system shared by a plurality of PEs 204a-204d. The plurality of PEs calculates the DOG pyramid. The ROP 212 receives pixel data. Each DOG layer of each octave is delivered to the ROP 212 one by one for polar value acquisition. In addition, the ROP 212 may merge data on a pixel-by-pixel basis using configurable functions. The output of the first pass 22 is a subset of the DOG layer generated from the input tiles. In one embodiment, the values of the generated DOG layer may be stored in the tile buffer 106. Further, in one embodiment, the candidate DOG layer, the lower DOG layer, and the upper DOG layer may be obtained as the output of the first pass.

5 is a view for explaining a method of obtaining pole data according to an embodiment. A second pass for pole value acquisition is shown in Fig. The second pass is performed in the comparator 108. [ The input of the second pass is a subset of the DOG layer received from the plurality of PEs 204a-204d in the shader core 104 one by one.

As shown in FIG. 5, the comparing unit 108 may receive the DOG layer of the image from the shader core 104. The comparing unit 108 can acquire a candidate DOG layer as an intermediate layer. The comparing unit 108 may obtain the values of the DOG layer stored in the tile buffer 106. [

The comparing unit 108 may compare the values of the candidate DOG layer with the values of the lower DOG layer and the upper DOG layer. For example, when the candidate DOG layer is referred to as the "A layer ", when the" A layer "is received, the comparing unit 108 extracts" A- Lower layer). The comparing unit 108 can compare the value of the "A layer " with the corresponding value of the" A-1 layer ". After comparing the values, the IDs of the minima and / or maxima, the minima layer, and / or the maxima layer in the pole value buffer 110 may be updated. In one embodiment, if the value of the candidate DOG layer is greater than the values of the lower and upper DOG layers, the maximum value in the pole value buffer 110 is updated with the value of the candidate DOG layer, ".

In the above example, if the "A layer" is the last layer, the comparator 108 may obtain from the pole value buffer 110 the layer ID corresponding to each of the last pole values and pole values from the pole value buffer 110 have. And compares the pole values with the 26 surrounding values based on the layer IDs corresponding to the pole values obtained in the comparison unit 108 and generates a list of smaller (maximum) pole values than the surrounding values And delivers the list to the shader core 104. Although FIG. 5 shows that the list of 26 adjacent pole points is made up of the maximum values, the list of 26 adjacent pole points can be made to the minimum values.

6 is a diagram for explaining a feature point localization process according to an embodiment. The third pass for feature point localization is shown in Fig. The third pass is executed in the shader core 104. The third path may include a control unit 202, PEs 204a to 204d, a shared memory 206, an L2 / LL cache 208, and a dynamic random access memory (DRAM) The input of the third pass is a list of pole points (maximal values and / or minima values) obtained in the second pass and the output is a list of minutiae descriptors generated by PEs 204a-204d. In the third pass, the control unit 202 sends the selected pole data to the processing element 204 to generate descriptors for the localization and feature points of the feature points. Detailed process of feature point localization and feature point descriptor generation is omitted.

7 is a flow diagram illustrating a method for obtaining pole data in GPU 102, in accordance with one embodiment. In step 502, the comparing unit 108 may receive one or more DOG layers from the PEs 204a-204d in the shader core 104. [ In step 504, the comparing unit 108 may obtain a candidate DOG layer as an intermediate DOG layer of the image.

In step 506, the comparing unit 108 may obtain the pole data by comparing the values of the candidate DOG layer with the values of the lower DOG layer and the upper DOG layer.

In step 508, the pole value buffer 110 may store the acquired pole data. In step 510, the comparison unit 108 may pass the pole data to the shader core 104 for feature point localization. The shader core 104 may then perform the feature point localization using the received pole data.

The above steps may be performed in a different order or simultaneously. Further, in other examples, some of the above steps may be modified or omitted, and new steps may be added.

8 is a block diagram illustrating an arithmetic environment for performing a method of obtaining pole data in a GPU, in accordance with one embodiment. 8, the computing environment 602 includes at least one processor 608 having a control unit 604, an operation unit 606, a memory (or storage unit) 610, an input / output unit 612, And may include a plurality of network devices 614. The processor 608 may process the instructions of the algorithm. The processor 608 may receive an instruction from the control unit 604. [ Further, the arithmetic unit 606 can be used to perform logical operations and arithmetic operations included in the execution of the instruction.

The overall computing environment 602 may comprise a plurality of coherent and / or heterogeneous cores, a plurality of different types of CPUs, media, and accelerators. The processor 608 may process the instructions of the algorithm. In addition, the plurality of processors 608 may be located on a single chip or multiple chips.

Algorithms, including the instructions and codes necessary for execution, may be stored in the memory 610. During execution, the instructions may be fetched from the stored memory 610 and processed by the processor 608.

When hardware is implemented, the input / output unit 612 and various network devices 614 may be connected to the computing environment.

The above embodiments may be implemented through at least one software program that runs on at least one hardware device and performs network management functions to control the components. The blocks shown in Figures 3 and 8 may be at least one hardware device or a combination of hardware and software modules.

The apparatus according to the above embodiments may include a processor, a memory for storing and executing program data, a permanent storage such as a disk drive, a communication port for communicating with an external device, a touch panel, a key, The same user interface device, and the like. Methods implemented with software modules or algorithms may be stored on a computer readable recording medium as computer readable codes or program instructions executable on the processor. Here, the computer-readable recording medium may be a magnetic storage medium such as a read-only memory (ROM), a random-access memory (RAM), a floppy disk, a hard disk, ), And a DVD (Digital Versatile Disc). The computer-readable recording medium may be distributed over networked computer systems so that computer readable code can be stored and executed in a distributed manner. The medium is readable by a computer, stored in a memory, and executable on a processor.

This embodiment may be represented by functional block configurations and various processing steps. These functional blocks may be implemented in a wide variety of hardware and / or software configurations that perform particular functions. For example, embodiments may include integrated circuit components such as memory, processing, logic, look-up tables, etc., that may perform various functions by control of one or more microprocessors or other control devices Can be employed. Similar to how components may be implemented with software programming or software components, the present embodiments may be implemented in a variety of ways, including C, C ++, Java (" Java), an assembler, and the like. Functional aspects may be implemented with algorithms running on one or more processors. In addition, the present embodiment can employ conventional techniques for electronic environment setting, signal processing, and / or data processing. Terms such as "mechanism", "element", "means", "configuration" may be used broadly and are not limited to mechanical and physical configurations. The term may include the meaning of a series of routines of software in conjunction with a processor or the like.

The specific implementations described in this embodiment are illustrative and do not in any way limit the scope of the invention. For brevity of description, descriptions of conventional electronic configurations, control systems, software, and other functional aspects of such systems may be omitted. Also, the connections or connecting members of the lines between the components shown in the figures are illustrative of functional connections and / or physical or circuit connections, which may be replaced or additionally provided by a variety of functional connections, physical Connection, or circuit connections.

In this specification (particularly in the claims), the use of the terms "above" and similar indication words may refer to both singular and plural. In addition, when a range is described, it includes the individual values belonging to the above range (unless there is a description to the contrary), and the individual values constituting the above range are described in the detailed description. Finally, if there is no explicit description or contradiction to the steps constituting the method, the steps may be performed in an appropriate order. It is not necessarily limited to the description order of the above steps. The use of all examples or exemplary terms (e. G., The like) is merely intended to be illustrative of technical ideas and is not to be limited in scope by the examples or the illustrative terminology, except as by the appended claims. It will also be appreciated by those skilled in the art that various modifications, combinations, and alterations may be made depending on design criteria and factors within the scope of the appended claims or equivalents thereof.

Claims (13)

A method of processing graphic data,
Receiving a Difference of Gaussian (DOG) layer of an image;
Obtaining a candidate Difference of Gaussian (DOG) layer of the image as an intermediate layer from the received DOG layer;
Obtaining pole data representing at least one pole by comparing values of the candidate DOG layer with values of a previous DOG layer and a next DOG layer; And
Storing the pole data representing the at least one pole in a buffer;
/ RTI > The method according to claim 1,
Transmitting the stored one or more pole data to a shader core to perform key point localization;
≪ / RTI > The method according to claim 1,
Wherein the obtaining of the pole data comprises:
Obtaining pole data of the candidate DOG layer and the lower DOG layer by comparing the value of the candidate DOG layer with a corresponding value of the lower DOG layer; And
Obtaining pole data of the candidate DOG layer, the lower DOG layer, and the upper DOG layer by comparing pole data of the candidate DOG layer and the lower DOG layer with values of a higher DOG layer;
/ RTI > The method according to claim 1,
Wherein values of the DOG layer are stored in a buffer. The method according to claim 1,
Wherein the DOG layer is calculated in the shader core based on tiles of the image. The method according to claim 1,
Wherein the at least one pole data comprises at least one of a maximum value and a minimum value. 1. A pole data processing apparatus comprising a GPU,
Receives a candidate DOG layer of the image,
Obtaining the candidate DOG layer of the image as an intermediate layer,
A GPU for obtaining pole data indicative of one or more poles by comparing values of the candidate DOG layer with values of a lower DOG layer and a higher DOG layer; And
A buffer for storing the at least one pole data;
/ RTI > 8. The method of claim 7,
Further includes a shader core,
The shader core includes:
Receiving the stored one or more pole data,
And obtain feature point localization of the received pole data. 8. The method of claim 7,
The GPU includes:
Acquiring pole data of the candidate DOG layer and the lower DOG layer by comparing the value of the candidate DOG layer with a corresponding value of the lower DOG layer,
And obtains pole data of the candidate DOG layer, the lower DOG layer, and the upper DOG layer by comparing the pole data of the candidate DOG layer and the lower DOG layer with the value of the upper DOG layer. 8. The method of claim 7,
Wherein values of the DOG layer are stored in a buffer. 11. The method of claim 10,
Further includes a shader core,
Wherein the shader core computes the DOG layer based on tiles of the image. 8. The method of claim 7,
Wherein the at least one pole data comprises one of a maximum value and a minimum value. A computer-readable recording medium storing a program for causing a computer to execute the method of any one of claims 1 to 6.

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