KR20160095916A - Printed circuit board and manufacturing method thereof - Google Patents

Abstract

A printed circuit board and a manufacturing method thereof are disclosed. According to an aspect of the present invention, the printed circuit board comprises: a buildup layer on which a plurality of circuit pattern layers and insulation layers are alternately laminated; a plurality of vias formed on the buildup layer to connect the circuit pattern layer of each layer and alternately laminated along a vertical direction; and a first pad formed to extend in one direction along a slope surface from an upper end of the circuit pattern layer or the via formed in a lower layer so as to be connected to a lower end of the via formed in an upper layer.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a printed circuit board (PCB)

The present invention relates to a printed circuit board and a manufacturing method thereof.

Recently, the importance of miniaturization, thinning, and external design of electronic products is increasing. In order to realize an electronic product satisfying this requirement, importance of a printed circuit board inserted into the electronic product is emphasized.

Such a printed circuit board includes a single side PCB on which wiring is formed on only one side of the insulating layer according to the number of layers, a double side PCB on which wiring is formed on both sides of the insulating layer, And may be classified as a multi-layer PCB.

In addition, according to the application materials, Rigid PCB using Rigid Material, Flexible PCB using Flexible Material, Competition using hard material and soft material in combination Can be classified as Rigid Flexible PCB

Among such printed circuit boards, the use of printed circuit boards having various structures has been increasing to cope with downsizing and thinning of electronic products. Especially, in recent years, development of watches, bracelets and necklaces of wearable products has been progressing more than smart phones and tablet PCs with various functions, and various designs and designs A substrate is required.

Korean Patent Laid-Open No. 10-2013-0097473 (published on Mar. 03, 2013)

An embodiment of the present invention relates to a printed circuit board having a structure capable of simultaneously forming a via, a circuit pattern layer, and a pad, and a manufacturing method thereof.

1 shows a printed circuit board according to an embodiment of the invention.
2 is a flowchart showing a method of manufacturing a printed circuit board according to an embodiment of the present invention;
3 to 13 are views showing major steps in a method of manufacturing a printed circuit board according to an embodiment of the present invention.

The terminology used in this application is used only to describe a specific embodiment and is not intended to limit the invention. The singular expressions include plural expressions unless the context clearly dictates otherwise.

In the present application, when a component is referred to as "comprising ", it means that it can include other components as well, without excluding other components unless specifically stated otherwise. Also, throughout the specification, the term "on" means to be located above or below the object portion, and does not necessarily mean that the object is located on the upper side with respect to the gravitational direction.

In addition, the term " coupled " is used not only in the case of direct physical contact between the respective constituent elements in the contact relation between the constituent elements, but also means that other constituent elements are interposed between the constituent elements, Use them as a concept to cover each contact.

It is also to be understood that the terms first, second, etc. used hereinafter are merely reference numerals for distinguishing between identical or corresponding components, and the same or corresponding components are defined by terms such as first, second, no.

The sizes and thicknesses of the respective components shown in the drawings are arbitrarily shown for convenience of explanation, and thus the present invention is not necessarily limited to those shown in the drawings.

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of a printed circuit board and a method of manufacturing the same according to the present invention will be described in detail with reference to the accompanying drawings, wherein like reference numerals designate like or corresponding components A duplicate description thereof will be omitted.

1 is a view illustrating a printed circuit board according to an embodiment of the present invention.

1, a printed circuit board 1000 according to an embodiment of the present invention includes a build-up layer 100, a via 200 and a first pad 300, and a second pad 400, A solder resist layer 500, and an electronic device 600. The solder-

The buildup layer 100 is a portion where a plurality of circuit pattern layers 111, 113 and 115 and insulating layers 121 and 123 are alternately stacked and a main portion of the printed circuit board 1000 according to the present embodiment Can be configured.

Specifically, the circuit pattern layers 111, 113, and 115 may be formed of circuits for performing predetermined functions such as a signal pattern, a power supply pattern, and a ground pattern. The circuit pattern layers 111, 113, May be made conductive through a via 200 or the like to be described later.

The number and arrangement of the circuit pattern layers 111, 113 and 115 and the insulating layers 121 and 123 may be varied depending on the type and use of the printed circuit board 1000, The structure of the circuit board 1000 is merely an example, and the present invention is not limited thereto.

The via 200 is formed in the buildup layer 100 so as to connect the circuit pattern layers 111, 113 and 115 of the respective layers and is staggeredly stacked along the longitudinal direction. The via holes 200 are formed in the insulating layers 121 and 123 The via 200 can be formed through plating or the like.

In this case, the vias 200 may not be formed integrally with the insulating layers 121 and 123 at one time, but may be formed sequentially for the insulating layers 121 and 123 of the respective layers, Vias 200 may be staggered stacked along the longitudinal direction.

The first pad 300 may include a circuit pattern layer 111, 113, 115 formed on the lower layer or a portion connected to the lower end of the via 200 formed to extend in one direction along the inclined surface from the upper end of the via 200, And may be a connection member for electrical connection between the circuit pattern layer 111, 113, 115 formed in the lower layer or the via 200 formed in the upper layer.

In this case, the planar area of the first pad 300 may be larger than the cross-sectional area of the vias 200, thereby increasing the reliability of the electrical connection.

The printed circuit board 1000 according to this embodiment can simultaneously form the vias 200, the circuit pattern layers 111, 113 and 115 and the first pads 300. That is, it is possible to form the vias 200 of each layer, the circuit pattern layers 111, 113, and 115, and the first pad 300 by a single plating process.

In particular, the vias 200 of each layer are stacked alternately along the longitudinal direction and the first pad 300 is formed to extend in one direction along the inclined plane, so that the vias 200 of each layer, the circuit pattern layers 111 and 113 , 115 and the first pad 300 can be simultaneously plated. Such a plating process will be described in detail in a manufacturing method of a printed circuit board to be described later.

As a result, the fabrication process of the printed circuit board 1000 according to the present embodiment can be simplified and the manufacturing cost and time can be reduced. Thus, the vias 200, the circuit pattern layers 111, 113, 115 and the first pad 300 can be integrally formed, the reliability of the electrical connection can be further improved.

The second pad 400 is formed on the outermost layer of the build-up layer 100 to extend in one direction along the inclined surface from the top of the via 200 formed on the first pad 300, And may be a connection terminal for electrical connection with the device 600 or the like. In this case, the second pad 400 can perform silver plating and nickel plating on the surface.

The second pad 400 is also formed to extend in one direction along the inclined surface from the top of the via 200 formed on the first pad 300. The second pad 400 may be formed in the outermost layer of the build- The via hole 115 and the via 200 and the second pad 400 may be simultaneously formed through a single plating process.

The solder resist layer 500 is formed on the buildup layer 100 so as to cover the circuit pattern layer 115 and the second pad 400 formed in the outermost layer of the buildup layer 100, The circuit pattern layer 115 formed on the layer can be protected. In this case, the solder resist layer 500 may be formed using one of a solid-state photosensitive material such as a dry film resist, a liquid resist, and an electrodeposition photoresist.

The electronic device 600 is electrically connected to the second pad 400 and mounted on the solder resist layer 500. The electronic device 600 may be an active device such as an IC chip or a passive device such as a capacitor or an inductor.

In this case, a terminal for electrical connection to the circuit pattern layer 115 and the second pad 400 may be formed in the electronic element 600, and a solder resist layer 500 on which the electronic element 600 is mounted may be formed in part The second pad 400 for electrical connection with the electronic device 600 may be exposed.

At least one of the insulating layers 111, 113, and 115 and the solder resist layer 500 in the printed circuit board 1000 according to the present embodiment may be formed of a photosensitive resin layer. In this case, the photosensitive resin layer refers to a resist, such as a PIPD (Photo Imageable Polyimide Dielectric), in which a portion irradiated with light is insoluble or soluble in a developing solution.

When at least one of the insulating layers 111, 113 and 115 and the solder resist layer 500 is formed of a photosensitive resin layer, the insulating layers 111, 113 and 115 and the solder resist layer 500 may be easier to remove.

2 is a flowchart illustrating a method of manufacturing a printed circuit board according to an embodiment of the present invention. 3 to 13 are views showing major steps in a method of manufacturing a printed circuit board according to an embodiment of the present invention.

As shown in FIGS. 2 to 13, a method of manufacturing a printed circuit board according to an embodiment of the present invention starts from the step of preparing the core layer 10 (S100, FIG. 3). In this case, the core layer 10 may be formed of an insulating resin layer such as polyimide (PI), and a through hole may be formed for conduction between both surfaces.

Next, the first insulating layer 121 is deposited on at least one surface of the core layer 10 (S200). In this case, the first insulating layer 121 may be formed of a liquid such as a resin and coated on the core layer 10 or may be formed in a solid phase such as a film and adhered on the core layer 10, Lt; / RTI >

In particular, the first insulating layer 121 may be formed of a photosensitive resin layer such as a PIPD (Photo Imageable Polyimide Dielectric).

Next, a part of the first insulating layer 121 is removed to correspond to the first circuit pattern layer 111 (S300, FIG. 4). That is, a part of the first insulating layer 121 is removed in a pattern shape in which the first circuit pattern layer 111 is to be formed through a subsequent process.

In this case, when the first insulating layer 121 is formed of a photosensitive resin layer such as PIPD, a part of the first insulating layer 121 may be removed through exposure and development processes.

Next, the first dry film layer 20 is laminated on the first insulating layer 121 (S400). In this case, the first dry film layer 20 is also a kind of photosensitive film layer, and can act as a mask when plating is performed in a subsequent process.

Next, a part of the first dry film layer 20 is removed to correspond to the first pad 300 and the second circuit pattern layer 113 (S500, FIG. 5). That is, a part of the first dry film layer 20 is removed in a pattern shape to be formed by the first pad 300 and the second circuit pattern layer 113 through a subsequent process. In this case as well, a part of the first dry film layer 20 can be removed through the exposure and development processes.

Next, the first circuit pattern layer 111, the first pad 300 and the second circuit pattern layer 113 are formed by plating (S600, FIG. 6). That is, plating is performed on the first insulating layer 121 and the first dry film layer 20 formed up to the step S500 to form the first circuit pattern layer 111, the first pad 300 and the second circuit pattern layer 113) can be formed at the same time.

In this case, the first circuit pattern layer 111, the first pad 300, and the second circuit pattern layer 113 can be formed through copper plating by forming a copper seed through chemical copper plating have.

When the through hole is formed in the core layer 10 in step S100, the inside of the through hole is plated when the first circuit pattern layer 111, the first pad 300 and the second circuit pattern layer 113 are formed. The via 200 may be formed at the same time.

Next, the remaining portion of the first dry film layer 20 is removed (S700, Fig. 7). That is, the remaining portion of the unnecessary first dry film layer 20 may be peeled and removed through a strip process or the like. In this case, the remaining portion of the first dry film layer 20 may be removed after the copper seed is removed by flash etching or the like.

As described above, the manufacturing method of the printed circuit board according to the present embodiment can reduce manufacturing cost and time, such as simplification of the manufacturing process, and can reduce the number of vias 200, circuit pattern layers 111, 113, 115 and the first pad 300 can be integrally formed, the reliability of the electrical connection can be further improved.

In addition, the second insulating layer 123 may be stacked on the first pad 300 and the second circuit pattern layer 113 (S800). In this case, the second insulating layer 123 may also be formed of a photosensitive resin layer such as a PIPD (Photo Imageable Polyimide Dielectric).

Next, a part of the second insulating layer 123 may be removed to correspond to the via 200 (S900, FIG. 8). That is, a part of the second insulating layer 123 is removed in a pattern shape in which the via 200 is formed through a subsequent process. In this case, when the second insulating layer 123 is formed of a photosensitive resin layer such as PIPD, a part of the second insulating layer 123 may be removed through exposure and development processes.

Next, the second dry film layer 30 may be laminated on the second insulating layer 123 (S1000). In this case, the second dry film layer 30 is also a kind of photosensitive film layer, and can act as a mask when plating is performed in a subsequent process.

Next, a portion of the second dry film layer 30 may be removed to correspond to the second pad 400 and the third circuit pattern layer 115 (S1100, FIG. 9). That is, a part of the second dry film layer 30 may be removed in a pattern shape to be formed of the second pad 400 and the third circuit pattern layer 115 through a subsequent process. In this case as well, a part of the second dry film layer 30 can be removed through the exposure and development processes.

Next, the via 200, the second pad 400, and the third circuit pattern layer 115 may be formed by plating (S1200, FIG. 10). That is, the second insulating layer 123 and the second dry film layer 30 formed up to the step S1100 are plated to form the via 200, the second pad 400, and the third circuit pattern layer 115 simultaneously .

In this case as well, a copper seed is first formed by chemical plating, and then the via 200, the second pad 400, and the third circuit pattern layer 115 can be formed by electroplating.

Next, the remaining portion of the second dry film layer 30 can be removed (S1300, FIG. 11). That is, the remaining portion of the unnecessary second dry film layer 30 may be peeled and removed through a strip process or the like. In this case, the copper seed may be removed by flash etching or the like, and then the remaining portion of the second dry film layer 30 may be removed.

Next, the solder resist layer 500 may be laminated on the second pad 400 and the third circuit pattern layer 115 so as to cover the second pad 400 and the third circuit pattern layer 115 S1400, Fig. 12). In this case, the solder resist layer 500 may also be formed of a photosensitive resin layer such as PIPD (Photo Imageable Polyimide Dielectric).

Next, a part of the solder resist layer 500 where the second pad 400 is formed can be removed (S1500). In this case, when the solder resist layer 500 is formed of a photosensitive resin layer such as PIPD, a part of the solder resist layer 500 can be removed through exposure and development processes.

Next, the electronic device 600 may be mounted on the solder resist layer 500 so as to be electrically connected to the second pad 400 (S1600, FIG. 13). In this case, the electronic device 600 may have a terminal for electrical connection with the circuit pattern layer 115 and the second pad 400, and the terminal may be connected to the exposed second pad 400.

In the meantime, since the main structure described in the method of manufacturing a printed circuit board according to an embodiment of the present invention has been described in detail on the printed circuit board according to the embodiment of the present invention, a detailed description will be omitted for the redundant contents .

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

10: core layer
20, 30: a dry film layer
100: Buildup layer
111, 113 and 115: circuit pattern layer
121, 123: insulating layer
200: Via
300: first pad
400: second pad
500: solder resist layer
600: electronic device
1000: printed circuit board

Claims (10)

A buildup layer in which a plurality of circuit pattern layers and an insulating layer are alternately stacked;
A plurality of vias formed in the buildup layer to connect the circuit pattern layers of each layer and stacked alternately along the longitudinal direction; And
A first pad connected to the bottom of the via formed in the upper layer and extending in one direction along the inclined plane from the top of the circuit pattern layer or the via formed in the lower layer;
And a printed circuit board.
The method according to claim 1,
A second pad formed on the outermost layer of the build-up layer and extending in one direction along the slope from the top of the via formed on the first pad;
And a printed circuit board.
3. The method of claim 2,
A solder resist layer formed on the buildup layer to cover the circuit pattern layer and the second pad formed in the outermost layer of the buildup layer;
And a printed circuit board.
The method of claim 3,
An electronic device electrically connected to the second pad and mounted on the solder resist layer;
And a printed circuit board.
5. The method according to any one of claims 1 to 4,
Wherein at least one of the insulating layer and the solder resist layer comprises a photosensitive resin layer.
Preparing a core layer;
Laminating a first insulating layer on at least one side of the core layer;
Removing a portion of the first insulating layer to correspond to the first circuit pattern layer;
Depositing a first dry film layer on the first insulating layer;
Removing a portion of the first dry film layer to correspond to the first pad and the second circuit pattern layer;
Forming the first circuit pattern layer, the first pad and the second circuit pattern layer through plating; And
Removing the remaining portion of the first dry film layer;
And a step of forming the printed circuit board.
The method according to claim 6,
Stacking a second insulating layer on the first pad and the second circuit pattern layer;
Removing a portion of the second insulating layer to correspond to the via;
Depositing a second dry film layer on the second insulating layer;
Removing a portion of the second dry film layer to correspond to the second pad and the third circuit pattern layer;
Forming the via, the second pad and the third circuit pattern layer through plating; And
Removing the remaining portion of the second dry film layer;
Further comprising the steps of:
8. The method of claim 7,
Stacking a solder resist layer on the second pad and the third circuit pattern layer to cover the second pad and the third circuit pattern layer;
Further comprising the steps of:
9. The method of claim 8,
Removing a portion of the solder resist layer at a portion where the second pad is formed; And
Mounting an electronic device on the solder resist layer so as to be electrically connected to the second pad;
Further comprising the steps of:
10. The method according to at least one of claims 6 to 9,
Wherein at least one of the first insulating layer, the second insulating layer, and the solder resist layer comprises a photosensitive resin layer.

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