KR20160066536A - Liquid crystal display and method of manufacturing the same - Google Patents

Abstract

Provided is a liquid crystal display device of which a process is simplified. The liquid crystal display device according to an embodiment of the present invention includes: a substrate; a thin film transistor positioned on the substrate; a pixel electrode connected to the thin film transistor; and color filters positioned to face the pixel electrode, wherein a plurality of microcavities are formed between the pixel electrode and the color filters, the microcavities form a liquid crystal layer having a liquid crystal material, a plurality of the microcavities are partitioned by a partition portion, and the partition portion is formed by a color filter of one color among the color filters.

Description

TECHNICAL FIELD [0001] The present invention relates to a liquid crystal display device and a method of manufacturing the same,

The present invention relates to a liquid crystal display device and a manufacturing method thereof.

The liquid crystal display device is one of the most widely used flat panel display devices and is composed of two display panels having an electric field generating electrode such as a pixel electrode and a common electrode and a liquid crystal layer interposed therebetween.

A voltage is applied to the electric field generating electrode to generate an electric field in the liquid crystal layer, thereby determining the orientation of the liquid crystal molecules in the liquid crystal layer and controlling the polarization of the incident light to display an image.

As one of liquid crystal display devices, a technique has been developed in which a plurality of micro-cavities are formed in a pixel and a liquid crystal is filled in the micro-cavity to implement a display. This technique can form a structure such as a loop layer to support the micro space. There is a problem that the process becomes complicated because several layers must be formed to form the loop layer.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a liquid crystal display device with simplified processes and a method of manufacturing the same.

A liquid crystal display according to an embodiment of the present invention includes a substrate, a thin film transistor disposed on the substrate, a pixel electrode connected to the thin film transistor, and a color filter facing the pixel electrode, A plurality of Wherein the micro-space is formed by a liquid crystal layer including a liquid crystal material, the plurality of micro-spaces are defined by barrier ribs, and the barrier ribs are formed by a color filter .

The partition wall portion may be a portion where the one color filter fills a spacing space between neighboring microspaces.

The barrier ribs may be formed along a direction in which a data line connected to the thin film transistor extends.

And a lower insulating layer disposed between the micro space and the color filter.

The color filter may be formed in a island shape.

An interface between adjacent color filters may be located on the partition wall.

Wherein the color filter includes a first color filter, a second color filter, and a third color filter, and wherein the color filter includes three color filters, a first color filter, a second color filter and a third color filter, The two partition walls may be formed of one of the first color filter, the second color filter, and the third color filter.

Wherein the color filter includes a first color filter, a second color filter, and a third color filter, and wherein the color filter includes three color filters, a first color filter, a second color filter and a third color filter, Each of the partition walls may be formed of the first color filter, the second color filter, and the third color filter.

The upper insulating layer may include an inorganic film. The upper insulating layer may include a spacing space for neighboring color filters formed on the partition wall. The upper insulating layer may cover the spacing space.

Wherein the color filter includes a first color filter, a second color filter, and a third color filter, wherein the first color filter, the second color filter, and the third color filter respectively have a blue color filter, a red color filter, Color filter.

The blue color filter may form the partition wall portion.

And an organic layer disposed on the color filter.

Wherein the color filter includes a first color filter, a second color filter, and a third color filter, wherein the first color filter, the second color filter, and the third color filter are located apart from each other, The space may be filled with the organic film.

The partition wall portion may be a portion where the one color filter fills a spacing space between neighboring microspaces.

The first color filter may form the partition wall portion, and the first color filter may be a blue color filter.

A common electrode and a lower insulating layer positioned between the fine space and the color filter, an upper insulating layer positioned on the color filter, and a capping layer located on the upper insulating layer.

A method of manufacturing a liquid crystal display device according to an embodiment of the present invention includes forming a thin film transistor on a substrate, forming a pixel electrode to be connected to the thin film transistor, forming a sacrificial layer on the pixel electrode, Forming a first color filter on the sacrificial layer, forming a second color filter on the sacrificial layer, forming a third color filter on the sacrificial layer, removing the sacrificial layer to form a plurality of fine spaces Forming a microcavity, injecting a liquid crystal material into the microspace, and forming a capping layer to cover the liquid crystal inlet of the microspace, wherein the first color filter, the second color filter, And one color filter of the third color filter fills the open portion.

The color filter that fills the open portion may form a partition wall portion, and the partition portion may partition the plurality of micro spaces.

The barrier ribs may be formed along a direction in which a data line connected to the thin film transistor extends.

The first color filter, the second color filter, and the third color filter may each be formed in an island shape.

And forming a lower insulating layer on the sacrificial layer.

And the interface between the adjacent color filters of the first color filter, the second color filter, and the third color filter may be formed on the partition wall.

Forming a spacing space of color filters adjacent to each other among the first color filter, the second color filter, and the third color filter on the partition wall portion, and forming an upper insulating layer covering the spacing space; , And the upper insulating layer may include an inorganic film.

The first color filter, the second color filter, and the third color filter may be formed of a blue color filter, a red color filter, and a green color filter, respectively, and the blue color filter may form the partition wall.

And forming an organic film on the first color filter, the second color filter, and the third color filter.

The first color filter, the second color filter, and the third color filter may be spaced apart from each other on the partition wall.

The spacing spaces of the first color filter, the second color filter, and the third color filter may be filled with the organic film.

The first color filter may form the partition wall portion, and the first color filter may be a blue color filter.

Forming an upper insulating layer on the first color filter, the second color filter, and the third color filter, and patterning the upper insulating layer to form a liquid crystal injection hole forming region, The formation region may be formed along a direction in which a gate line connected to the thin film transistor extends.

According to an embodiment of the present invention, the loop layer can be replaced by forming a color filter on the micro space. Therefore, the process can be simplified.

1 is a plan view of a liquid crystal display device according to an embodiment of the present invention.
2 is a cross-sectional view taken along line II-II in FIG.
3 is a cross-sectional view taken along line III-III in FIG.
4 is a plan view showing a color filter and a barrier rib in a liquid crystal display according to an embodiment of the present invention.
5 is a cross-sectional view taken along line VV in Fig.
6 is a cross-sectional view showing an embodiment modified from the embodiment described in Fig.
7 is a cross-sectional view showing an embodiment modified from the embodiment shown in Fig.
8 is a cross-sectional view showing an embodiment modified from the embodiment shown in Fig.
9 is a cross-sectional view showing an embodiment modified from the embodiment described in Fig.
10 is a plan view showing an embodiment modified from the embodiment shown in Fig.
11 is a plan view showing an embodiment modified from the embodiment described in Fig.
12 to 30 are a plan view and a cross-sectional view illustrating a method of manufacturing a liquid crystal display device according to an embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. However, the present invention is not limited to the embodiments described herein but may be embodied in other forms. Rather, the embodiments disclosed herein are provided so that the disclosure can be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

In the drawings, the thicknesses of layers and regions are exaggerated for clarity. Also, when a layer is referred to as being "on" another layer or substrate, it may be formed directly on another layer or substrate, or a third layer may be interposed therebetween. Like numbers refer to like elements throughout the specification.

1 is a layout diagram showing a liquid crystal display device according to an embodiment of the present invention. 2 is a cross-sectional view taken along line II-II in FIG. 3 is a cross-sectional view taken along line III-III in FIG.

FIG. 1 shows a 2X2 pixel area part of a plurality of pixel areas, and the liquid crystal display device according to an embodiment of the present invention can repeatedly arrange such pixel areas in up, down, left, and right directions.

1 to 3, gate lines 121 and sustain electrode lines 131 are formed on a substrate 110 made of transparent glass or plastic. The gate line 121 includes a gate electrode 124. The sustain electrode line 131 extends mainly in the lateral direction and transmits a predetermined voltage such as the common voltage Vcom. The sustain electrode line 131 includes a pair of vertical portions 135a extending substantially perpendicular to the gate line 121a and a horizontal portion 135b connecting ends of the pair of vertical portions 135a. The vertical portion 135a and the horizontal portion 135b have a structure that surrounds the pixel electrode 191.

A gate insulating film 140 is formed on the gate line 121 and the storage electrode line 131. A semiconductor layer 151 located under the data line 171, a lower portion of the source / drain electrode and a semiconductor layer 154 located in the channel portion of the thin film transistor Q are formed on the gate insulating layer 140.

A plurality of resistive contact members may be formed on the semiconductor layers 151 and 154 and between the data line 171 and the source / drain electrodes, which are not shown in the drawings.

Data conductors 171 and 173 including a data line 171 and a drain electrode 175 connected to the source electrode 173 and the source electrode 173 are formed on the semiconductor layers 151 and 154 and the gate insulating film 140, And 175 are formed.

The gate electrode 124, the source electrode 173 and the drain electrode 175 together with the semiconductor layer 154 form a thin film transistor Q. The channel of the thin film transistor Q is connected to the source electrode 173 And the drain electrode 175, as shown in FIG.

A first interlayer insulating film 180a is formed on the portion of the semiconductor layer 154 exposed by the data conductors 171, 173, and 175 and the source electrode 173 and the drain electrode 175. The first interlayer insulating film 180a may include an inorganic material such as silicon nitride (SiNx) and silicon oxide (SiOx).

A second interlayer insulating film 180b and a third interlayer insulating film 180c may be disposed on the first interlayer insulating film 180a. The second interlayer insulating film 180b may be formed of an organic material and the third interlayer insulating film 180c may include an inorganic material such as silicon nitride (SiNx) and silicon oxide (SiOx). The second interlayer insulating film 180b may be formed of an organic material to reduce or eliminate the level difference. One or two films of the first interlayer insulating film 180a, the second interlayer insulating film 180b and the third interlayer insulating film 180c may be omitted, unlike the present embodiment.

The contact hole 185 may be formed through the first interlayer insulating film 180a, the second interlayer insulating film 180b, and the third interlayer insulating film 180c. The pixel electrode 191 located above the drain electrode 175 and the third interlayer insulating film 180c can be electrically and physically connected through the contact hole 185. [ Hereinafter, the pixel electrode 191 will be described in detail.

The pixel electrode 191 may be made of a transparent conductive material such as ITO or IZO.

The pixel electrode 191 has a rectangular cross-section including a transverse trunk 191a and an intersecting trunk 191b. And is divided into four subregions by the transverse stripe portion 191a and the vertical stripe portion 191b, and each subregion includes a plurality of fine edge portions 191c. In addition, in this embodiment, the pixel electrode 191 may further include an outline rib portion 191d connecting the fine branch portion 191c at the right and left outer edges thereof. In this embodiment, the outline line base 191d is located on the left and right outer sides of the pixel electrode 191, but may extend to the upper or lower portion of the pixel electrode 191. [

The fine branch portions 191c of the pixel electrode 191 form an angle of approximately 40 to 45 degrees with the gate line 121 or the horizontal stripe portion. Further, the fine branches of neighboring two subregions may be orthogonal to each other. Further, the width of the fine branch portions may gradually increase or the intervals between the fine branch portions 191c may be different.

The pixel electrode 191 is connected at the lower end of the vertical stripe portion 191b and includes an extended portion 197 having a larger area than the vertical stripe portion 191b and the contact hole 185 at the extended portion 197 And a drain voltage is applied from the drain electrode 175. The drain electrode 175 and the drain electrode 175 are electrically connected to each other.

The description of the thin film transistor Q and the pixel electrode 191 described above is one example, and the thin film transistor structure and the pixel electrode design can be modified to improve the side viewability.

The light shielding member 220 is positioned so as to cover the region where the thin film transistor Q is formed on the pixel electrode 191. The light shielding member 220 according to the present embodiment may be formed along the direction in which the gate line 121 extends. The light shielding member 220 may be formed of a material capable of blocking light.

The insulating film 181 may be formed on the light shielding member 220 and the insulating film 181 may extend over the pixel electrode 191 to cover the light shielding member 220.

A lower alignment layer 11 is formed on the pixel electrode 191 and a lower alignment layer 11 may be a vertical alignment layer. The lower alignment layer 11 may include at least one material commonly used as a liquid crystal alignment layer such as polyamic acid, polysiloxane, or polyimide. Further, the lower alignment film 11 may be a photo alignment film.

The upper alignment layer 21 is located at a portion opposite to the lower alignment layer 11 and the minute space 305 is formed between the lower alignment layer 11 and the upper alignment layer 21. A liquid crystal material including the liquid crystal molecules 310 is injected into the fine space 305 and a liquid crystal injection hole 307 is provided through the fine space 305. The fine space 305 may be formed along the column direction, that is, along the longitudinal direction of the pixel electrode 191. In this embodiment, the alignment substance forming the alignment films 11 and 21 and the liquid crystal material including the liquid crystal molecules 310 may be injected into the fine space 305 using a capillary force.

The fine space 305 is divided in the vertical direction by a plurality of liquid crystal injection hole forming regions 307FP located at the portions overlapping the gate lines 121 to form a plurality of fine spaces 305, (305) may be formed along the column direction, that is, along the longitudinal direction of the pixel electrode (191). The fine space 305 is divided in the lateral direction by the partition wall PWP to be described later to form a plurality of fine spaces 305. The plurality of fine spaces 305 are arranged in the row direction of the pixel electrode 191 That is, along the lateral direction in which the gate line 121 extends. Each of the plurality of fine spaces 305 may correspond to one or more pixel regions, and the pixel region may correspond to an area for displaying a screen.

On the upper alignment film 21, a common electrode 270 and a lower insulating layer 350 are positioned. The common electrode 270 receives a common voltage and generates an electric field together with the pixel electrode 191 to which the data voltage is applied to generate a direction in which the liquid crystal molecules 310 located in the fine space 305 between the two electrodes are tilted . The common electrode 270 and the pixel electrode 191 form a capacitor to maintain the applied voltage even after the TFT is turned off. A lower insulating layer 350 may be formed of a silicon nitride (SiNx) or silicon oxide (SiO _X).

In this embodiment, the common electrode 270 is formed at the upper end of the micro space 305. However, in another embodiment, the common electrode 270 is formed under the micro space 305, It is possible.

In this embodiment, the color filter 230 is disposed on the lower insulating layer 350. As shown in FIG. 3, the color filter 230 of one color among the neighboring color filters forms a partition wall PWP. The partition wall portion PWP is located between the neighboring fine spaces 305 in the transverse direction. The partition wall portion PWP is a portion that fills the spacing space of the neighboring fine space 305 in the transverse direction. As shown in FIG. 3, the partition PWP is formed so as to completely fill the spacing space of the fine space 305, but the present invention is not limited thereto. The partition wall PWP may be modified to fill a part of the spacing space. The partition wall portion PWP may be formed along the direction in which the data line 171 extends.

The neighboring color filters 230 on the partition wall PWP may overlap. The interface at which the neighboring color filters 230 meet may be located at a portion corresponding to the partition wall PWP.

In this embodiment, the color filter 230 and the partition wall PWP serve as a loop layer for supporting the shape of the fine space 305.

Hereinafter, the color filter 230 according to an exemplary embodiment of the present invention will be described in detail with reference to FIGS. 4 and 5. FIG.

4 is a plan view showing a color filter and a barrier rib in a liquid crystal display according to an embodiment of the present invention. 5 is a cross-sectional view taken along line V-V in Fig. 4 and 5 are views schematically illustrating a color filter and a partition wall in a liquid crystal display according to an exemplary embodiment of the present invention. Components between the substrate 110 and the fine space 305 are shown in FIG. 1 to 3 can be applied as they are.

4 and 5, the color filter 230 according to the present embodiment includes a first color filter, a second color filter, and a third color filter, and the first color filter includes a blue color filter B, The second color filter may include a red color filter (R), and the third color filter may include a green color filter (G).

According to the present embodiment, the partition wall portion PWP is formed by any one of the first color filter, the second color filter, and the third color filter. In an embodiment of the present invention, the first color filter corresponding to the blue color filter B forms the partition wall PWP. The blue color filter B includes a partition wall portion PWP extending from a portion corresponding to the pixel region PX and a partition wall portion PW located between the red color filter R and the green color filter G can do. At this time, the red color filter R and the green color filter G simultaneously cover the opposite edge portions of the adjacent partition wall portions PWP, and can overlap each other on the partition wall portion PWP.

It is also possible to form the partition wall portion PWP with a red color filter R or a green color filter G instead of the blue color filter B. [ However, since the blue color filter B has a large effect of blocking light compared to the red color filter R or the green color filter G, when the partition wall PWP is formed by the blue color filter B, It is possible to reduce the reflection of light by the light. In addition, the blue color filter B has a good taper angle because of its excellent light blocking effect and excellent flowability of the photoresist as a component of the color filter. Accordingly, if the undercut is formed at the end of the color filter forming the partition wall portion PWP or is formed at an angle of about 45 degrees or more than when the undercut is formed in the vertical direction, the partition wall portion PWP is covered with the side wall of the partition wall PWP, Color filters can be formed well.

As shown in FIG. 4, the color filter 230 can be formed in a island shape corresponding to the pixel region PX.

2 and 3, an upper insulating layer 370 is located on the color filter 230. [ An upper insulating layer 370 may be formed of a silicon nitride (SiNx) or silicon oxide (SiO _X). The side surface portion of the color filter 230 can be covered as shown in Fig.

A capping layer 390 is located on the upper insulating layer 370. The capping layer 390 is also located in the liquid crystal injection port formation region 307FP and covers the liquid crystal injection port 307 of the fine space 305 exposed by the liquid crystal injection port formation region 307FP. The capping layer 390 comprises an organic or inorganic material. Here, although the liquid crystal material is removed in the liquid crystal injection hole forming region 307FP, The remaining liquid crystal material may remain in the liquid crystal injection port formation region 307FP

In this embodiment, as shown in FIG. 3, a partition wall PWP is formed by one color filter 230 between the adjacent fine spaces 305 in the transverse direction. The partition wall PWP can partition or define the fine space 305 by forming a partition wall. In this embodiment, since there is a partition structure like the partition wall PWP between the fine spaces 305, the stress generated even when the substrate 110 is warped is reduced, and the degree of change of the cell gap is reduced have.

6 is a cross-sectional view showing an embodiment modified from the embodiment described in Fig.

Referring to FIG. 6, the color filter 230 adjacent to each of the partition walls PWP is extended to form a partition wall PWP, which is almost the same as the embodiment described with reference to FIG. 6, two color filters 230 are adjacent to one partition wall PWP, and the color filters B, R and G extend in the same direction to form the partition wall PWP, . The neighboring color filters 230 may have an interface at a position deviated from the partition wall PWP or may have an interface part overlapping on the partition wall PWP and the rest being located at a part deviating from the partition wall PWP have.

However, the present invention is not limited to this embodiment, and the partition wall portion PWP positioned between the blue color filter B and the red color filter R may be formed by extending the red color filter R, And the green color filter G may be formed by extending the green color filter G. [

In addition to the differences described above, the description of FIG. 5 can be applied to all of the embodiments.

7 is a cross-sectional view showing an embodiment modified from the embodiment shown in Fig.

Referring to FIG. 7, the color filters 230 are almost the same as in the embodiment described with reference to FIG. 5, but neighboring color filters 230 are spaced apart from each other on the partition PWP. This spacing space is covered by an upper insulating layer 370 and a capping layer 390 located above the color filter 230.

In addition to the differences described above, the description of FIG. 5 can be applied to all of the embodiments.

8 is a cross-sectional view showing an embodiment modified from the embodiment shown in Fig.

Referring to FIG. 8, the color filters 230 are almost the same as the embodiment described in FIG. 5, but neighboring color filters 230 are spaced apart from each other on the partition PWP. This spacing space may be filled with an organic film 360 located above the color filter 230. The organic film 360 may be a planarizing film and the step between the neighboring color filters 230 may be reduced to prevent the capping failure from being formed in the upper insulating layer 370 formed on the organic film 360.

In addition to the differences described above, the description of FIG. 5 can be applied to all of the embodiments.

9 is a cross-sectional view showing an embodiment modified from the embodiment described in Fig.

Referring to FIG. 9, a light shielding member 220 is formed along the direction in which the data line 171 extends, which is almost the same as the embodiment described with reference to FIG. The light shielding member 220 is located on the third interlayer insulating film 180c or the pixel electrode 191. [ The light shielding member 220 described herein may be formed in a lattice shape together with the light shielding member 220 extending along the direction of the gate line 121. [

10 is a plan view showing an embodiment modified from the embodiment shown in Fig.

The embodiment described in Fig. 10 is substantially the same as the embodiment described in Fig. However, in the embodiment described with reference to FIG. 4, the upper and lower neighboring color filters may be formed in a island shape so as to be separated into the pixel region PX, but the embodiment of FIG. 10 may include a connecting portion in the upper and lower neighboring color filters . For example, the blue filter B may be connected vertically by the first connection part B-1 without being separated vertically. The red color filter R and the green color filter G may be connected in the longitudinal direction by the second connection part R-1 and the third connection part G-1, respectively.

The area of the liquid crystal injection hole forming region 307FP can be reduced if the sizes of the first connection portion B-1, the second connection portion R-1, and the third connection portion G-1 are increased. Accordingly, the size and position of the connection portions B-1, R-1, and G-1 can be adjusted so as not to be disturbed by the injection of the alignment material and the liquid crystal material into the fine space 305 through the liquid crystal injection hole 307 have.

11 is a plan view showing an embodiment modified from the embodiment described in Fig.

The embodiment described in Fig. 11 is substantially the same as the embodiment described in Fig. In the embodiment shown in FIG. 10, the connecting portions of the color filters adjacent to the upper and lower colors are located at the middle portion with respect to the short side of the pixel region PX. However, in the embodiment of FIG. 11, And may be positioned at the left and right edges with respect to the short side of the region PX.

Hereinafter, one embodiment of a method of manufacturing the above-described liquid crystal display device will be described with reference to FIGS. 12 to 30. FIG. The embodiment described below is an embodiment of the manufacturing method and can be modified in other forms.

12 to 30 are a plan view and a cross-sectional view illustrating a method of manufacturing a liquid crystal display device according to an embodiment of the present invention. Figures 12, 14, 16, 24, 26, 27 and 28 are cross-sectional views taken along the cutting line II-II in Figure 1 in order. Figs. 13, 15, 17, 25, 28 and 30 are cross-sectional views taken along the cutting line III-III in Fig. FIGS. 18, 20, and 22 are plan views illustrating a color filter and a partition wall portion in a method of manufacturing a liquid crystal display device according to an embodiment of the present invention. 19, 21 and 23 are respectively a sectional view cut along the cutting line XVI-XVI in FIG. 18, a sectional view cut along the cutting line XVIII-XVIII in FIG. 20, and a cutting line XX-XX in FIG.

1, 12 and 13, a gate insulating film 140 is formed on a gate line 121 and a gate line 121 extending in a lateral direction to form a switching device generally known on a substrate 110 The semiconductor layers 151 and 154 are formed on the gate insulating film 140 and the source electrode 173 and the drain electrode 175 are formed. At this time, the data line 171 connected to the source electrode 173 can be formed to extend in the vertical direction while crossing the gate line 121.

A first interlayer insulating film 180a is formed on the data conductors 171, 173, and 175 including the source electrode 173, the drain electrode 175, and the data line 171, and the exposed semiconductor layer 154 .

A second interlayer insulating film 180b and a third interlayer insulating film 180c are formed on the first interlayer insulating film 180a and a contact hole 185 penetrating the first interlayer insulating film 180b and the third interlayer insulating film 180c is formed. A pixel electrode 191 may be formed on the third interlayer insulating film 180c and the pixel electrode 191 may be electrically and physically connected to the drain electrode 175 through the contact hole 185. [

The light shielding member 220 is formed on the pixel electrode 191 or the third interlayer insulating film 180c. The light shielding member 220 may be formed along the direction in which the gate line 121 extends. The light shielding member 220 may be formed of a material capable of blocking light. The insulating film 181 may be formed on the light shielding member 220 and extend over the pixel electrode 191 while covering the light shielding member 220.

Thereafter, a sacrifice layer 300 is formed on the pixel electrode 191. At this time, an opening OPN is formed in the sacrificial layer 300 along a direction parallel to the data line 171. [ The opening portion OPN may be filled with the color filter 230 to form the partition wall portion PWP in a subsequent process. The sacrificial layer 300 may be formed of a photoresist or an organic material other than the photoresist.

Referring to FIGS. 1, 14, and 15, a common electrode 270 and a lower insulating layer 350 are sequentially formed on the sacrificial layer 300. As shown in FIG. 15, the common electrode 270 and the lower insulating layer 350 may cover the open portion OPN.

Referring to FIGS. 1, 16 and 17, a color filter 230 is formed on the lower insulating layer 350. The color filter 230 may be removed in a region corresponding to the light shielding member 220 positioned between adjacent pixel regions in the longitudinal direction by a patterning process or an exposure / development process. As shown in FIG. 16, the color filter 230 exposes the lower insulating layer 350 to the outside in a region corresponding to the light shielding member 220. At this time, as shown in FIG. 17, the color filter 230 forms the partition wall portion PWP while filling the open portion OPN of the vertical light shielding member 220b. In this embodiment, the color filter for filling the open portion (OPN) is a color filter 230 of one color. The color filters 230 forming the barrier ribs PWP and the neighboring color filters 230 may overlap each other on the barrier ribs PWP. However, in a modified embodiment, the adjacent color filters 230 may be formed to be spaced apart above the partition PWP.

Hereinafter, a process of fabricating the color filter 230 according to an embodiment of the present invention will be described in detail with reference to FIGS. 18 to 23. FIG.

Referring to FIGS. 18 and 19, a blue color filter B is formed on the sacrificial layer 300. At this time, the blue color filter B is formed so as to fill the space between the sacrificial layers 300 spaced in the transverse direction. The blue color filter B is formed in a portion corresponding to the pixel region PX and the blue color filter B formed corresponding to the pixel region PX extends to form the partition wall portion PWP. Further, only the partition wall portion PWP is formed between the two pixel regions PX where the blue color filter B is not formed. It is preferable that the partition wall portion PWP formed by extending the blue color filter B and the partition wall portion PWP separated from each other are formed using one mask. In order to form the structure described with reference to FIG. 6, a blue color filter B may be formed to form a portion corresponding to the pixel region PX and a partition wall portion PWP extending therefrom. However, the blue color filter B May not be formed in the spacing space between the two pixel regions PX. The spacing space between the sacrificial layers 300 not filled by the color filter 230 may be filled with the partition wall in the process of forming the subsequent red color filter R or green color filter G. [

Referring to FIGS. 20 and 21, a red color filter R is formed on the sacrificial layer 300. The red color filter R is formed so as to overlap with the partition wall portion PWP and can overlap the blue color filter B and the partition wall portion PWP.

Referring to FIGS. 22 and 23, a green filter G is formed on the sacrificial layer 300. The green color filter G is formed so as to overlap the partition wall portion PWP and can overlap the blue color filter B and the red color filter R on the partition wall portion PWP.

The formation positions and order of the red color filter (R) and the green color filter (G) described above can be changed. 23, the thicknesses of the blue color filter B, the red color filter R and the green color filter G may be different from each other. The reason why the thicknesses of the blue color filter (B), the red color filter (R), and the green color filter (G) are different from each other may be for adjusting the color coordinates in each color filter. Or the height of the blue color filter (B), the red color filter (R) and the green color filter (G) may be different from each other. At this time, the thicknesses of the sacrifice layer 300 corresponding to the color filters R, G, and B may be made different from each other in order to make the heights of the color filters different from each other. Thereafter, when the sacrificial layer 300 is removed, the micro-spaces 305 having different heights can be provided, and the height of each of the color filters disposed thereon may be different from each other.

to the next, Referring to FIGS. 1, 24, and 25, an upper insulating layer 370 is formed to cover the color filter 230 and the exposed lower insulating layer 350.

26, the upper insulating layer 370, the lower insulating layer 350 and the common electrode 270 are etched so that the upper insulating layer 370, the lower insulating layer 350, and the common electrode 270 are partially Thereby forming the liquid crystal injection port formation region 307FP. In this case, the upper insulating layer 370 may have a structure for covering the side surface of the color filter 230. However, the present invention is not limited thereto, and the upper insulating layer 370 covering the side surface of the color filter 230 may be removed, So that the side surface of the protrusion 230 may be exposed to the outside.

27 and 28, the sacrifice layer 300 is removed through an oxygen (O ₂ ) ashing process or a wet etching process through the liquid crystal injection port formation region 307FP. At this time, a fine space 305 having a liquid crystal injection hole 307 is formed. The fine space 305 is a vacant space state after the sacrifice layer 300 is removed.

Referring to FIGS. 29 and 30, alignment materials 11 and 21 are formed on the pixel electrode 191 and the common electrode 270 by injecting an alignment material through the liquid crystal injection hole 307. Specifically, an alignment material containing a solid content and a solvent is injected through a liquid crystal injection port 307, and then a baking process is performed.

Next, a liquid crystal material including the liquid crystal molecules 310 is injected into the fine space 305 through the liquid crystal injection port 307 using an inkjet method or the like.

Thereafter, the capping layer 390 is formed on the upper insulating layer 370 to cover the liquid crystal injection hole 307 and the liquid crystal injection hole forming region 307FP, thereby forming a liquid crystal display device as shown in FIG.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, Of the right.

230 color filter 300 sacrificial layer
305 microcavity 307 liquid crystal inlet
350 lower insulating layer 370 upper insulating layer
390 capping layer

Claims (20)

Board,
A thin film transistor disposed on the substrate,
A pixel electrode connected to the thin film transistor,
A plurality of color filters disposed opposite to the pixel electrodes,
A plurality of color filters arranged between the pixel electrodes and the plurality of color filters; A liquid crystal layer located in a microcavity,
A common electrode positioned between the liquid crystal layer and the color filter,
A lower insulating layer positioned between the common electrode and the color filter, and
And a plurality of partition walls positioned between adjacent ones of the plurality of fine spaces,
At least one of the plurality of barrier ribs has a color filter of one color among the plurality of color filters,
Wherein the barrier rib overlaps the liquid crystal layer with respect to a direction parallel to the substrate,
And the partition wall portion is formed by extending the color filter located on the liquid crystal layer. The method of claim 1,
Wherein the color filter includes a first color filter, a second color filter, and a third color filter, and wherein the color filter includes three color filters, a first color filter, a second color filter and a third color filter, Wherein the first, second, and third color filters are formed of the first color filter, the second color filter, and the third color filter, respectively. 3. The method of claim 2,
Wherein the barrier ribs are formed along a direction in which data lines connected to the thin film transistors extend. 4. The method of claim 3,
And an interface where the neighboring color filters meet is located on the partition wall. The method of claim 1,
Wherein the color filter includes a first color filter, a second color filter, and a third color filter, and wherein the color filter includes three color filters, a first color filter, a second color filter and a third color filter, Wherein the first and second color filters are formed of one of the first color filter, the second color filter, and the third color filter. The method of claim 1,
Further comprising an upper insulating layer formed on the barrier ribs and spaced apart from the adjacent color filters, the upper insulating layer covering the spacing spaces,
Wherein the upper insulating layer comprises an inorganic film. The method of claim 1,
Wherein the color filter includes a first color filter, a second color filter, and a third color filter, wherein the first color filter, the second color filter, and the third color filter respectively have a blue color filter, a red color filter, Color filter. 8. The method of claim 7,
And the blue color filter forms the partition wall portion. The method of claim 1,
An organic film disposed on the color filter, and
And an upper insulating layer disposed on the organic layer and including an inorganic material,
Wherein the color filter includes a first color filter, a second color filter, and a third color filter, wherein the first color filter, the second color filter, and the third color filter are located apart from each other, And the spacing space is filled with the organic film. The method of claim 9,
Wherein the partition wall portion is a portion filled with the color filter of one color so that a spacing space between neighboring fine spaces is filled. 11. The method of claim 10,
Wherein the first color filter forms the partition wall portion, and the first color filter is a blue color filter. 12. The method of claim 11,
And a capping layer disposed on the upper insulating layer. Forming a thin film transistor on the substrate,
Forming a pixel electrode to be connected to the thin film transistor,
Forming a sacrificial layer having an open portion on the pixel electrode,
Forming a first color filter on the sacrificial layer,
Forming a second color filter on the sacrificial layer,
Forming a third color filter on the sacrificial layer,
Forming a common electrode on the sacrificial layer,
Forming a lower insulating layer on the common electrode,
Removing the sacrificial layer to form a plurality of microcavities,
Injecting a liquid crystal material into the plurality of micro-spaces to form a liquid crystal layer, and
And forming a capping layer to cover the liquid crystal injection ports of the plurality of micro spaces,
Wherein one of the first color filter, the second color filter and the third color filter fills the open portion,
The color filter for filling the open portion forms a partition wall portion, the partition wall portion overlaps the liquid crystal layer with respect to a direction parallel to the substrate,
And the partition wall portion is formed by extending the color filter disposed on the liquid crystal layer. The method of claim 13,
And the partition wall partitions the plurality of micro-spaces. The method of claim 14,
Wherein the barrier ribs are formed along a direction in which data lines connected to the thin film transistors extend. The method of claim 13,
Forming a spacing space of color filters adjacent to each other among the first color filter, the second color filter, and the third color filter on the partition wall portion, and forming an upper insulating layer covering the spacing space; ,
Wherein the upper insulating layer comprises an inorganic film. 17. The method of claim 16,
And the spacing space is formed to overlap with the partition wall portion. The method of claim 13,
Forming an organic film on the first color filter, the second color filter, and the third color filter;
And forming an upper insulating layer including an inorganic material on the organic layer. The method of claim 18,
Wherein the first color filter, the second color filter, and the third color filter are spaced apart from each other on the partition wall, and the spacing spaces of the first color filter, the second color filter, A method of manufacturing a liquid crystal display device filled with an organic film. The method of claim 13,
Forming an upper insulating layer on the first color filter, the second color filter, and the third color filter, and
Forming a liquid crystal injection hole forming region by patterning the upper insulating layer,
Wherein the liquid crystal injection hole forming region is formed along a direction in which a gate line connected to the thin film transistor extends.

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