KR20160048860A - Methods and apparatuses for prime number generation and storage - Google Patents

Abstract

One feature is to repeatedly generate a random number seed S having k bits, generate a random number R with n bits based on the seed S, -k is less than n, and if the random number R is a prime number By determining whether or not the primitive is a primitive. The steps are repeated until the generated random number R is determined to be a decimal number, and when the generated random number R is determined to be a decimal number, the random number seed S used to generate the random number R is stored in the memory circuit. Thereafter, the stored random number seed S can be deleted from the memory circuit, and the prime number is regenerated based on the random number seed S. In one example, the generated random number R is additionally based on a secret key k _S that can be stored in a secure memory circuit.

Description

METHODS AND APPARATUS FOR PRIME NUMBER GENERATION AND STORAGE FIELD OF THE INVENTION [0001]

[0001] The various features relate to cryptography, and more particularly to methods and apparatus for generation and efficient storage of prime numbers.

[0002] Many cryptographic security algorithms, such as the Rivest Shamir Adleman (RSA) algorithm, operate using cryptographic keys. These keys are typically generated using key generation processes that may require relatively large (e.g., 512 bits, 1,024 bits, etc.) prime numbers. However, prime number generation is a slow process, and the processing time associated with prime generation typically operates as bottleneck in key generation processes. The required processing time is proportional to the cube of the bit length of the key to be generated by the key generation process. For example, generating 2,048 bit cryptographic keys and 3,072 bit cryptographic keys may be 8 and 27 times slower than generating 1,024 bit keys, respectively. In mobile device applications where power and rate constraints are involved, these increases in power consumption and processing time are adversely affected.

[0003] Depending on some applications, cryptographic keys may be generated "off-line" in that these cryptographic keys are generated before the cryptographic keys are actually required by the application. The decimals or cryptographic keys used to generate the cryptographic keys generated in such an off-line manner are typically stored in memory and then forwarded to the application (s) upon request. In that case, the bottleneck at the processing time associated with the key generation described above is virtually eliminated. However, one outstanding issue with such off-line key generation schemes is that the prime numbers used to generate the keys and / or keys can be relatively large (e.g., greater than 1,024 bits) and that such large keys and / The necessary memory circuits required to store < RTI ID = 0.0 > a < / RTI > To alleviate this problem, regular data compression schemes are not very applicable in these cases because cryptographic keys and decimals have high entropy and can not be efficiently compressed for conventional compression algorithms to be.

[0004] Therefore, new methods and devices are needed to help generate and store prime numbers to minimize the amount of memory required to store cryptographic security algorithms, e.g., large prime numbers for use in RSA.

[0005] One feature provides a method for generating and storing seed values for prime generation. This method repeatedly generates a random number seed S having k bits, generates a random number R having n bits based on the seed S, and repeatedly generates a random number R with -k being n , And determining whether the random number R is a prime number, thereby generating a prime number. The random number seed S used to generate the random number R determined to be a prime number is stored in the memory circuit. According to an aspect, the method further includes the steps of retrying the stored random seed S from the memory circuit, and regenerating the prime number based on the random seed S. According to another aspect, the method further comprises generating an encryption key based on the prime number.

[0006] According to an aspect, the method further includes deleting the random number R from the memory circuit after storing the seed S. According to another aspect, generating the random number R is further based on the secret key k _S. According to another aspect, the method further comprises storing the secret key k _S used to generate the random number R determined to be a prime number in the secure memory circuit.

[0007] According to an aspect, the random number seed S is stored prior to receiving a request for one or more prime numbers from the cryptographic key generation process. According to another aspect, generating a random number R based on the seed S includes executing a one-way function f that receives the seed S as input and generates a random number R as output, which one- / ≪ / RTI > or a block cipher.

[0008] Another feature provides an apparatus for generating and storing seed values for fractional generation, the apparatus comprising a memory circuit, and a processing circuit communicatively coupled to the memory circuit, the processing circuit comprising: , Repeatedly generating a random number seed S with k bits until a random number R is determined to be a prime, generating a random number R with n bits based on the seed S, and -k is less than n, And by determining whether the random number R is a prime number, generating a prime number and storing the random number seed S used to generate the random number R determined to be a prime number in a memory circuit. According to an aspect, the processing circuitry is further configured to retrieve the stored random seed S from the memory circuit, and regenerate the prime number based on the random seed S. According to another aspect, the processing circuitry is further configured to generate a cryptographic key based on a prime number. In accordance with another aspect, a random seed S is stored prior to receiving a request for one or more primes from the cryptographic key generation process. According to another aspect, generating a random number R determined to be a prime number is further based on a secret key k _S , and the processing circuitry is further configured to store the secret key k _S in a secure memory circuit.

[0009] Another feature provides an apparatus for generating and storing seed values for the generation of prime numbers, the apparatus repeatedly generating random seeds S having k bits, until the determined random number R is determined to be a prime number Means for generating a random number R with n bits based on the seed S and -k is less than n, and means for determining whether the random number R is a prime number, And means for storing the random number seed S used to generate the determined random number R in the memory circuit. According to an aspect, the apparatus further comprises means for recycling the stored random number seed S from the memory circuit, and means for regenerating a prime number based on the random number seed S. According to another aspect, generating a random number R determined to be a prime number is further based on the secret key k _S , and the apparatus further comprises means for storing the secret key k _S in the secure memory circuit.

[0010] Other features provide a computer-readable storage medium having stored thereon one or more instructions, wherein instructions, when executed by the at least one processor, cause the processor to perform the steps of: By repeatedly generating a random number seed S with k bits, generating a random number R with n bits based on the seed S, -k is less than n, and determining whether the random number R is a prime number, To generate a prime number, and to store the random number seed S used to generate the random number R determined to be a prime number in a memory circuit. According to an aspect, the instructions further cause the processor to retrieve the stored random seed S from the memory circuit, and regenerate the prime number based on the random seed S.

[0011] Another feature provides a method for generating and storing seed values for fractional generation, the method comprising: generating a random seed S having k bits and a plurality of supplemental seeds each having g bits, T phase, the method comprising: respectively generating a plurality of second seed of S _i based on a plurality of supplemental seed of T _i of different supplemental seed and the random number seed S of generating a _i, a plurality of random numbers, each having n bits the R _i for generating -n + k is less than g and, R _i each of a plurality of random number being based on a second, different seed of the plurality of the second seed s _i -, at least one of the plurality of random numbers R _i comprising: a single random number R _P determined that the minority-random number R _P is the second basis of the seed s _P of the plurality of second seed to s _i, and the replacement of the second seed s _P includes a plurality of supplemental seed of T _i seed based on the random number seed, and T _P S -, S, and the random number seed, and the seed supplemental memory T _P times To include the step of storing. According to an aspect, the plurality of random numbers R _i are additionally based on the secret key k _S , and the method further comprises storing the secret key k _S in the secure memory circuit. According to another aspect, the method, further comprising the step of: on the basis of a random number seed S and the supplemental seed T _P stored from the memory circuit in step, and the random number seed S and supplemental seed T _P for living discrete regenerate few random number R _P do. According to another aspect, the random seed S and the supplemental seed T _P are stored prior to receiving a request for one or more prime numbers from the cryptographic key generation process, and the method further comprises: the steps comprising: generating an encryption key based on a small number of the random number R _P, and providing the encryption key to the encryption key generating process for receiving a request for a small number of excess further includes.

[0012] According to one aspect, generating a plurality of random numbers R _i based on different second seeds of the plurality of second seeds S _i comprises receiving each of the plurality of second seeds S _i as inputs And a one-way function f for generating a plurality of random numbers R _i as outputs, wherein the one-way function f is at least one of a secure hash function and / or a block cipher. According to another aspect, the method further comprising at least one random number of a plurality of random numbers R _i determines that it is not a prime number, generating a different supplement seed T ₂ having the g bits, supplemental seed T ₂ and the random number seed Generating another second seed S ₂ based on S, generating another random number R ₂ having n bits, wherein the random number R ₂ is based on the second seed S ₂ , determining that the random number R ₂ is a prime number , And storing the supplemental seed T ₂ in a memory circuit. According to another aspect, the method further includes the steps of recycling the stored random number seed S and replenishment seed T ₂ from the memory circuit, and regenerating the prime random number R ₂ based on the random number seed S and the replenish seed T ₂ do. According to another aspect, a method includes receiving a request for a predetermined number of prime numbers, and repeating the steps of: receiving a request for a predetermined number of prime numbers, until each of the plurality of supplementary seeds associated with different prime numbers is stored with the same number as this predetermined number method of generating a seed T ₂ steps, supplemental seed T ₂ and the random number seed method based on the S for generating another second seed S ₂ steps, how to generate a different random number R ₂ having n bits step-random number R ₂ Is based on a second seed S ₂ - a method step of determining that the random number R ₂ is a prime number, and a step of storing the replenish seed T ₂ in a memory circuit.

[0013] Another feature provides an apparatus for generating and storing seed values for fractional generation, the apparatus comprising a memory circuit, and a processing circuit communicatively coupled to the memory circuit, wherein the processing circuit comprises k Generating a plurality of supplementary seeds T _i each having g bits, each of the plurality of supplementary seeds T _i comprising a plurality of supplementary seeds and a plurality of second Generating seeds S _i and generating a plurality of random numbers R _i each having n bits, wherein -n is less than k + g, and each of the plurality of random numbers R _i comprises a plurality of second seeds S _i based on a second, different seed - and random number R _P is based on the second seed s _P of the plurality of second seed of s _i, -, and at least one random number R _P of the plurality of random numbers R _i determines that a small number, and The second seed _SP is a seed of a plurality of supplementary seeds T _i , T _P and a random number seed S, and is configured to store the random number seed S and the replenish seed T _P in a memory circuit. According to an aspect, the plurality of random numbers R _i are additionally based on the secret key k _S , and the processing circuitry is further configured to store the secret key k _S in the secure memory circuit. According to another aspect, the processing circuitry is further configured to retrieve the stored random seed S and replenish seed T _P from the memory circuit and regenerate the prime random number R _P based on the random seed S and the replenish seed T _P. According to another aspect, the random number seed S and supplemental seed T _P are stored before receiving a request for one or more prime numbers from the cryptographic key generation process, and the processing circuit further includes a cryptographic key generation process To generate a cryptographic key based on the prime random number R _P , and to provide the cryptographic key to the cryptographic key generation process.

[0014] According to one aspect, generating a plurality of random numbers R _i based on different second seeds among the plurality of second seeds S _i is further characterized in that the processing circuit further comprises a plurality of second seeds S _i , and to generate a plurality of random numbers R _i as outputs, wherein the one-way function f is at least one of a secure hash function and / or a block cipher. According to a further aspect, the processing circuit may be added by, determining at least one random number of a plurality of random numbers R _i is not a prime number, and generates the other supplemental seed T ₂ having the g bits and replacement seed T ₂ and the random number on the basis of the seed S to generate another second seed S _2, and generate another random number R ₂ having n bits, and - the random number R ₂ is a second seed being based on S ₂ - determines that, the random number R ₂ is prime and , And a supplemental seed T ₂ in a memory circuit. According to another aspect, the processing circuitry is further configured to retrieve the stored random seed S and supplemental seed T ₂ from the memory circuit and regenerate the prime random number R ₂ based on the random seed S and the replenish seed T ₂ .

[0015] Another feature provides an apparatus for generating and storing seed values for prime generation, the apparatus comprising a random number seed S having k bits and a plurality of supplementary seeds T _i Means for generating a plurality of second seeds S _i , each based on a different replenishment seed and a random seed S among the plurality of replenish seeds T _i , a plurality of random numbers each having n bits wherein a plurality of random numbers R _i - means to produce the R _i -n + k is less than g and, a plurality of random numbers R _i each being based on different second seed of a plurality of the second seed s _i of the random number R _P is the second basis of the seed s _P of the plurality of second seed to s _i, and the second seed s _P includes a plurality of supplemental seed T _i - at least one means for the random number R _P determines that a small number Based on the replenishment seed T _P and the random number seed S, and the random number seed S and the replenishment seed And means for storing T _P in the memory circuit. According to one aspect, the apparatus, on the basis of a random number seed S and supplemental seed T _P stored from the memory circuit to the means for living discrete, and the random number seed S and supplemental seed T _P The means for regenerating the small number of the random number R _P .

[0016] Other features provide a computer-readable storage medium having stored thereon one or more instructions, wherein instructions, when executed by the at least one processor, cause the processor to perform the steps of: , and a plurality of supplemental seed in T _i to it, and generates a plurality of second seed of S _i based respectively on different replacement seed and the random number seed S of a plurality of supplemental seed of T _i having respectively the g bits And generates a plurality of random numbers R _i each having n bits, -n is less than k + g, and each of the plurality of random numbers R _i is a second one of the plurality of second seeds S _i , - determining that at least one random number R _P among the plurality of random numbers R _i is a prime number, and - the random number R _P is based on a second seed S _P of the plurality of second seeds S _i , The seed S _P is a seed of a plurality of supplementary seeds T _i , T _P and a random seed S, and causes the memory circuit to store the random number seed S and the replenish seed T _P. According to an aspect, the instructions further cause the processor to retrieve the stored random seed S and replenish seed T _P from the memory circuit and to recreate the prime random number R _P based on the random seed S and the replenish seed T _P .

[0017] FIG. 1 illustrates a first example of a flow diagram of a method for generating and storing seed values for prime generation.
[0018] FIG. 2 illustrates a second example of a flowchart of a method for generating and storing seed values for prime generation.
[0019] FIG. 3 illustrates a first example of a flow chart of a method for generating and storing seed values for prime generation.
[0020] FIG. 4 illustrates a third example of a flowchart of a method for generating and storing seed values for prime generation.
[0021] FIG. 5 illustrates a fourth example of a flowchart of a method for generating and storing seed values for prime generation.
[0022] FIG. 6 illustrates a second example of a flow chart of a method for generating and storing seed values for prime generation.
[0023] Figures 7A and 7B illustrate a fifth example of a flowchart of a method for generating and storing seed values for prime generation.
[0024] FIG. 8 illustrates a flowchart 800 of a method for generating and storing seed values for prime generation.
[0025] FIG. 9 illustrates a flow chart 900 of a method for generating and storing seed values for prime generation.
[0026] FIG. 10 illustrates an exemplary, schematic block diagram of a hardware implementation for an electronic device 1000 that implements any of the methods for cryptographic security described herein.
[0027] Figure 11 illustrates a schematic block diagram of a processing circuit.
[0028] Figure 12 illustrates a schematic block diagram of a processing circuit.

[0029] In the following description, specific details are set forth in order to provide a thorough understanding of the various aspects of the disclosure. However, it will be understood by those skilled in the art that aspects may be practiced without these specific details. For example, to avoid obscuring aspects with unnecessary detail, the circuits may be shown in block diagrams. In other instances, well known circuits, structures and techniques may not be shown in detail in order not to obscure aspects of the disclosure.

[0030]  The word "exemplary" is used herein to mean "serving as an example, instance, or illustration. &Quot; Any embodiment or aspect described herein as "exemplary " is not necessarily to be construed as preferred or advantageous over other aspects of the disclosure. Likewise, the term "aspects" do not require that all aspects of the disclosure be included with the disclosed features, advantages, or mode of operation. As used herein, "primality tests" and "composite number tests" may be used interchangeably and are generally referred to as "minority tests. &Quot; For example, tests such as the Miller-Rabin test can prove that the number is synthetic. By doing so, the test also proves that the number is not a prime number. Thus, as used herein, performing a prime test on a number includes those tests that attempt to prove or prove that the number is synthetic. As used herein, a "random number" may be indeed random (e.g., it is generated by a true random number generator (RNG)) or the random number may be pseudo-random Generated using a pseudo random number generator (PRNG)).

summary

[0031] Methods and devices for reducing the amount of memory circuit storage space required to store values, e. G., Seed values used to generate seeds, are described herein, and these prime numbers are then used to generate cryptographic keys for security algorithms Can be used. Specifically, instead of relatively large numbers of bits, the seed values of one or more relatively small number of bits are pre-computed and stored. These seed values can be used at a later point in time to generate prime numbers on demand. These methods and devices are particularly useful for mobile devices with crypto-accelerator hardware modules that have limited storage space. In addition, other devices may benefit from the methods and apparatuses described herein to lower cryptographic key provisioning costs.

Used for generating prime numbers Seed  Exemplary methods for generating and storing values

[0032] FIG. 1 illustrates a flowchart 100 of a method for generating and storing seed values for prime generation in accordance with an aspect. First, a k-bit random number seed S is generated (102). The random seed S may be generated using, for example, a random number generator or a pseudo random number generator. The value k may be any integer equal to or greater than two. Then, the random seed S may be used to generate an n-bit random number R (104), where n > k. Specifically, in order to generate the random number R based on the random number seed S according to the equation (1), a one-way function f can be executed:

R = f (S) (1).

According to one example, the function f may be a cryptographic hash function, e.g., a secure hash function (e.g. SHA-1, SHA-2, etc.) or an AES (advanced encryption standard) with a block cipher, .

[0033] Next, a decimal test is performed to determine whether the random number R is a prime number (106). By way of example only, the fractional tests performed may include the Miller-Rabin decimal test. If it is determined that the random number R is a prime number, the random number seed S is stored in memory (108). Otherwise, the method steps 102, 104, and 106 are repeated to generate a new random seed S (102) and a new random number R is generated based on the random seed S (e.g., using function f) 104), and a decimal test is performed (106) to determine whether the newly generated random number R is a prime number. These steps 102, 104, and 106 are repeated until the random number R is determined to be a decimal number, and after the random number R is determined to be a decimal number, the random number seed S that generated the random number R is stored (108). According to one example, subsequent iterations of the random number seed S may use k bits of the previously generated random number R that were not determined to be a prime number. For example, the subsequent iteration of the random seed S may be identical to the first k bits of the random number R from the previous iteration.

[0034] Since the number of bits (k) of the random number seed S is less than the number (n) of bits of the prime random number R, memory space is saved by storing the seed S instead of the random number R, and this random number R can be discarded / deleted . In the future, the random seed S may be retrieved (e.g., from the memory circuit in which it is stored) and used to regenerate the prime random number R using the one-way function f. For example, the key generation process may request one or more prime numbers, and one or more prime numbers may be supplied using the method 100 described above. According to only one example, the keys thus generated may be used by a cryptographic security algorithm, e.g., RSA.

[0035] Thus, according to the method illustrated in FIG. 1, a random number R, which is a prime number, can be generated and then used for a key generation algorithm, e.g., RSA, to generate a cryptographic secret key. The method illustrated in FIG. 1 may be used to generate a random number R that is known to generate a prime number random number R prior to receiving a request for a prime number from a cryptographic security algorithm (e.g., an RSA algorithm that requests a prime number (s) May be performed "offline" in that S is generated and stored.

[0036] Figure 2 illustrates a flowchart 200 of a method for generating and storing seed values for prime generation in accordance with an aspect. First, a k-bit random number seed S is generated 208 in the processing circuit 202 (e.g., a processor). (Note that the steps performed by the processing circuit 202 may be implemented in software, depending on the aspect). Thereafter, the seed S is generated (e.g., using the function f described above for FIG. 1) And an n-bit random number R is generated (210). Next, it is determined whether the generated random number R is a prime number (212). Steps 208, 210 and 212 are repeated 214 until at least one random number R is determined to be a prime number. Thereafter, once it is determined that the random number R is a prime number, the seed S used to generate the prime random number R is stored (216) in the memory circuit 204 (e.g., memory). At this point, the decimal random number R can be discarded or deleted because the seed S is stored. In turn, a request is received 218 for one or more prime numbers from an application 206 implementing a cryptographic security algorithm (e.g., RSA). In response to this request, the seed S is retired from the memory (220), and the n-bit prime random number R is regenerated (222) using this seed S. Finally, this prime random number R is sent / provided 224 to the application requesting the prime number (s) for key generation.

[0037] Figure 3 illustrates a flow chart 300 of a method for generating and storing seed values for prime generation in accordance with an aspect. (304) a random number seed S having k bits repeatedly, and generates (306) a random number R having n bits based on the seed S, repeatedly until the generated random number R is determined to be a decimal number, -K is less than n, and by determining whether the random number R is a prime number (308), a prime random number is generated (302). Next, the random number seed S used to generate the random number R determined to be a prime number is stored (310).

[0038] FIG. 4 illustrates a flowchart 400 of a method for generating and storing seed values for prime generation in accordance with an aspect. First, a k-bit random number seed S is generated (402). The random seed S may be generated using, for example, a random number generator or a pseudo random number generator. The value k may be any integer equal to or greater than two. The random number seed S may then be used 404 to generate an n-bit random number R with the secret key k _S , where n > k. Specifically, in order to generate the random number R based on the random number seed S and the secret key k _S according to equation (2), a one-way function f may be executed:

_{R = f (S, k S} ) (2).

In one example, the secret key k _S may only be known to the device performing method 400. In accordance with an aspect, the secret key k _S may be transferred from the secure memory (e.g., read-only memory, one-time programmable (OTP) memory that may or may not be encrypted) . In this case, the secret key k _S may be previously stored in the secure memory to prevent unauthorized access / discovery of the key k _S. According to another aspect, the secret key k _S may not necessarily be stored in the secure memory at the device, but instead is created on the fly in the device.

[0039] According to an example, the one-way function f may be a message authentication code (MAC), for example a hash-based message authentication code (HMAC) AES (advanced encryption standard). In both cases, the MAC or block cipher uses the secret key k _S.

[0040] Next, in order to determine whether the random number R is a prime number, a decimal test is performed (406). If it is determined that the random number R is a decimal number, the random number seed S is stored in memory (408). Alternatively, the secret key k _S is the case other than that already stored in the secure memory (e. G., If the secret key k _S is generated as described above), then the secret key k _S is since the random number R is determined to be a small number of Lt; / RTI > If it is determined that the random number R is not a prime, the method steps 402, 404, 406 are repeated to generate a new random number seed S 402 (using a function f, for example) A new random number R is generated 404 based on k _S , and a decimal test is performed 406 to determine whether the newly generated random number R is a prime number. After these steps 402, 404, and 406 are repeated and the random number R is determined to be a decimal number, the random number seed S and the secret key k _S that generated the random number R are stored until the random number R is determined to be a decimal number. (408). According to one example, the secret key k _S is securely stored (e.g., in an encrypted OTP memory), and in accordance with another example, the secret key k _S is stored in a standard memory (e.g., ordinary random access memory (RAM) .

[0041] In order to regenerate the prime number R using the function f, the random number seed S and the secret key k _S can be retrieved and used at a later time in the future. For example, the key generation process may request one or more prime numbers, and one or more prime numbers may be supplied using the method 400 described above. According to only one example, the keys thus generated may be used by a cryptographic security algorithm, e.g., RSA.

[0042] Thus, according to the method illustrated in FIG. 4, a random number R, which is a prime number, can be generated, and then this prime number R is used to generate a cryptographic security key for the cryptographic security algorithm, e.g., RSA. The method illustrated in FIG. 4 is characterized in that, prior to receiving a request for a prime number from the key generation process, a random number seed S and a secret key k _S , which are known to generate a prime number R, are generated and stored, .

[0043] FIG. 5 illustrates a flowchart 500 of a method for generating and storing seed values for prime generation in accordance with an aspect. First, a k-bit random seed S is generated (508) in a processing circuit 502 (e.g., a processor). (Note that, depending on the aspect, the steps performed by the processing circuit 502 may be implemented in software). After that, the secret key k _S is generated or the security of the memory circuit 504 (509), and an n-bit random number R is generated 510 based on the seed S and the secret key k _S (e.g., using the function f described above with respect to FIG. 4). Next, it is determined whether the generated random number R is a prime number (512). Steps 508, 509, 510, 512 are repeated 514 until at least one random number R is determined to be a prime number. Thereafter, once it is determined that the random number R is a prime number, the seed S used to generate the prime random number R is stored 516 in a memory circuit (e.g., standard memory such as RAM). The decimal random number R can be discarded or deleted at this point because the seed S is stored. In turn, a request is received 518 for one or more prime numbers from an application 506 implementing the cryptographic key generation function / process. In response to this request, the seed S and the secret key k _S are retrieved from memory 520 (e.g., the seed S is retrieved from standard memory, e.g., RAM, and the secret key k _S is retrieved from the secure memory , And the n-bit prime random number R is regenerated (522) using the seed S and the secret key k _S. Finally, the decimal random number R is sent / provided 524 to the application requesting the prime number (s) for key generation.

[0044] FIG. 6 illustrates a flow chart 600 of a method for generating and storing seed values for prime generation in accordance with an aspect. First, a random number seed S having k bits is repeatedly generated (604) until it is determined that the generated random number R is a decimal number, and a random number R having n bits based on the seed S and secret key k _S is calculated (606) -k is less than n, and by determining whether the random number R is a prime number (608), a prime random number is generated (602). In the next step, the random number seed S and the secret key k _S used to generate the random number R determined to be a prime number are stored (610). While the random seed S may be stored in standard memory, e.g., RAM, the secret key k _S may be stored in secure memory, e.g., OTP memory.

[0045] Figures 7A and 7B illustrate a flowchart 700 of a method for generating and storing seed values for prime generation in accordance with an aspect. 7A, a k-bit random seed S and a plurality of g-bit supplementary seeds T _i are generated 702 where an integer i = {1, 2, ... m} and m > 1. The random number seed S, and a plurality of supplemental seed T _i can be created for example, using a random number generator or a pseudo-random number generator. The value k may be any integer equal to or greater than 2, and the value g may be any integer equal to or greater than one. According to an aspect, each of the g-bit supplementary seeds T _i has fewer bits than the k-bit random number seed S (i.e., g < k).

[0046] Next, a plurality of second seeds S _i are generated based on the random number seed S and the plurality of supplementary seeds T _i . For example, by associating a random seed S with each of a plurality of supplemental seeds T _i , a plurality of second seeds S _i may be generated 704. Note that the second seed to do the production of S _i not limited to a plurality of supplemental seed of T _i and the association of the random number seed S. A random number seed, and S is any logical operation (s) may be performed on the basis of the plurality of supplemental seed in T _i to produce a second seed of S _i.

[0047] Thereafter, a plurality of n-bit random numbers R _i are generated 706 based on the second seeds S _i , where n> k + g. According to an aspect, a one-way function f may be executed to generate random numbers R _i based on the second seeds S _i according to equation (3): &lt; EMI ID =

R _i = f (S _i ) For integer values i ≥ 1 (3).

[0048] According to another aspect, a one-way function f may be executed to generate random numbers R _i based on the second seeds S _i and the secret key k _S (708) according to equation (4):

R _i = f (S _i , k _S ) For integer values i ≥ 1 (4).

In one example, the secret key k _S may be known only to the device performing method 700. In accordance with an aspect, the secret key k _S may be transferred from a secure memory (e.g., read-only memory, one-time programmable (OTP) memory that may be encrypted or unencrypted) .

[0049] Next, a decimal test is performed (710) on each of the random numbers R _i to determine whether any of the random numbers is a prime number. If it is determined that any random number among the random numbers R _i is a prime number, the random number seed S and one or more supplementary seeds T _i used to generate one or more random numbers R _i determined to be a prime number are stored in memory (712). Optionally, if the secret key k _S has been used by the one-way function f, then the secret key k _S is stored 714 in secure memory. None of the random numbers R _i is also not a prime number, is repeated at least one time to be determined by random numbers R _i is a prime number, the step (702, 704, 706, 710).

7b, it is determined that at least one random number R _i is a prime number, but after all random numbers R _i have been determined not to be a prime, for all _i where R _i has been determined not to be a prime number, One or more g-bit supplemental seeds T _i are regenerated 716. Next, for all i where R _i was determined not to be a prime, one or more second seeds S _i are regenerated 718 based on the random seed S and the regenerated supplementary seeds T _i . For example, by associating the seed S with the seed supplemental T _i, a second can be produced with seed S _i. Thereafter, for all i where R _i was determined not to be a prime, one or more random numbers R _i are regenerated 720 based on the second seeds S _i using the one-way function f. According to one example, the one-way function f may receive the secret key k _S as an input (e.g., see step 708).

[0051] Next, a decimal test is performed on the regenerated random numbers R _i (722). Provided when the random number R _i is determined to be a prime number, the part that was used to regenerate the random numbers R _i, supplemental seed T _i corresponding to the random number R _i are stored (724). Otherwise, if it is determined that the random numbers R _i is not a prime number, until the random numbers R _i all that is regenerated few, process steps (716, 718, 720, and 722) is repeated, and thus, such a random number The corresponding supplementary seeds T _i used to generate R _i are also stored 724. According to an aspect, steps 716, 718, 720, 722 are repeatedly performed if no prime numbers remain in the number space including the random number seed S after the repetitions of the threshold number Can be stopped.

[0052] An example for better illustrating the method 700 shown in Figures 7a and 7b is provided below. First, assume that twenty decimal fractions are desired by the key generation process provided. Thereafter, a single k-bit random seed S and twenty g-bit random supplementary seeds T ₁ , T ₂ , ... T ₂₀ are generated 702. In turn, twenty second seeds S ₁ , S ₂ , ... S ₂₀ are generated (704) based on the supplemental seeds T ₁ , T ₂ , ... T ₂₀ , and then the function f Using the second seeds S ₁ , S ₂ , ... S ₂₀ , twenty random numbers R ₁ , R ₂ , ... R ₂₀ are generated (706). Then, the random numbers R ₂ , R ₇ , and R ₁₇ are determined to be prime numbers and the remaining random numbers R ₁ , R ₃ ... R ₆ , R ₈ ... R ₁₆ , R ₁₈ , R ₁₉ , R ₂₀ It is assumed that this is not a prime (710). As a result, the random seed S and the supplementary seeds T ₂ , T ₇ , and T ₁₇ are stored 712 in memory (e.g., standard memory RAM).

Since it has been determined in the following order that the random numbers R ₁ , R ₃ ... R ₆ , R ₈ ... R ₁₆ , R ₁₈ , R ₁₉ , R ₂₀ are not prime, the supplementary seeds T ₁ , T ₃ ... T ₆ , T ₈ ... T ₁₆ , T ₁₈ , T ₁₉ , T ₂₀ are regenerated (e.g., new random values) 716. Then, the newly regenerated supplement seed _{T 1, T 3 ... T 6} , T 8 ... T 16, T 18, T 19, T ₂₀ on the basis of the new second seed of S _1, S ₃ .. S ₆ , S ₈ ... S ₁₆ , S ₁₈ , S ₁₉ , S ₂₀ are regenerated 718 and then the newly regenerated second seeds S ₁ , S ₃ ... S ₆ , S _{8 ... s 16, s 18, s} 19, the new random number based on the _{s 20 R 1, R 3 ...} R 6, R 8 ... R 16, R 18, R 19, R 20 is regenerated (720). Next, for the newly regenerated random numbers R ₁ , R ₃ ... R ₆ , R ₈ ... R ₁₆ , R ₁₈ , R ₁₉ , R ₂₀ , to determine if they are prime, (722). This time, it is determined that the random numbers R ₁ , R ₆ , R ₁₆ , and R ₁₈ are now a prime number and thus the corresponding supplementary seeds T ₁ , T ₆ , T ₁₆ , and T ₁₈ are stored in memory 724). Thereafter, steps 716, 718, 720, 722 are repeated again for the remaining random numbers that are not still decimals until all twenty random numbers R ₁ , R ₂ , ... R ₂₀ are determined to be decimal numbers. do.

Since the number of bits (k) of the random seed S and the number of bits g of the supplementary seed (s) T _i are less than the number n of bits of the prime random number (s) R _i , ) R _i instead by storing the seed S and supplemental seed (s) T _i in the memory space is saved, a random number (s) R _i may be discarded / removed. Thereafter, the random number seed S and the supplementary seed (s) T _i can be used to retrieve from the memory to regenerate the prime number random number (s) R _i using the one-way function f. In cases where the secret key k _S has also been used by the function f to generate the decimal random number (s) R _i , the function f may be used to regenerate the prime number R _i (the supplementary seeds T _i and the random seed S The secret key k _S is also used to retrieve from the secure memory.

[0055] Thus, according to the method illustrated in FIGS. 7A and 7B, a plurality of prime numbers R _i may be generated, and then a cryptographic security algorithm, such as RSA Lt; / RTI &gt; The method illustrated in Figures 7A and 7B generates a random seed S and a plurality of supplemental seeds T _i -fractional random numbers R _i before receiving a request for one or more prime numbers from the key generation function Quot; offline "in that they are created and stored.

[0056] Figures 8A and 8B illustrate a flowchart 800 of a method for generating and storing seed values for prime generation in accordance with an aspect. Referring to Figure 8a, the first, k- bit random number seed S, and a plurality of bit replacement seed g- T _i is generated by the processing circuit 802 (e.g., processor) 808, where the integer i = {1, 2, ... m}, and m > 1. (Note that the steps performed by the processing circuitry 802 may be implemented in software.) After the plurality of (k + g) -bit second seeds S _i are seeds S and a plurality replacement of the seed is produced by T _i (e.g., the ability to associate a plurality of supplemental seed T _i and the seed s) based on 810. Next, a plurality of n-bit random numbers R _i are generated (812) based on the second seeds S _i (e.g., using the one-way function f described above with respect to Figures 7a and 7b) > g + k. Then, it is determined whether any random number among the generated random numbers R _i is a prime number (814). Until it is determined that at least one of the random numbers R _i is a prime number, the steps (808, 810, 812, 814) is repeated. Assuming a determined to be at least one or R _i is a small number of random numbers that exceed, few random number (s), the seed S and supplemental seed (s) used to generate the R _i T _i, a memory circuit 804 (e. G. Memory) (816).

[0057] Next, supplementary seeds T _i associated with such random numbers R _i that were determined to be non-decimal are regenerated 818. After, the new random numbers R _i regeneration based on the basis of the regenerated replenishment seed in T _i to the new second seed of S _i (820), is regenerated and then regenerated a second seed of S _i (822 ). Next, for the regenerated random numbers R _i , a small number of tests are performed to determine if they are prime numbers (824). Supplementary seeds T _i associated with random numbers R _i determined to be a prime number are stored 826 in the memory circuit 804. 8B, process steps 818, 820, 822, 824, and 826 are repeated 828 until all of the regenerated random numbers R _i are determined to be decimal, and thus, Seeds T _i are also stored in the memory circuit 804. The random numbers R _i determined to be a prime number can be discarded or deleted at this point since the seeds S and the associated supplementary seeds T _i have been stored and can be used to regenerate the prime numbers R _i .

[0058] Next, a request is received (830) for one or more prime numbers from the application 806 implementing the cryptographic key generation function. In response to the request, the seed S, and T _i is the seed supplemental discrete Living from the memory 804, 832, and using the seed S and the seed supplemental T _i n- bit decimal random numbers R _i is regenerated (834). 2 If the seed of the secret key by the one-way function f based on the S _i that generate random numbers R _i k _S used, in order to regenerate a few random numbers R _i, secret key k from the memory (e.g., Secure Memory) _S is also lit. Finally, the prime random numbers R _i are sent / provided 836 to the application 806 requesting the prime number (s) for key generation.

[0059] FIG. 9 illustrates a flow chart 900 of a method for generating and storing seed values for prime generation in accordance with an aspect. First, a random number seed S having k bits and a plurality of supplementary seeds T _i each having g bits are generated (902). Next, a plurality of second seeds S _i , each based on a different replenishment seed and a random seed S among the plurality of replenish seeds T _i , are generated (904). Then, each of the plurality of n bits random numbers R _i -n having the k + g is less than Im - is generated and, and a plurality of random numbers R _i each is different from the first seed of a plurality of the second seed S _i (906). Next, it is determined that at least one random number R _P of the plurality of random numbers R _i is a prime, wherein the random number R _P is based on a second seed S _P of the plurality of second seeds S _i , and the second seed S _P Is based on the supplementary seed T _P and the random number seed S among the plurality of supplementary seeds T _i (908). Then, the random number seed S and the supplementary seed T _P are stored in the memory circuit (910).

[0060] According to one aspect of the disclosure, the stored random number seed S and the replenish seed T _P can be retrieved from the memory circuit, and the prime random number R _P can be regenerated based on the random number seed S and the replenish seed T _P have. According to another aspect, the random seed S and the supplementary seed T _P may be stored prior to receiving a request for one or more primes from the cryptographic key generation process. Thereafter, a request for one or more prime numbers may be received from the cryptographic key generation process. In response, a cryptographic key may be generated based on the decimal random number R _P. Thereafter, a cryptographic key may be provided to the cryptographic key generation process.

[0061] According to an aspect, generating a plurality of random numbers R _i based on different second seeds of the plurality of second seeds S _i comprises receiving each of the plurality of second seeds S _i as inputs And executing a one-way function f to generate a plurality of random numbers R _i as outputs, wherein the one-way function f is at least one of a secure hash function and / or a block cipher. According to another aspect, it can be determined that at least one random number among the plurality of random numbers R _i is not a prime number. Thereafter, another replica seed T ₂ having g bits may be generated, another second seed S ₂ may be generated based on the replica seed T ₂ and the random number seed S, and another random number R ₂ may be generated based on the second seed S _2. In the next turn, it can be determined that the random number R ₂ is a prime number, and as a result, the supplementary seed T ₂ can be stored in the memory circuit.

[0062] According to an aspect, the stored random number seed S and the replenish seed T ₂ can be retrieved from the memory circuit, and the prime number R ₂ can be regenerated based on the random number seed S and the replenish seed T ₂ . According to another aspect, a request for a predetermined number of prime numbers may be received. In response, there until each have the same number of storage with different numbers of a plurality of supplemental seed are determined in advance to be associated with a small number of steps are to be repeated, the method comprising: generating a different supplement seed T _2; Generating another second seed S ₂ based on the replenishment seed T ₂ and the random number seed S; Generating another random number R ₂ having n bits based on the second seed S ₂ ; Determining that the random number R ₂ is a prime number; And supplemental seed T ₂ in a memory circuit.

Exemplary Electronics device

[0063] 10 illustrates an exemplary, schematic block diagram of a hardware implementation for an electronic device 1000 that implements any of the methods for cryptographic security described herein. The electronic device 1000 may be a mobile phone, a smart phone, a tablet, a portable computer, and / or any other electronic device having circuitry. The electronic device 1000 may include a communication interface 1010, a user interface 1012, and a processing system 1014. The processing system 1014 includes a processing circuit (e.g., processor) 1004, a memory circuit (e.g., memory) 1005, a computer-readable storage medium 1006, a bus interface 1008, . The processing system 1004 and / or the processing circuitry 1004 may be implemented in any of a variety of ways as described above with respect to Figures 1, 2, 3, 4, 5, 6, 7a, 7b, 8a, 8b, and / May be configured to perform any of the described steps, functions, and / or processes described herein.

[0064] The processing circuitry 1004 may be one or more processors (e.g., a first processor, etc.) adapted to process data for the electronic device 1000. For example, processing circuitry 1004 may be implemented in a specialized processor, e.g., as shown in Figures 1, 2, 3, 4, 5, 6, 7a, 7b, 8a, 8b, and / And may be an application specific integrated circuit (ASIC) serving as a means for performing any of the steps described above.

[0065] Examples of processing circuits 1004 include microprocessors, microcontrollers, digital signal processors (DSPs), field programmable gate arrays (FPGAs), programmable logic devices (PLDs), state machines, gated logic gated logic, discrete hardware circuits, and other suitable hardware configured to perform various functions described throughout this disclosure. The processing circuitry 1004 is also responsible for managing the bus 1002 and executing software stored on the computer-readable storage medium 1006 and / or the memory 1005. The software may cause the processing system 1014 to perform the functions of the processing system 1004 when executed by the processing circuitry 1004 in accordance with any one or more of the methods described above with reference to Figures 1, 2, 3, 4, 5, 6, 7a, 7b, 8a, 8b , And / or to perform the various functions, steps, and / or processes described above with respect to FIG. Computer-readable storage medium 1006 can be used to store data manipulated by processing circuitry 1004 when executing software.

[0066] The memory circuit 1005 may be a non-volatile memory, such as, but not limited to, FLASH memory, magnetic or optical hard disk drives, and the like. In some aspects, the memory storing the sector information and / or the overhead messages (including the configuration sequence number) is a volatile memory that can be continuously powered to store information indefinitely, e.g., a DRAM , DDR SDRAM), SRAM, and the like. The memory circuit 1005 is a means to supplement seed T _i means for storing, and serves as an example of one means for storing the secret key k _S when security is made to store the random number seed S.

[0067] The software may include instructions, instruction sets, code, code segments, program code, programs, subprograms, software modules, firmware, middleware, microcode, hardware descriptors, Will be broadly interpreted to mean a computer-readable medium, including but not limited to, applications, software applications, software packages, routines, subroutines, objects, executables, execution threads, procedures, The software may reside on the computer-readable storage medium 1006. Computer-readable storage medium 1006 can be a non-transitory computer-readable storage medium. Non-transient computer-readable storage media include, for example, magnetic storage devices (e.g., hard disks, floppy disks, magnetic strips), optical disks (e.g., compact discs (CD) or digital versatile discs Flash memory devices (e.g., card, stick, or key drive), random access memory (RAM), read only memory (ROM), programmable ROM (PROM), erasable PROM (EEPROM), electrically erasable PROM Registers, removable disks, and any other suitable medium for storing software and / or instructions that can be accessed and read by a computer. The computer-readable storage medium may also include, by way of example, a carrier wave, a transmission line, and any other suitable medium for transmitting software and / or instructions that can be accessed and read by a computer. The computer-readable storage medium 1006 may reside in the processing system 1014 or may be external to the processing system 1014 or may be distributed across a plurality of entities including the processing system 1014 . The computer-readable storage medium 1006 may be embodied in a computer program product.

[0068] In this example, processing system 1014 may be implemented using a bus architecture that is generally represented by bus 1002. The bus 1002 may include any number of interconnect buses and bridges in accordance with the particular application of the processing system 1014 and overall design constraints. The bus 1002 may include one or more processors (typically represented by a processor 1004), a memory 1005, and a computer-readable medium (typically represented by a computer-readable storage medium 1006) And connects the various circuits including them to each other. The bus 1002 may also couple various other circuits, such as timing sources, peripherals, voltage regulators, and power management circuits, which are well known in the art, . Bus interface 1008 provides an interface between bus 1002 and communication interface 1010 (if present). Communication interface 1010 provides a means for communicating with other devices via a transmission medium. Depending on the nature of the device, a user interface 1012 (e.g., a keypad, display, speaker, microphone, touch screen display, etc.) may also be provided to the electronic device 1000.

[0069] FIG. 11 illustrates a schematic block diagram of a processing circuit 1004 in accordance with an aspect. The processing circuit 1004 may include a decimal generator circuit 1102, a random number seed S retriever circuit 1103, a decimal re-generator circuit 1105, and a function f execution circuit 1107. The decimal generator circuit 1102 may include a random number seed S generator circuit 1104, a random number R generator circuit 1106, and a decimal test circuit 1108.

[0070] The decimal generator circuit 1102 repeatedly generates a random number seed S with k bits, generates a random number R having n bits based on the seed S, and determines whether the random number R is a prime number , And serves as an example of a means for generating a prime number. Specifically, the random number seed S generator circuit 1104 serves as an example of a means for generating the random number seed S, and the random number R generator circuit 1106 generates a random number R having n bits based on the seed S And the decimal test circuit 1108 serves as an example of a means for determining whether the random number R is a prime number.

[0071] The random number seed S retriever circuit 1103 serves as an example of a means for recycling the random number seed S from the memory circuit 1005. The minority reac- tivator circuit 1105 serves as an example of a means for regenerating a prime number based on the random number seed S. [ The function f execution circuit 1107 serves as an example of a means for executing the one-way function f that receives the seed S as an input and generates a random number R as an output.

[0072] FIG. 12 illustrates a schematic block diagram of a processing circuit 1004 in accordance with an aspect. The processing circuit 1004 includes a seed S and a supplemental seed T _i generator circuit 1202, a second seed S _i generator circuit 1204, a random number R _i generator circuit 1206, a minority test circuit 1208, Circuitry 1210, and a prime number randomizer generator circuit 1212.

The seed S and the supplemental seed T _i generator circuit 1202 serve as an example of the means for generating the random number seed S and the supplementary seeds T _i . Second seed S _i generator circuit 1204 and the second a role as an example of means for generating a seed of S _i, each based on a different random number seed and the seed supplemental S of the plurality of supplemental seed of T _i. Random numbers R _i generator circuit 1206, each of n serve one serving as the means for generating a plurality of random numbers R _i having the bits, and the random numbers R _i is S _i of each of the plurality of second seed Lt; / RTI &gt; Small number of the test circuit 1208 acts as an example of one means for determining whether or not the random number R _P few. The seed retrigger circuit 1210 serves as an example of a means for retrying the random seed S and a plurality of supplementary seeds T _i (e.g., seed T _P ). The decimal random number generator circuit 1212 serves as an example of a means for regenerating a prime number random number (e.g., a prime number R _P ) based on the random number seed S and the supplementary seeds T _i (e.g., the supplementary seed T _P ) .

[0074] The methods and devices described herein may be used to generate and store seed values for prime generation, for any use that is not limited to cryptographic security and / or cryptographic key generation.

[0075] Components illustrated in Figures 1, 2, 3, 4, 5, 6, 7a, 7b, 8a, 8b, 9, 10, 11, and / One or more of the steps, features, and / or functions may be rearranged and / or combined into a single component, step, feature or function, or may be combined with other components, steps, . &Lt; / RTI &gt; Further, additional elements, components, steps, and / or functions may be added without departing from the invention. The devices, devices, and / or components illustrated in Figures 10, 11, and / or 12 may include any of the devices illustrated in Figures 1, 2, 3, 4, 5, 6, 7A, 7B, , &Lt; / RTI &gt; FIG. 8B, and / or FIG. The algorithms described herein may also be efficiently implemented in software and / or embedded in hardware.

[0076] Further, in an aspect of the present disclosure, the processing circuit 1004 illustrated in Figures 10, 11, and / or 12 may include any of the processing circuits 1004 illustrated in Figures 1, 2, 3, 4, 5, 6, (E.g., application-specific) processors that are specifically designed and / or hard-wired to perform the algorithms, methods, and / or steps described in Figures 7B, 8A, 8B, 1, 2, 3, 4, 5, 6, 7A, 7B, 8A, 8B, and 8C, The computer-readable storage medium 1006 may also be a processor-readable medium such as, but not limited to, a processor 1004 readable (e.g., readable, writable) Instructions that, when executed by a specialized processor (e.g., an ASIC), cause the specialized processor to &lt; RTI ID = 0.0 &gt; 1, 2, 3, 4, 5, 6, 7A, 7B, 8A, 8B, and / or 9 in order to perform the algorithms, methods and / do.

[0077] It is also noted that aspects of the disclosure may be described as a process depicted as a flow chart, a flow diagram, a structure diagram, or a block diagram. While a flow chart can describe operations as a sequential process, many of the operations may be performed in parallel or concurrently. In addition, the order of operations can be rearranged. The process is terminated when its operations are completed. A process may correspond to a method, a function, a procedure, a subroutine, a subprogram, and the like. When a process corresponds to a function, the termination of the process corresponds to the return of the function to the calling function or main function.

[0078] The storage medium may also be read-only memory (ROM), random access memory (RAM), magnetic disk storage media, optical storage media, flash memory devices and / or other machine- Readable media, and / or computer-readable media, as well as one or more devices for storing data. The term "machine-readable medium", "computer-readable medium", and / or "processor-readable medium" includes, but is not limited to, non-transitory mediums such as portable or fixed storage devices Optical storage devices, and various other media capable of storing, containing, or carrying instruction (s) and / or data. Thus, the various methods described herein may be fully or partially replaced by instructions and / or data that may be stored in "machine-readable medium", "computer-readable medium", and / Partially implemented, and may be executed by one or more processors, machines, and / or devices.

[0079] In addition, aspects of the disclosure may be implemented by hardware, software, firmware, middleware, microcode, or any combination thereof. When implemented in software, firmware, middleware or microcode, the program code or code segments that perform the necessary tasks may be stored on a machine-readable medium, such as a storage medium or other storage (s). The processor can perform the necessary tasks. A code segment may represent a procedure, a function, a subprogram, a program, a routine, a subroutine, a module, a software package, a class, or any combination of instructions, data structures, or program statements. A code segment may be coupled to another code segment or hardware circuit by conveying and / or receiving information, data, arguments, parameters, or memory contents. Information, arguments, parameters, data, etc. may be communicated, forwarded, or transmitted via any suitable means including memory sharing, message passing, token passing, network transmission,

[0080] The various illustrative logical blocks, modules, circuits, elements, and / or components described in connection with the examples disclosed herein may be implemented or performed with a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC) field programmable gate array) or other programmable logic component, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, but, in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing components, e.g., a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.

[0081] The methods or algorithms described in connection with the examples disclosed herein may be implemented as either hardware, as a software module executable by a processor, or as a combination of both in the form of a processing unit, programming instructions, or other instructions , And may be included in a single device or distributed across multiple devices. The software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, a hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. A storage medium may be coupled to the processor such that the processor can read information from, and write information to, the storage medium. Alternatively, the storage medium may be integrated into the processor.

[0082] Those skilled in the art will further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the aspects disclosed herein may be implemented as electronic hardware, computer software, or combinations of both will be. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system.

[0083] Without departing from the present invention, various features of the invention described herein may be implemented in different systems. It should be noted that the foregoing aspects of the disclosure are merely examples, and should not be understood as limiting the invention. The description of aspects of the disclosure is intended to be illustrative, and is not intended to limit the scope of the claims. As such, these teachings can be readily applied to other types of devices, and many alternatives, modifications, and variations will be apparent to those skilled in the art.

Claims (38)

As a method,
Until it is determined that the generated random number R is a prime,
generating a random number seed S having k bits,
Generate a random number R with n bits based on the seed S, and -k is less than n, and
By determining whether the random number R is a prime number,
Generating a prime number; And
Storing a random number seed S used to generate a random number R determined to be a prime number in a memory circuit
/ RTI &gt;
Way. The method according to claim 1,
Recycling the stored random seed S from the memory circuit; And
Regenerating the prime number based on the random number seed S
&Lt; / RTI &gt;
Way. 3. The method of claim 2,
Generating an encryption key based on the prime number
&Lt; / RTI &gt;
Way. The method according to claim 1,
Deleting the random number R from the memory circuit after storing the seed S,
&Lt; / RTI &gt;
Way. The method according to claim 1,
The generating of the random number R further comprises the step of generating, based on the secret key k _S ,
Way. 6. The method of claim 5,
Storing the secret key k _S used to generate the random number R determined to be a prime number in the secure memory circuit
&Lt; / RTI &gt;
Way. The method according to claim 1,
Prior to receiving a request for one or more prime numbers from the cryptographic key generation process, the random seed S is stored,
Way. The method according to claim 1,
To generate the random number R based on the seed S,
Executing a one-way function f that receives the seed S as input and generates the random number R as an output
/ RTI &gt;
Wherein the one-way function f is at least one of a secure hash function and / or a block secret,
Way. As an apparatus,
A memory circuit; And
A processing circuit communicatively coupled to the memory circuit,
Lt; / RTI &gt;
The processing circuit comprising:
Until it is determined that the generated random number R is a prime,
generating a random number seed S having k bits,
Generate a random number R with n bits based on the seed S, and -k is less than n, and
By determining whether the random number R is a prime number,
Generate a prime number; And
The random number seed S used to generate the random number R determined to be a prime number is stored in the memory circuit
Configured,
Device. 10. The method of claim 9,
The processing circuit may further comprise:
Recycling the stored random number seeds S from the memory circuit; And
And regenerates the prime number based on the random number seed S
Configured,
Device. 11. The method of claim 10,
The processing circuit may further comprise:
And generates an encryption key based on the prime number
Configured,
Device. 10. The method of claim 9,
Prior to receiving a request for one or more prime numbers from the cryptographic key generation process, the random seed S is stored,
Device. 10. The method of claim 9,
Generating a random number R determined to be a prime number is further based on a secret key k _S and the processing circuit is further configured to store the secret key k _S in a secure memory circuit,
Device. As an apparatus,
Until it is determined that the generated random number R is a prime,
generating a random number seed S having k bits,
Generate a random number R with n bits based on the seed S, and -k is less than n, and
By determining whether the random number R is a prime number,
Means for generating a prime number; And
Means for storing a random number seed S used to generate a random number R determined to be a prime number in a memory circuit
/ RTI &gt;
Device. 15. The method of claim 14,
Means for recycling a random seed S stored from the memory circuit; And
Means for regenerating the prime number based on the random number seed S
&Lt; / RTI &gt;
Device. 15. The method of claim 14,
Prior to receiving a request for one or more prime numbers from the cryptographic key generation process, the random seed S is stored,
Device. 15. The method of claim 14,
Generating a random number R determined to be a prime number is further based on a secret key k _S and the apparatus further comprises means for storing the secret key k _S in a secure memory circuit.
Device. A computer-readable storage medium having stored thereon one or more instructions,
Wherein the instructions, when executed by the at least one processor, cause the processor to:
Until it is determined that the generated random number R is a prime,
generating a random number seed S having k bits,
Generate a random number R with n bits based on the seed S, and -k is less than n, and
By determining whether the random number R is a prime number,
To generate a prime number; And
The random number seed S used to generate the random number R determined to be a prime number is stored in the memory circuit,
Computer-readable storage medium. 19. The method of claim 18,
The instructions further cause the processor to:
Causing the stored random number seeds S to be lit from the memory circuit; And
And regenerating the prime number based on the random number seed S,
Computer-readable storage medium. As a method,
the random number having k bits seed S, and a step of generating a plurality of seed supplement with T _i, each having two g bits;
Generating a plurality of second seeds S _{i each} based on a different replenishment seed among the plurality of replica seeds T _i and the random seed S;
And generating a plurality of random numbers R _i, each having n bits -n + k is less than g, the plurality of random numbers R _i in each of the different second seed of a second seed lightwave of S _i of the plurality of Foundation;
Determining that at least one random number R _P of the plurality of random numbers R _i is a prime number, wherein the random number R _P is based on a second seed S _P of the plurality of second seeds S _i , _P is based on the replenishment seed T _P and the random seed S among the plurality of replenishment seeds T _i ; And
Storing the random number seed S and the replenish seed T _P in a memory circuit
/ RTI &gt;
Way. 21. The method of claim 20,
Wherein the plurality of random numbers R _i are further based on a secret key k _S and the method further comprises storing the secret key k _S in a secure memory circuit.
Way. 21. The method of claim 20,
Recycling the stored random seed S and the replenish seed T _P from the memory circuit; And
The random number seed S and the step of reproducing a small number of the random number R _P on the basis of the seed supplemental T _P
&Lt; / RTI &gt;
Way. 23. The method of claim 22,
The random seed S and the replenish seed T _P are stored prior to receiving a request for one or more primes from the cryptographic key generation process,
Receiving a request for one or more prime numbers from the cryptographic key generation process;
Generating an encryption key based on the decimal random number R _P ; And
Providing the cryptographic key to the cryptographic key generation process
&Lt; / RTI &gt;
Way. 22. The method of claim 21,
Generating the plurality of random numbers R _i based on different second seeds among the plurality of second seeds S _i comprises:
Executing a one-way function f that receives each of the plurality of second seeds S _i as inputs and generates the plurality of random numbers R _i as outputs
Lt; / RTI &gt;
Wherein the one-way function f is at least one of a secure hash function and / or a block secret,
Way. 22. The method of claim 21,
Determining that at least one random number among the plurality of random numbers R _i is not a prime number;
generating another complementary seed T ₂ having g bits;
Generating another second seed S ₂ based on the replenishment seed T ₂ and the random seed S;
generating another random number R ₂ having n bits, wherein the random number R ₂ is based on the second seed S ₂ ;
Determining that the random number R ₂ is a prime number; And
Storing said supplementary seed T ₂ in said memory circuit
&Lt; / RTI &gt;
Way. 26. The method of claim 25,
Recycling the stored random seed S and the replenish seed T ₂ from the memory circuit; And
Regenerating the prime number R ₂ based on the random number seed S and the replenishment seed T ₂
&Lt; / RTI &gt;
Way. 26. The method of claim 25,
Receiving a request for a predetermined number of prime numbers; And
A method of generating another replenishment seed T ₂ , each replenishment seed T _{2 being} different from the other, based on the replenishment seed T ₂ and the random seed S, until a number of replenishment seeds each associated with different prime numbers are stored in the same number as the predetermined number step method of generating a second seed S _2, how to generate a different random number R ₂ having n bits steps - determining that the random number R ₂ is a small number, said random number R ₂ is said second seed being based on S ₂ And repeating the method steps of storing said supplemental seed T ₂ in said memory circuit
&Lt; / RTI &gt;
Way. As an apparatus,
A memory circuit; And
A processing circuit communicatively coupled to the memory circuit,
Lt; / RTI &gt;
The processing circuit comprising:
generating a random number seed having the k-bit S, and a plurality of seed supplement with T _i, each having two g bits, and
Each generating a different supplementary seed among the plurality of supplementary seeds T _i and a plurality of second seeds S _i based on the random seed S,
Generating a plurality of random numbers R _i each having n bits, wherein -n is less than k + g, and each of the plurality of random numbers R _i is based on a different second seed among the plurality of second seeds S _i box-,
The second seed S _P the random number R _P is based on the second seed S _P of the second seed of S _i of said plurality, and - determining that the at least one random number R _P of the plurality of random numbers R _i decimal and Is based on the replenish seed T _P and the random seed S among the plurality of replenish seeds T _i ; And
The random seed S and the replenish seed T _P are stored in the memory circuit
Configured,
Device. 29. The method of claim 28,
Wherein the plurality of random numbers R _i is further based on a secret key k _S and the processing circuit is further configured to store the secret key k _S in a secure memory circuit,
Device. 29. The method of claim 28,
The processing circuit may further comprise:
Recycling the stored random seed S and the replenish seed T _P from the memory circuit; And
To regenerate a prime number random number R _P based on the random seed S and the supplementary seed T _P
Configured,
Device. 31. The method of claim 30,
The random seed S and the replenish seed T _P are stored prior to receiving a request for one or more primes from the cryptographic key generation process,
Receive a request for one or more prime numbers from the cryptographic key generation process;
Generate an encryption key based on the decimal random number R _P ; And
To provide the encryption key to the encryption key generation process
Configured,
Device. 29. The method of claim 28,
Generating the plurality of random numbers R _i based on different second seeds of the plurality of second seeds S _i is further characterized in that the processing circuit further comprises:
And to execute a one-way function f that receives each of the plurality of second seeds S _i as inputs and generates the plurality of random numbers R _i as outputs
/ RTI &gt;
Wherein the one-way function f is at least one of a secure hash function and / or a block secret,
Device. 29. The method of claim 28,
The processing circuit may further comprise:
Determine that at least one random number among the plurality of random numbers R _i is not a prime number;
generate another complementary seed T ₂ having g bits;
Generate another second seed S ₂ based on said replenishment seed T ₂ and said random seed S;
generate another random number R ₂ having n bits, and wherein the random number R ₂ is also based on the second seed S ₂ -;
Determine that the random number R ₂ is a prime number; And
To store the replenish seed T ₂ in the memory circuit
Configured,
Device. 34. The method of claim 33,
The processing circuit may further comprise:
Recycling the stored random seed S and the replenish seed T ₂ from the memory circuit; And
And regenerates the prime number R ₂ based on the random number seed S and the replenish seed T ₂
Configured,
Device. As an apparatus,
It means for generating a plurality of supplemental seed of T _i having the k-bit random number seed having S, and each of the g bits;
Means for generating a plurality of second seeds S _{i each} based on a different replenishment seed among the plurality of replenishment seeds T _i and the random seed S;
-N means for generating a plurality of random numbers R _i, each having n bits is k + g is less than the plurality of random numbers R _i each is different from the first seed from the second seed S _i of the plurality of Based on;
Means for determining that at least one random number R _P of the plurality of random numbers R _i is a prime, wherein the random number R _P is based on a second seed S _P of the plurality of second seeds S _i , S _P is based on the replenish seed T _P and the random seed S among the plurality of replenish seeds T _i ; And
Means for storing the random seed S and the replenish seed T _P in a memory circuit
/ RTI &gt;
Device. 36. The method of claim 35,
Means for recycling the stored random seed S and the replenish seed T _P from the memory circuit; And
Means for regenerating a prime number R _P based on the random seed S and the replenish seed T _P
&Lt; / RTI &gt;
Device. A computer-readable storage medium having stored thereon one or more instructions,
Wherein the instructions, when executed by the at least one processor, cause the processor to:
a random number seed S having k bits, and a plurality of supplementary seeds T _i each having g bits;
Each generating a different supplementary seed among the plurality of supplementary seeds T _i and a plurality of second seeds S _i based on the random seed S;
And to generate a plurality of random numbers R _i, each having n bits, and -n is less than k + g, the plurality of random numbers R _i in each of the different second seed of a second seed lightwave of S _i of the plurality of Foundation;
Determine that at least one random number R _P of the plurality of random numbers R _i is a prime number, and wherein the random number R _P is based on a second seed S _p of the plurality of second seeds S _i , _P is based on the replenishment seed T _P and the random seed S among the plurality of replenishment seeds T _i ; And
The random seed S and the replenish seed T _P in a memory circuit,
Computer-readable storage medium. 39. The method of claim 37,
The instructions further cause the processor to:
Causing the stored random seed S and the replenish seed T _P to be lit from the memory circuit; And
And to regenerate a prime number random number R _P based on the random seed S and the supplementary seed T _P.
Computer-readable storage medium.

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