KR20160017226A - Additive Homomorphic Encryption and Decryption Method based on the co-ACD Problem and Apparatus using the same - Google Patents

Abstract

According to an embodiment of the present invention, provided is an additive homomorphic encryption and decryption method based on a co-ACD problem, and an apparatus for using the same. The additive homomorphic encryption based on a co-ACD problem comprises the following steps: randomizing data to be calculated; and calculating the randomized data in a modular manner.

Description

[0001] The present invention relates to an additional homogeneous encryption and decryption method based on a co-ACD problem, and a device using the same homomorphic encryption and decryption method based on co-

The present invention relates to an additional isochronous encryption and decryption method based on a co-ACD problem and an apparatus using the same.

Additive Homomorphic Encryption is used in many fields, for example, as a basic tool for designing a cryptographic protocol.

Examples of cryptographic protocols are oblivious pseudorandom functions, oblivious transfer, private information retrieval, and secure 2-party computations (S. Jarecki and X. Liu, Efficient oblivious pseudorandom functions with applications to adaptive and secure computation of Ellen, E., and E. Pinkas, Efficient private matching and set intersection, In O. Reingold, Editor, Theory of Bryptography (TCC) 2009, volume 5444 of LNCS, pages 577-594, Springer, set-intersection. In C. Cachin and J. Camenisch, editors. EUROCRYPT 2004, volume 3027 of LNCS, pages 1-19 Springer-Verlag, 2004. R. Ostrovsk and WES III. : Techniques and applications. In T. Okamoto and X. Wang, Editors, Public Key Cryptography (2007), volume 4450 of LNCS, pages 393-411, Springer, 2007)

According to an embodiment of the present invention, an additional isochronous encryption and decryption method based on a co-ACD problem and an apparatus using the same can be provided.

An additional isochronous encryption method based on a co-ACD problem according to an embodiment of the present invention includes a step of randomizing data M to be operated on, and a step of performing a modular operation on randomized data .

A method of decrypting a cipher text encrypted by an additional isochronous encryption method based on a co-ACD problem according to an embodiment of the present invention includes parsing an encrypted statement ( C ) into C ₁ and C ₂ , performing step S105 Performing a CRT operation on the result, and performing a modular operation on the CRT operation result (S109).

The additional isochronous encryption and decryption method based on the co-ACD problem according to an embodiment of the present invention and the apparatus using it can implement encryption and decryption through simple operations such as modular operation and addition operation.

FIG. 1 is a diagram for explaining an additional isochronous encryption and decryption method based on a co-ACD problem according to an embodiment of the present invention,
FIG. 2 illustrates a computer apparatus using an additional isochronous encryption method based on a co-ACD problem according to an embodiment of the present invention, and FIG.
3 is a diagram for explaining a computer apparatus using a method of decrypting a cipher text encrypted by an additional isochronous encryption method based on a co-ACD problem according to an embodiment of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS The above and other objects, features, and advantages of the present invention will become more readily apparent from the following description of preferred embodiments with reference to the accompanying drawings. However, the present invention is not limited to the embodiments described herein but may be embodied in other forms. Rather, the embodiments disclosed herein are provided so that the disclosure can be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In this specification, when an element is referred to as being on another element, it means that it can be formed directly on the other element, or a third element may be placed therebetween.

It is to be understood that when an element, component, apparatus, or system is referred to as comprising a program or a component made up of software, it is not explicitly stated that the element, component, (E.g., memory, CPU, etc.) or other programs or software (e.g., drivers necessary to run an operating system or hardware, etc.)

It is also to be understood that the elements (or components) may be implemented in software, hardware, or any form of software and hardware, unless the context clearly dictates otherwise.

The terminology used herein is for the purpose of illustrating embodiments and is not intended to be limiting of the present invention. In the present specification, the singular form includes plural forms unless otherwise specified in the specification. The terms "comprises" and / or "comprising" used in the specification do not exclude the presence or addition of one or more other elements.

Hereinafter, the present invention will be described in detail with reference to the drawings. In describing the specific embodiments below, various specific details have been set forth in order to explain the invention in greater detail and to assist in understanding it. However, it will be appreciated by those skilled in the art that the present invention may be understood by those skilled in the art without departing from such specific details. In some instances, it should be noted that portions of the invention that are not commonly known in the description of the invention and are not significantly related to the invention do not describe confusing reasons for explaining the present invention.

Terms

: 벡터를 의미하며, 설명의 편의를 위해서 화살표를 위에 표시한 '

'표현과 언더라인을 표시한 ' C '표현을 같은 의미로서 혼용하여 사용하기로 하며, 도면들에서는 화살표를 이용한 표현을 사용하였고, 상세한 설명에서는 언더라인으로 표현하였음.

: Means vector, and for convenience of explanation,

'And the' C ' expression indicating the expression and the underline are used as the same meaning. In the drawings, the expression using the arrow is used, and in the detailed description, the expression is expressed by the underline.

Server " and " client " are each configured to include a computer processor (not shown), memory (not shown), and computer program code (not shown) .

1 is a method for explaining an additional isochronous encryption and decryption method based on a co-ACD problem according to an embodiment of the present invention.

Referring to FIG. 1, a method according to an embodiment of the present invention includes randomizing (M) data to be processed (S101), performing a modular operation on randomized data in step S101 (S103), parse the encrypted statement ( C ) as the result of step S103 into C ₁ and C ₂ (S105), perform a CRT operation on the result of step S105 (S107), and S107 And modular operation (S109).

1, it can be seen that steps S101 and S103 are operations for encryption, and steps S105, S107, and S109 are operations for decryption, wherein the encryption operations and the decryption operations are performed in one computer device Or a computer device that performs encryption operations and a computer device that performs decryption operations may be different devices. For example, a computer device that performs encryption operations is a server computer, a computer device that performs decryption operations is a client computer, or, conversely, a computer device that performs encryption operations is a client computer, Lt; / RTI >

The operations for encrypting (e.g., steps S101 and S103) described with reference to FIG. 1 are implemented in a computer device (hereinafter also referred to as a "device") and are implemented, for example, in one computer device Or distributed over two or more computer devices, and steps S101 and S103 may be implemented by hardware (e.g., a chip) and / or computer program code. The operations (S105, S107, and S109) for decoding described with reference to FIG. 1 are also implemented in a computer device (hereinafter also referred to as an "apparatus"), The steps S105, S107, and S109 may be implemented by hardware (e.g., a chip) and / or computer program code.

Referring to FIG. 1, step S101 is a step of performing the following equation (1), wherein an error e is added to data M to be an object to be calculated and is randomized.

&Quot; (1) "

M + eQ

Here, eQ denotes the inner product of e and Q, e can be an error, for example, a positive integer, and when a security parameter is defined, e ∈ [0, 2 ^λ ] is satisfied do. Here, [0, 2 ^? ] Represents a set having positive integers existing from 0 to 2 ^? As an element.

 Q is the size of the message space, defined as Q <N as a positive integer.

Hereinafter, for convenience of explanation, the M + eQ operation result is represented by M '.

1, step S103 is a step of performing an equation defined by the following equation (2) on an output M 'of step S101 using a secret key sk (or a' symmetric key '), And performs a modular operation.

&Quot; (2) &quot;

(M 'mod p ₁ , M' mod p ₂ )

Hereinafter, for convenience of explanation, (M 'mod p ₁ , M' mod p ₂ ) will be represented by a vector C. mod is a modulo operator, M 'mod p ₁ is to compute modulo by dividing M' by p ₁ , and M 'mod p ₂ Is to compute modulo by dividing M 'by p ₂ .

Here, p ₁ And p ₂ are different prime numbers satisfying gcd (Q, p _i ) = 1, and p ₁ And p ₂ have bits, and N = p ₁ p ₂ . gcd is an operator that means the greatest common divisor.

On the other hand, P = {p _i | 1≤i≤k, i, k is an _{integer} = (p 1, p 2} , ... p k) , where, p _1, p _2, ... p _k Is always coprime no matter which pair is chosen. In this way, if p is k, N can be expressed by the more generalized equation as follows.

&Quot; (3) &quot;

가 다음 수학식으로 정의된다. 여기
For purposes of the present description, the term &quot; unique positive integer &quot;

Is defined by the following equation. here

&Quot; (4) &quot;

는, {

｜1≤i<N, i, N는 양의 정수} 로 정의되는 집합의 일(一) 원소이다.
In other words,

Is {

(1) i <N, i, N is a positive integer}.

는, 또한, 다음 수학식 5로 표현될 수 있다.
Such

Can also be expressed by the following equation (5).

Equation (5)

for j ≠ i,

로 이루어진 세트로 정의될 수 있다. Now, the secret key set, sk,

&Lt; / RTI &gt;

값들 중에서 적어도 하나 이상이 S103 단계와 S107에서 각각 사용된다.The secret key sk

At least one of the values is used in steps S103 and S107, respectively.

As described above, the message M can be vector- c encrypted through steps S101 and S103. The encryption statement C encrypted through steps S101 and S103 is expressed as follows.

Hereinafter, the decoding operation will be described with continued reference to Fig.

In step S105, an operation of parsing the encrypted statement C into C ₁ and C ₂ is performed. Where C ₁ is M + eQ mod p ₁ and C ₂ is M + eQ mod p ₂ to be.

In step S107, a CRT (Chinese Remainder Theorem) operation is performed on each of C ₁ and C ₂ parsed in step S105 according to a formula defined by the following equation (2).

&Quot; (6) &quot;

Equation (6) can be expressed as follows.

For purposes of the present description, the CRT operation will be described.

CRT is a function (an example of Ring Isomorphism) applying the rest of the Chinese theorem, P = {p _i | ₁ | i k, i, k is an integer}, where p ₁ , p ₂ ,. ..., and p _k are constants of a small number of each other, and b = p _{1 ·} p _{2 ·} p _{3 ·} p _k and letting CRT _p (c) be a random number sequence a ₁ , a ₂ , , and for a _k , c = a _k (mod p _k ) is unique to mod p.

The algebraic equations for c can be written as:

c = a ₁ (mod p ₁ )

_{c = a 2 (mod p 2} )

.

.

.

c = a _k (mod p _k )

In CRT _p (c), c corresponds to the remainder and p corresponds to the divisor (divisor), and the solution of the formula CRT _p (c) is a value satisfying the algebraic equations.

In step S109, an operation of calculating the modulus Q with respect to the result of step S107 is performed, as follows, by performing the following equation (7).

&Quot; (7) &quot;

On the other hand, Equation (7) can be expressed as follows.

Variation example

As described above, the encryption and decryption method according to the embodiment of the present invention has been described with reference to FIG. In the embodiment of FIG. 1, it is assumed that p _i is p ₁ and p _2. However, the present invention is applicable to the case where p _i = ₁ , ₂ , ..., p _k ).

For example, if we generalize to p _i , the secret key set can be redefined as follows.

로 기술된다.Here, N is

.

p _i , the step S103 can be modified by performing the following equation (8).

&Quot; (8) &quot;

(M 'mod p ₁ , M' mod p ₂ , ..., M 'mod p _k )

Here, k is the number of p.

If step S103 is modified to perform equation (8), the result of performing step S103 may be expressed as follows.

= (C₁, C₂, ... , C_k)

= (C ₁ , C ₂ , ..., C _k )

Now, the operation of decrypting the encrypted statement encrypted by the expression (8) through steps S105, S107, and S109 will be described.

를 C₁, C₂, C₃, ... , C_k로 파싱하는 동작이 수행된다.In step S105,

Is parsed into C ₁ , C ₂ , C ₃ , ..., C _k .

In step S107, the following equation (9) is performed.

&Quot; (9) &quot;

In step S109, the following equation (10) is performed.

&Quot; (10) &quot;

2 is a diagram for explaining a computer apparatus using an additional isochronous encryption method based on a co-ACD problem according to an embodiment of the present invention.

The computer apparatus of FIG. 2 is an apparatus that performs the encryption method described with reference to FIG.

2, a computer apparatus for performing an encryption method according to an embodiment of the present invention may include a computer processor 11, a memory 13, a storage unit 15, and an encryption unit 17 . The encryption unit 17 is stored in the storage unit 15 and can be loaded into the memory 13 and operated under the control of the computer processor 11. [ Here, the encryption unit 17 may be constituted by program codes executable on a computer.

The storage unit 15 may store parameters for operation of the encryption unit 17.

The encryption unit 17 may include a randomization unit 14 and a modular operation unit 16. The randomizer 14 may be composed of program codes executable on a computer that performs the step S101 described with reference to FIG. 1, and the modular computing unit 16 may be implemented by a computer executing the step S103 described with reference to FIG. 1 It may be composed of possible program codes.

Modular arithmetic unit 16, (M 'mod p _1, M' mod p _2), the operation, or extended our example, _{(M 'mod p 1, M} ' mod p 2, ..., M 'mod p k ) Of the input signal.

 The encryption unit 17 can be loaded into the memory 13 under the control of the computer processor 11 and operated.

On the other hand, in the embodiment of FIG. 2, it is also possible that the encryption unit 17 is constituted only by hardware, or a part of the operation performed by the encryption unit 17 is implemented by hardware such as a chip, and the rest is implemented by program code Do.

As used herein, an 'encryption portion' may be implemented in i) hardware, ii) computer program code, or iii) hardware and computer program code.

3 is a diagram for explaining a computer apparatus using a method of decrypting a cipher text encrypted by an additional isochronous encryption method based on a co-ACD problem according to an embodiment of the present invention.

The computer apparatus using the decoding method of FIG. 3 is an apparatus for performing the decoding method described with reference to FIG.

3, a computer apparatus for performing a decoding method according to an embodiment of the present invention may include a computer processor 21, a memory 23, a storage unit 25, and a decryption unit 17 .

The decoding unit 17 can be loaded into the memory 23 and operated under the control of the computer processor 21. [ Here, the decryption unit 27 may be constituted by program codes executable by a computer.

The decoding unit 27 may include a parsing unit 24, a CRT computing unit 28, and a modular computing unit 26. The parsing unit 24 may be constituted by program codes executable on a computer that performs step S105 described with reference to FIG. 1, and the CRT computing unit 28 may be implemented on a computer that performs step S107 described with reference to FIG. 1 And the modular operation unit 26 may be composed of program code executable on a computer that performs step S109 described with reference to FIG.

The decryption unit 27 may be loaded into the memory 23 under the control of the computer processor 21 and operated.

On the other hand, in the embodiment of FIG. 3, the decoding unit 27 may be constituted only by hardware, or a part of the operations performed by the decoding unit 27 may be implemented by hardware such as a chip, and the rest may be implemented by program code Do.

As used herein, the 'decryption unit' may be implemented in i) hardware, ii) computer program code, or iii) hardware and computer program code.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, Various modifications and variations are possible. Therefore, the scope of the present invention should not be limited to the described embodiments, but should be determined by equivalents to the scope of the appended claims, as well as the appended claims.

10, 20: computer device 11, 21: computer processor
13, 23: memory 15, 25:
14: randomizer 16: modular operator
17: Encryption unit 24:
26: modular operation unit 28: CRT operation unit
27:

Claims (2)

A method of additional isomorphic encryption based on a co-ACD problem, comprising randomizing data to be computed (M) and modularizing the randomized data. The co-ACD problem-based method including the steps of parsing the encryption statement ( C ) into C ₁ and C ₂ , performing a CRT operation on the result of the operation in step S105, and modulo-computing (S109) The method comprising the steps of:

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