KR20160007415A - In-memory extending system using external high speed storage device and method thereof - Google Patents

In-memory extending system using external high speed storage device and method thereof Download PDF

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Publication number
KR20160007415A
KR20160007415A KR1020150097742A KR20150097742A KR20160007415A KR 20160007415 A KR20160007415 A KR 20160007415A KR 1020150097742 A KR1020150097742 A KR 1020150097742A KR 20150097742 A KR20150097742 A KR 20150097742A KR 20160007415 A KR20160007415 A KR 20160007415A
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storage device
memory
speed storage
main
controller
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KR1020150097742A
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Korean (ko)
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조병철
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주식회사 태진인포텍
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0683—Plurality of storage devices

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Memory System (AREA)

Abstract

The present invention relates to an in-memory extension system using a super high speed storage device and a method thereof. According to an embodiment of the present invention, the in-memory extension system comprises: a processing unit; a main memory; a low speed storage device which has relatively slower input/output speed than the main memory; a main bridge controller which connects the main memory to the low speed storage device; and a super high speed storage device which has relatively faster input/output speed than the low speed storage device and is connected between the processing unit and the main bridge controller or between the main bridge controller and the low speed storage device. The main memory and the super high speed storage device are set as one virtual main memory. Memory capacity of the super high speed storage device among the virtual main memory is allocated in a variable manner depending on a user. The super speed storage device is installed in the outside of a board where the main memory is installed.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an in-memory expansion system using an external high-speed storage device,

The present invention relates to an in-memory expansion system utilizing an external high-speed storage device and a method thereof.

Currently, the utilization of in-memory inside the system is greatly increased due to its speed and ease of use. As a result, the demand for the capacity of a large memory is increasing, and the problem of how to use the memory more efficiently is increasingly difficult. This is due to the fact that the capacity expansion of in-memory is not free so far and there is no storage medium that can follow the data input / output speed of the in-memory.

SUMMARY OF THE INVENTION The present invention provides an in-memory expansion system and method using an external high-speed storage device.

An in-memory expansion system according to the present invention includes a processing unit; Main memory; A low-speed storage device having a relatively low input / output speed as compared with the main memory; A main bridge controller connecting the main memory and the low-speed storage device; And an ultra high speed storage device connected between the main unit and the main bridge controller or between the main bridge controller and the low speed storage device and having a relatively high input / output speed as compared with the low speed storage device, The storage device is set as one virtual main memory, the memory capacity of the ultra high-speed storage device is variably allocated for each user among the virtual main memory, and the ultra-high speed storage device can be installed outside the board on which the main memory is installed .

Wherein the super high speed storage comprises a memory array including at least one memory block; A memory controller coupled to the memory array to control the memory array; An Error Correction Code (ECC) controller coupled to the memory controller for controlling an error correction code; A direct memory access (DMA) controller coupled to the memory controller to control direct memory access; And a host interface unit connected to the memory controller and the main bridge controller.

And the super high speed storage device may be connected between the processing unit and the main bridge controller through a QPI interface.

Also, the super high-speed storage device may be connected to the main bridge controller and the RAID controller through a PCI-Express interface.

Further, an external connection bridge controller may be interposed between the main unit and the main bridge controller or between the main unit controller and the low speed storage device.

Also, the low-speed storage device may be connected to the main bridge controller through a RAID controller (Redundant Array of Independent Disks or Redundant Array of Inexpensive Disks Controller).

In addition, the super high speed storage device may be connected between the main bridge controller and the RAID controller.

The low-speed storage device may include at least one of a hard disk drive (HDD) and a solid state drive (SSD).

Also, the main memory and the super high-speed storage device can be set as one virtual main memory under the control of the processing unit.

In addition, the memory capacity of the super high-speed storage device can be variably allocated according to the demand for each user.

Also, the memory capacity of the super high-speed storage device can be variably allocated according to the size of the program executed for each user.

According to another aspect of the present invention, there is provided an in-memory expansion method including a main memory, a main bridge controller, a low-speed storage device having a relatively low input / output speed compared to the main memory, Providing an ultrafast storage device on at least one of a front end and a rear end; Setting the main memory and the super high-speed storage device as one virtual main memory; And allocating the memory capacity of the super high speed storage device among the virtual main memory according to each user. The super high speed storage device may be installed outside the board on which the main memory is installed.

Here, the memory capacity of the super high-speed storage device may be variably allocated according to the demand for each user.

Also, the memory capacity of the super high-speed storage device may be variably allocated according to the size of the program executed for each user.

According to the present invention, there is provided an in-memory expansion system and a method thereof, which utilize a super-high-speed storage device capable of more effectively responding to a user's request by installing a super-fast storage device between the main memory and the low-

That is, according to the present invention, the main memory resource allocation is fixed to the user as in the conventional VDI, but the additional high speed storage device is used as the main memory resource so that the user can allocate additional resources if necessary. Speed memory device that can maximize performance when used by a user and provides an in-memory expansion system and method thereof.

1 is a schematic view for explaining an in-memory expansion system and a method thereof using an external high-speed storage device according to the present invention.
2 is a schematic view showing an example of the super high-speed storage device used in the present invention.
3 is a schematic diagram showing a general memory resource allocation state.
4 is a schematic diagram showing an in-memory resource allocation state according to the present invention.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

The embodiments of the present invention are described in order to more fully explain the present invention to those skilled in the art, and the following embodiments may be modified in various other forms, The present invention is not limited to the embodiment. Rather, these embodiments are provided so that this disclosure will be more faithful and complete, and will fully convey the scope of the invention to those skilled in the art.

In addition, the following drawings are exaggerated for convenience and clarity, and like reference numerals refer to like elements throughout the drawings. As used herein, the term "and / or" includes any and all combinations of one or more of the listed items.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a," "an," and "the" include singular forms unless the context clearly dictates otherwise. Also, " comprise "and / or" comprising "when used herein should be interpreted as specifying the presence of stated shapes, numbers, steps, operations, elements, elements, and / And does not preclude the presence or addition of one or more other features, integers, operations, elements, elements, and / or groups.

As used herein, the expression "the first member and the second member are connected" means not only that the first member and the second member are directly connected, but also the third member The first member and the second member are indirectly connected with each other.

Further, the term "main memory " as used herein is a concept including" in-memory "connected to a processing unit. Further, the term "ultra-high speed storage device " as used herein is a concept including a memory array, a memory controller, an ECC (Error Correction Code) controller, a DMA (Direct Memory Access) In the present specification, "memory capacity" may be sometimes referred to as "resource ". Thus, main memory, in-memory, super-fast storage, memory capacity and resources, etc., should be properly interpreted as defined herein.

1 is a schematic view for explaining an in-memory expansion system and a method thereof using an external high-speed storage device according to the present invention.

1, an in-memory expansion system 100 according to the present invention includes a processing unit 110, a main bridge controller 120, a main memory 130, a low-speed storage 140, a RAID 150, A Redundant Array of Independent Disks or a Redundant Array of Inexpensive Disks) controller 150 and an ultra-fast storage device 160.

Here, the processing unit 110 and the main bridge controller 120, the processing unit 110 and the main memory 130, and the high speed storage 160 and the memory expansion bridge controller 170 are connected to each other via a QuickPath Interconnect (QPI) interface Or a high speed interface such as a high speed serial interface and the main bridge controller 120 and the RAID controller 150 may be connected by a PCI (Peripheral Component Interconnect) -Express interface method, and the low speed storage device 140 And a RAID controller 150 may be connected by a SAS (Serial Attached Small Computer System Interface) interface method or a SATA (Serial Advanced Technology Attachment) interface method. However, such an interface scheme is an example for understanding the present invention, and the present invention is not limited to this interface scheme.

Meanwhile, the system 100 described above may be defined as a so-called VDI (Virtual Device Interface), but the present invention is not limited thereto, and various other systems are possible. For example, a system without the processing unit 110 and the low-speed storage device 140 is also possible.

Hereinafter, the respective components, the connection relationships of the respective components, and the functions thereof will be described.

The processing unit 110 is a concept including a centrol processing unit (CPU), and is a processing unit for processing an operating system and / or an application program and the like mounted on the low- And to perform all the operations for the operation. For example, the processing unit 110 controls the main bridge controller 120 to access an operating system program and / or an application program loaded into the main memory 130 from the low-speed storage device 140. The processing unit 110 also serves to set and / or define the main memory 130 and the high-speed storage 160 as one virtual main memory 190 (see FIG. 4), as will be described below.

The main bridge controller 120 electrically connects the main memory 130, the low-speed storage device 140 and the high-speed storage device 160 to the processing unit 110, . That is, the processing unit 110 controls the main bridge controller 120 to communicate between the main memory 130, the low speed storage device 140 and the super high speed storage device 160 connected thereto, And the ultra high-speed storage device 160 are set and / or defined as one virtual main memory 190. [

The main memory 130 serves to cause an operating system program and / or an application program to be loaded into the main memory 130 from the low-speed storage device 140 under the control of the processing unit 110. [ To this end, the main memory 130 may include a plurality of memory disks having a plurality of volatile semiconductor memories (for example, DDR, DDR2, DDR3, SDRAM, etc.) capable of high-speed data input / output. The main memory 130 forms and allocates a virtual main memory 190 together with the super high speed storage device 160, and maps information of the allocated areas to perform an input operation or an output operation.

That is, the main memory 130 allocates a specific memory area of the main memory 130 to input and output data according to an operating system program and / or an application program process of the processing unit 110, 160 are matched with the specific memory area described above and data of the matched main memory 130 and the super high-speed storage device 160 are mapped to be input and output.

The low-speed storage device 140 stores an operating system program and / or an application program, and loads the low-speed storage device 140 into the main memory 130 under the control of the processing unit 110. [ The low-speed storage device 140 includes at least one of a hard disk drive (HDD), a flash SSD (solid state drive), and the like, but is not limited thereto. In addition, the low-speed storage device 140 has a relatively low input / output speed as compared with the main memory 130.

The RAID controller 150 functions to configure a plurality of low-speed storage devices 140 (for example, HDD or flash SSD) as one virtual device to implement a mass storage device. In addition, the raid controller 150 divides and stores the data in the plurality of low-speed storage devices 140, thereby improving the transmission speed, and replacing and recovering errors in the low-speed storage device 140, which may occur during operation, do.

The super high speed storage device 160 is connected between the processing unit 110 and the main bridge controller 120 via the external connection bridge controller 210 or between the main bridge controller 120 and the RAID controller 150 And is set and / or defined in the virtual main memory 190, thereby expanding the in-memory capacity.

 The high-speed storage device 160 includes a plurality of memory disks having a plurality of volatile semiconductor memories (for example, DDR, DDR2, DDR3, and SDRAM) capable of high-speed data input / output. In addition, such an ultra high-speed storage device 160 may have a configuration in which memory disks are arranged in parallel. Here, the super high-speed storage device 160 has a relatively higher input / output speed than the low-speed storage device 140.

The high-speed storage device 160 is installed outside the board 180 on which the main memory 130 is installed. That is, the ultra-fast storage device 160 is external. The board 180 provided with the processing unit 110, the main bridge controller 120, the main memory 130, the low-speed storage device 140 and the RAID controller 150 is provided with the above- The storage device 160 is electrically connected. In other words, the super high-speed storage device 160 is connected to the system 100 by an external cable having a separate power supply structure and a noise-proof structure.

In addition, the present invention can be used to connect an ultra high speed storage device 160 between the processing unit 110 and the main bridge controller 120 or between the main bridge controller 120 and the RAID controller 150, The external connection bridge controller 210 is further interposed. The external connection bridge controller 210 may be connected to the super high-speed storage device 160 through a high-speed interface such as a QuickPath Interconnect (QPI) interface or a high-speed serial interface. However, the present invention is not limited thereto. In addition, the external connection bridge controller 210 may also be installed in the board 180 described above.

In general, the VDI is composed of a processing unit, a main memory, a low-speed storage device, etc. The biggest problem in the VDI is that resources such as a processing unit, a main memory, a low-speed storage device, Accordingly, it can not actively cope with the demand of the user.

In particular, in the case of the main memory, when the user uses the VDI, the most optimal performance can be obtained by varying the resource allocation according to the request, but the general VDI can not perform this.

As described above, in the present invention, the ultra-fast storage device 160 is additionally connected between the main memory 130 and the low-speed storage device 140, so that the user can more actively process the request.

That is, the most important point of the present invention is that the resource allocation of the main memory 130 is fixed like a general VDI and allocated to the user, but the user can utilize the added high-speed storage 160 as a resource of the main memory 130, If necessary, allocate additional resources, and if it is no longer necessary, release the allocation of resources so that it can maximize performance when used by each user.

In other words, the feature of the present invention is that the super high-speed storage device 160 is added to the outside of the board 180 in which the main memory 130 is installed through the external connection bridge controller 210, So that the resource allocation can be actively processed in the configuration of the VDI.

2 is a schematic view showing an example of the super high-speed storage device used in the present invention.

2, the super high speed storage device 160 used in the present invention includes a memory array 162, a memory controller 163, an error correction code (ECC) controller 164, a DMA (Direct Memory Access) A host interface unit 165, and a host interface unit 166.

The memory array 162 includes at least one memory block 161. The memory controller 163 is connected to the memory array 162 to control the memory array 162. The ECC controller 164 is connected to the memory controller 163 to control the error correction code. The DMA controller 165 is connected to the memory controller 163 to control direct memory access. The host interface unit 166 is connected to the memory controller 163 and is connected to the main bridge controller 120 through the memory expansion bridge controller 170 so that the ultrafast storage device 160 can communicate with the main memory 130 .

Here, the memory controller 163, the ECC controller 164, the DMA controller 165, and the host interface 166 may be connected not only in series but also in parallel. The backup controller 167 may be connected to the DMA controller 165 and the backup storage unit 168 may be connected to the backup controller 167.

The backup storage unit 168 is constituted by a low-speed nonvolatile storage device such as a hard disk and stores data of the ultra-fast storage device 160. The backup control unit 167 controls the data input and output of the backup storage unit 168 to back up the data stored in the super high speed storage device 160 in the backup storage unit 168. [

In the present invention, the ultra-high speed storage device 160 is not limited to the above-described configuration, and other devices having other configurations are also possible.

The present invention can form a virtual memory for expanding the in-memory by using the super high-speed storage device 160. This is because the virtual memory resources using the high-speed storage device 160 are variably allocated to the in-memory resources that are fixedly allocated according to the needs of the user as compared with the resources of the in-memory in which the capacity is fixed, .

3 is a schematic diagram showing a general in-memory resource allocation state.

3, the system includes a user, an application program, a processing unit (including a CPU), a main memory and a low-speed storage device, and a user It can be seen that it is difficult to actively cope with the request of the user because resources are allocated initially.

That is, in a general system, in-memory has a limitation in capacity expansion and a fixed resource allocation amount. In addition, although the use of in-memory is gradually increasing in general systems (in-memory DB, VDI, etc.), in-memory capacity expansion is not free by the limitation of the interface of the processing unit and the limitation of parallelism due to impedance mismatching. Moreover, since the initially set resource allocation amount is fixed regardless of the user's request in the allocation of the in-memory resource, the user who needs a lot of resources is dissatisfied with the performance, and the user who needs a little resource needs the resources Waste unnecessarily.

4 is a schematic diagram showing an in-memory resource allocation state according to the present invention.

As shown in FIG. 4, a plurality of users exist in the present invention, and an application program, a processing unit 110, a main memory 130, a super high speed storage 160 and a low speed storage 140, And will be used. Of course, the main memory 130 and the high-speed storage 160 operate as one virtual main memory 190, and the memory capacity of the different high-speed storage 160 is allocated to each user as described above.

In other words, the present invention includes a virtual main memory 190 coupled to the main memory 130 using the super high-speed storage device 160 to receive the resource allocation of the super-fast storage device 160 irregularly , You can solve the problem that you have in common systems. That is, the main memory 130 and the ultra-high speed storage 160 are combined to form one virtual main memory 190. A certain memory capacity of the super high speed storage 160 is allocated to each user according to a request for each user, It becomes possible to actively cope with a star request.

Of course, the processing unit 110 may use a solution manager, which is a separate program, for the purpose of this, depending on the demand for each user or the size of a program to be executed for each user, the memory capacity in the ultra- Or non-uniformly.

In other words, in the present invention, the memory capacity of the high-speed storage device 160 among the virtual main memory 190 is manually varied or allocated manually by a user-specific request using the in-memory expansion system 100, May be automatically unevenly changed or assigned according to the program size executed by the user by the unit 110. [

In other words, the high-speed storage device 160 is installed in a general system to solve the above-mentioned in-memory problem. The high-speed storage device 160 used here is a semiconductor storage device, which is connected to the main memory 130 via a memory interface and thus has a data input and output speed as much as the main memory 130 at the same time as the storage device .

In addition, since the capacity of the memory can be expanded and the demand for each user is analyzed, the resource allocation can be variably performed irregularly, thus enabling better performance and resource management.

Meanwhile, the system 100 according to the present invention can be operated as a component of the cloud computing device. That is, only input and output operations are mainly performed through the terminals of a plurality of users, and operations such as analysis, processing, storage, management, and distribution of information are performed in a third space called a cloud, The in-memory expansion system 100 utilizing the external high-speed storage device 160 according to the present invention can be used.

Hereinafter, an in-memory expansion method using the super high-speed storage device according to the present invention will be described. 1 and 4 together.

First, a low-speed storage device 140 having a relatively low input / output speed and a super-high-speed storage device 160 having a relatively high input / output speed compared to the low-speed storage device 140 are connected to the main memory 130 and the main memory 130, Respectively. Here, the main memory 130, the low-speed storage device 140, and the high-speed storage device 160 are connected to the main bridge controller 120, and the main bridge controller 120 can be controlled by the processing unit 110 have.

Next, the main memory 130 and the super high-speed storage 160 are set as one virtual main memory 190. [ That is, the processing unit 110 can set the main memory 130 and the high-speed storage 160 as one virtual main memory 190 by using a solution manager which is a separate program.

Then, the capacity of the high-speed storage device 160 of the virtual main memory 190 is changed and / or assigned for each user. That is, the processing unit 110 manually or automatically changes and / or allocates the memory capacity of the high-speed storage device 160 among the virtual main memory 190 for each user by using the solution manager.

More specifically, the processing unit 110 may manually access the ultra-fast storage 160 according to a user-specific request (e.g., a system administrator may request the desired memory capacity by telephone, e-mail or SMS) Quot; can be changed and / or assigned unevenly. Here, "manually" means that the system administrator manually changes and allocates memory capacity.

In addition, the processing unit 110 can automatically change and allocate the capacity of the superhigh-speed storage device 160 irrespective of the size of the program executed per user. Here, the meaning of "automatically" means that the processing unit 110, not the system administrator, changes and allocates the memory capacity.

As described above, the present invention includes a main memory 130 and a low-speed storage device 140, and a high-speed storage device 160 is connected between the main memory 130 and the low- The resource allocation of the main memory 130 is fixed and allocated to the user but the super high speed storage device 160 is utilized as a resource of the main memory 130 so that the user can further allocate the memory capacity when the memory capacity is further needed, And provides an in-memory expansion method using an ultra-fast storage device that releases the allocated memory capacity if the memory capacity is not needed.

It should be noted that the present invention is not limited to the above-described embodiments, and various modifications and changes may be made without departing from the spirit and scope of the present invention. It will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention.

100; In-memory expansion system using external high-speed storage
110; Processing unit 120; Main Bridge Controller
130; Main memory 140; Low-speed storage
150; RAID controller 160; Ultra-fast storage
170; Board 210; External connection bridge controller

Claims (15)

A processing unit;
Main memory;
A low-speed storage device having a relatively low input / output speed as compared with the main memory;
A main bridge controller connecting the main memory and the low-speed storage device; And
And an ultra high speed storage device connected between the main unit and the main bridge controller or between the main unit and the low speed storage device and having a relatively high input / output speed as compared with the low speed storage device,
Wherein the main memory and the super high-speed storage device are set as one virtual main memory, the memory capacity of the super high-speed storage device among the virtual main memory is variably allocated for each user,
Wherein the super high speed storage device is installed outside a board on which the main memory is installed. The method according to claim 1,
The ultra-high speed storage device
A memory array including at least one memory block;
A memory controller coupled to the memory array to control the memory array;
An Error Correction Code (ECC) controller coupled to the memory controller for controlling an error correction code;
A direct memory access (DMA) controller coupled to the memory controller to control direct memory access; And
And a host interface unit connected to the memory controller and the main bridge controller. The method according to claim 1,
Wherein the high-speed storage device is connected between the processing unit and the main bridge controller through a QPI interface. The method according to claim 1,
Wherein the super high-speed storage device is connected to the main bridge controller and the RAID controller through a PCI-Express interface. The method according to claim 1,
Wherein an external connection bridge controller is further interposed between the main unit and the main bridge controller or between the main unit and the low speed storage device. The method according to claim 1,
Wherein the low-speed storage device is connected to the main bridge controller through a RAID controller (Redundant Array of Independent Disks or Redundant Array of Inexpensive Disks Controller). 6. The method of claim 5,
Wherein the super high speed storage device is connected between the main bridge controller and the RAID controller. The method according to claim 1,
Wherein the low-speed storage device includes at least one of an HDD (Hard Disk Drive) and a flash SSD (Solid State Drive). 10. The method of claim 9,
Wherein the main memory and the super high-speed storage device are set as one virtual main memory under the control of the processing unit. The method according to claim 1,
Wherein the memory capacity of the super high-speed storage device is variably allocated according to a request for each user. The method according to claim 1,
Wherein the memory capacity of the super high-speed storage device is variably allocated according to the size of the program executed for each user. A main memory, a main bridge controller, a low-speed storage device having a relatively low input / output speed relative to the main memory, and a high-speed storage device having a relatively high input / output speed and at least one of a front- ;
Setting the main memory and the super high-speed storage device as one virtual main memory; And
And allocating the memory capacity of the ultra high-speed storage device variably among the virtual main memory,
Wherein the super high-speed storage device is installed outside the board on which the main memory is installed. 13. The method of claim 12,
Wherein the memory capacity of the super high-speed storage device is variably allocated according to a request for each user. 14. The method of claim 13,
Wherein the memory capacity of the super high-speed storage device is variably allocated according to the program size executed by the user. 14. The method of claim 13,
Wherein the memory capacity of the super high-speed storage device is non-uniformly allocated according to the size of the program executed by the user.
KR1020150097742A 2014-07-11 2015-07-09 In-memory extending system using external high speed storage device and method thereof KR20160007415A (en)

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KR20140087296 2014-07-11
KR1020140087296 2014-07-11

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