KR20160004016A - Signal control circuit and switching device comprising the same - Google Patents

Signal control circuit and switching device comprising the same Download PDF

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Publication number
KR20160004016A
KR20160004016A KR1020140082269A KR20140082269A KR20160004016A KR 20160004016 A KR20160004016 A KR 20160004016A KR 1020140082269 A KR1020140082269 A KR 1020140082269A KR 20140082269 A KR20140082269 A KR 20140082269A KR 20160004016 A KR20160004016 A KR 20160004016A
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South Korea
Prior art keywords
voltage
period
sampling
sampling voltage
point
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KR1020140082269A
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Korean (ko)
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홍주표
권옥환
김해봉
김성환
이주현
목진원
김주영
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주식회사 실리콘웍스
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Priority to KR1020140082269A priority Critical patent/KR20160004016A/en
Publication of KR20160004016A publication Critical patent/KR20160004016A/en

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/081—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electronic Switches (AREA)

Abstract

A signal control circuit and a switch device including the same are provided. The signal control circuit includes: a switch for controlling an electric current flowing through an inductive element; A monitoring node connected to the switch; And a signal control circuit coupled to the monitoring node for receiving a reference voltage to turn on and off the switch, wherein the signal control circuit is operable to switch between a first point in time and a second point in time, At a second time point, the voltage of the monitoring node is sampled to generate a first sampling voltage and a second sampling voltage, and a second on-period is generated using the first sampling voltage, the second sampling voltage, and the reference voltage .

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal control circuit and a switching device including the signal control circuit,

The present invention relates to a signal control circuit and a switch device including the same.

Conventional current programmed control mainly uses the peak current of the switching transistor. While this peak current control scheme has fast transient response and stability, the switching ripple current in the inductor can degrade the accuracy of the current control loop. Therefore, in order to sense the correct average current, the peak current control is limited and all of the current flowing through the inductor must be sensed.

US Patent No. 7,583,035 (registered on September 1, 2009)

A problem to be solved by the present invention is to provide a switching device for increasing the accuracy of current program control.

Another problem to be solved by the present invention is to provide a signal control circuit for increasing the accuracy of current program control.

The problems to be solved by the present invention are not limited to the above-mentioned problems, and other matters not mentioned can be clearly understood by those skilled in the art from the following description.

According to an aspect of the present invention, there is provided a switching device including: a switch for controlling an electric current flowing through an inductive element; A monitoring node connected to the switch; And a signal control circuit coupled to the monitoring node for receiving a reference voltage to turn on and off the switch, wherein the signal control circuit is operable to switch between a first point in time and a second point in time, At a second time point, the voltage of the monitoring node is sampled to generate a first sampling voltage and a second sampling voltage, and a second on-period is generated using the first sampling voltage, the second sampling voltage, and the reference voltage .

Wherein the signal control circuit compares a first voltage based on a sum of the first sampling voltage and the second sampling voltage with a second voltage based on the reference voltage, .

If the first voltage is greater than the second voltage, the length of the second on-period is shorter than the length of the first on-period. If the first voltage is smaller than the second voltage, The length of the second on-period is increased.

Wherein the signal control circuit comprises: a memory for storing a first number of reference pulses corresponding to the first on period and for storing a second number of reference pulses corresponding to a second on period according to a comparison result; And a gate signal provider for holding the second ON period as many as the first ON period.

Wherein the gate signal provider generates a first instant signal indicating a start time point of the first on section and a second instant signal indicating an end time point of the first on section, A second sampling circuit for sampling the voltage of the monitoring node in response to the second instant signal to generate the first sampling voltage; and a second sampling circuit for sampling the voltage of the monitoring node in response to the second instant signal, A sampling circuit, and an arithmetic circuit for summing the first sampling voltage and the second sampling voltage.

The first point of time is a starting point of the first ON period and the second point of time is an end point of the first ON period.

The first time point is a time point after a first time point from a start time point of the first ON period and the second time point is a time point before the first time point from an end time point of the first ON period.

The second on period may be continuous immediately after the first on period.

The off period between the first ON period and the second ON period may have a fixed length.

Wherein the signal control circuit samples the voltage of the monitoring node at a third point of time and a fourth point of time that are different from each other during a second ON period of the switch to generate a third sampling voltage and a fourth sampling voltage, Is the start point of the second on-period, the fourth point is the end point of the second on-period, and the second sampling voltage and the fourth sampling voltage may be different from each other.

The first sampling voltage and the third sampling voltage may be equal to each other.

According to another aspect of the present invention, there is provided a signal control circuit for turning on / off a switch for controlling a current flowing through an inductive element and receiving a reference voltage, a sampling unit operable to perform a sampling operation at a first point in time and a second point in time, respectively, to generate a first sampling voltage and a second sampling voltage associated with the switch; And a controller for adjusting the second on-period using the first sampling voltage, the second sampling voltage, and the reference voltage.

Wherein the signal control circuit compares a first voltage based on a sum of the first sampling voltage and the second sampling voltage with a second voltage based on the reference voltage, Can be adjusted.

Wherein the controller stores a first number of reference pulses corresponding to the first on period and a second number of reference pulses corresponding to a second on period according to a comparison result, And a gate signal provider for maintaining the second on-period as much as possible.

According to another aspect of the present invention, there is provided a signal control circuit for turning on / off a switch for controlling a current flowing through an inductive element and receiving a reference voltage, the first sampling voltage and the second sampling voltage are generated by performing the sampling operation at the start and end points of the on period of the switch, respectively, and the sampling operation is performed at the start point and the end point of the second on- A sampling unit for generating a third sampling voltage and a fourth sampling voltage; And a control unit for adjusting a length of a second on-period of the switch by using the sum of the first sampling voltage and the second sampling voltage and the reference voltage, wherein the second sampling voltage and the fourth sampling voltage May be different.

Other specific details of the invention are included in the detailed description and drawings.

1 is a block diagram illustrating a switching device according to some embodiments of the present invention.
2 is an exemplary block diagram of the signal control circuit of FIG.
3 and 4 are timing charts for explaining a method of driving the signal control circuit according to the first embodiment of the present invention.
5 is a conceptual diagram for explaining a method of driving a signal control circuit according to a second embodiment of the present invention.
6 is a conceptual diagram for explaining a method of driving a signal control circuit according to the third embodiment of the present invention.
7 is a conceptual diagram for explaining a method of driving a signal control circuit according to a fourth embodiment of the present invention.
8 is a block diagram for explaining a signal control circuit according to the fifth embodiment of the present invention.
FIGS. 9 and 10 are timing charts for explaining a method of driving the signal control circuit according to the fifth embodiment of the present invention.
11 is a block diagram for explaining a signal control circuit according to a sixth embodiment of the present invention.
Figures 12-14 illustrate examples of the application circuitry of Figure 1, respectively.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention, and the manner of achieving them, will be apparent from and elucidated with reference to the embodiments described hereinafter in conjunction with the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Is provided to fully convey the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims. Like reference numerals refer to like elements throughout the specification.

One element is referred to as being "connected to " or " coupled to " another element, either directly connected to or coupled to another element, . On the other hand, when one element is referred to as "directly connected to" or "directly coupled to" another element, it does not intervene another element in the middle. Like reference numerals refer to like elements throughout the specification. "And / or" include each and every combination of one or more of the mentioned items.

Although the first, second, etc. are used to describe various elements, components and / or sections, it is needless to say that these elements, components and / or sections are not limited by these terms. These terms are only used to distinguish one element, element or section from another element, element or section. Therefore, it goes without saying that the first element, the first element or the first section mentioned below may be the second element, the second element or the second section within the technical spirit of the present invention.

The terminology used herein is for the purpose of illustrating embodiments and is not intended to be limiting of the present invention. In the present specification, the singular form includes plural forms unless otherwise specified in the specification. It is noted that the terms "comprises" and / or "comprising" used in the specification are intended to be inclusive in a manner similar to the components, steps, operations, and / Or additions.

Unless defined otherwise, all terms (including technical and scientific terms) used herein may be used in a sense commonly understood by one of ordinary skill in the art to which this invention belongs. Also, commonly used predefined terms are not ideally or excessively interpreted unless explicitly defined otherwise.

1 is a block diagram illustrating a switching device according to some embodiments of the present invention.

Referring to FIG. 1, a switching device 1 according to some embodiments of the present invention may include a switch 20, a monitoring node MN1, a signal control circuit 100, a catch diode 19, and the like.

The switching device (1) is electrically connected to the application circuit part (10). The switching device 1 can control the current flowing in the inductive element 15 located in the application circuit part 10. [ The application circuit 10 may be any circuit including the inductive element 15. For example, the application circuit 10 may be a buck converter, a light device, a power transformer, . The application circuit 10 may include, for example, an output load 13 connected to the input power source 11, an inductive element 15 connected to the output load 13, and the like. The output load 13 may be, for example, a resistor or an electronic device or an LED. One terminal of the inductive element 15 may be connected to the output load 13 and the other terminal may be connected to the switch 20. [

One terminal of the catch diode 19 may be connected to the switch 20 and the other terminal may be connected between the input power source 11 and the output rod 13. The catch diode 19 is also referred to as a flyback diode, a freewheeling diode, a snubber diode, a suppressor diode, a clamp diode, or the like. That is, the catch diode 19 generates a continuous loop so that the current flowing in the inductor 15 can be extinguished even when the switch 20 is turned off. That is, after the switch 20 is turned off, the current is consumed while continuing to flow through the catch diode 19, the output load 13, and the inductive element 15.

The monitoring node MNl may be located between the switch 20 and the monitoring element 30. [ The monitoring element 30 may be a resistor placed between the ground voltage and the switch 20. [

The signal control circuit 100 is connected to the oscillator 40 and the monitoring node MN1 and is connected to the reference voltage REF. The signal control circuit 100 may provide the switch 20 with a gate signal GATE that turns the switch 20 on and off. In addition, a set signal (SET) can be received from the oscillator 40 in the form of a periodic pulse at a predetermined frequency.

The signal control circuit 100 samples the voltage (i.e., the monitoring voltage CS) of the monitoring node MN1 at the first and second different points of time during the first on period of the switch 20 do. The first sampling voltage (see Va1 in FIG. 2) and the second sampling voltage (see Vb1 in FIG. 2) are generated by sampling in this manner. The second on-period can be adjusted using the first sampling voltage Va1, the second sampling voltage Vb1, and the reference voltage REF. Hereinafter, the signal control circuit will be described in detail with reference to Figs. 2 to 11. Fig.

The operation of the switching device 1 will be briefly described as follows. When the switch 20 is turned on, the current supplied from the input power source 11 passes through the output load 13, the inductive element 15, and the monitoring element 30 to the ground voltage. The switch 20 is turned on and off to control the current flowing in the inductive element 15 such that the inductive voltage VAB has a high or low value around the reference voltage REF. In this way, the switch 20 regulates the average current flowing through the output load 13 and the inductive element 15. [

2 is an exemplary block diagram of the signal control circuit of FIG.

2, the signal control circuit 100 may include a sampling circuit 110, a first calculation circuit 130, a second calculation circuit 140, a controller 150, and the like.

The sampling circuit 110 samples the voltage of the monitoring node (i.e., the monitoring voltage CS) at the first and second points of time that are different from each other during the first on period of the switch 20, And generates a voltage Va1 and a second sampling voltage Vb1.

Here, the first point of time may be the start point of the first ON period and the second point of time may be the end point of the first ON period. For example, the monitoring voltage CS may gradually change (e.g., increase) over time during the first on-period. In this case, the first sampling voltage Va1 may be the smallest voltage in the first ON period, and the second sampling voltage Vb1 may be the largest voltage in the first ON period (i.e., the peak voltage). If the monitoring voltage CS gradually decreases with time during the first ON period, the first sampling voltage Va1 may be a peak level voltage and the second sampling voltage Vb1 may be the smallest voltage.

Alternatively, the first point of time may be a point of time after the predetermined time from the start point of the first on-period, and the second point of time may be a point of time before the preset time from the end point of the first on-period (see FIG. 7).

One of the first sampling voltage Va1 and the second sampling voltage Vb1 may be smaller than the reference voltage REF and the other may be larger than the reference voltage REF. For example, when the monitoring voltage CS gradually increases with time during the first ON-period ON1, the first sampling voltage Va1 is smaller than the reference voltage REF and the second sampling voltage Vb1 is lower than the reference voltage REF May be greater than the voltage REF.

The sampling circuit 110 receives the first instant signal INST1 indicating the first time point and samples the first sampling voltage Va1 and receives the second instant signal INST2 indicating the second time point. Two sampling voltages Vb1 can be sampled.

The first calculation circuit 130 may generate the first voltage V1 using the first sampling voltage Va1 and the second sampling voltage Vb1. For example, the first voltage V1 may be generated based on the sum of the first sampling voltage Va1 and the second sampling voltage Vb1. The first voltage V1 may be a simple sum of the first sampling voltage Va1 and the second sampling voltage Vb1 or may be an average of the first sampling voltage Va1 and the second sampling voltage Vb1, Lt; / RTI >

The second arithmetic circuit 140 may generate the second voltage V2 using the reference voltage REF. For example, the second voltage V2 may be equal to the reference voltage REF, or may be a constant multiple (e.g., 1/2 or 2 times) of the reference voltage REF.

The controller 150 may receive the first voltage V1, the second voltage V2 and the set signal SET and may generate the gate signal GATE that turns on / off the switch 20. [ The controller 150 may change the gate signal GATE using the first voltage V1 and the second voltage V2 and adjust the second on period accordingly.

For example, the first on-duration and the second on-duration may be consecutive. Here, the immediately following means that no other on intervals are arranged between the first on period and the second on period. An off period may be arranged between the first on period and the second on period.

Alternatively, the first on period and the second on period may be separated from each other. That is, at least one ON period may be disposed between the first ON period and the second ON period.

Specifically, the controller 150 may compare the first voltage V1 with the second voltage V2 and adjust the second on period according to the comparison result. For example, if the first voltage V1 is greater than the second voltage V2, the length of the second ON period is shorter than the length of the first ON period. Alternatively, if the first voltage V1 is smaller than the second voltage V2, the length of the second ON period can be increased more than the length of the first ON period.

3 and 4 are timing charts for explaining a method of driving the signal control circuit according to the first embodiment of the present invention.

3 is a diagram for explaining a case where the first voltage V1 is higher than the second voltage V2. Referring to FIG. 3, a section between time t1 and time t2 is a first ON section ON1, and a section between times t3 and t4 is a second ON section ON2.

At time t1, the gate signal GATE is enabled. That is, the monitoring voltage CS is sampled at the start time of the first ON period ON1 to generate the first sampling voltage Va1.

At time t2, the gate signal GATE is disabled. That is, the monitoring voltage CS is sampled at the end of the first ON-period ON1 to generate the second sampling voltage Vb1.

The first calculation circuit 130 generates the first voltage V1 by adding the first sampling voltage Va1 and the second sampling voltage Vb1 and the second calculation circuit 140 generates the reference voltage REF by 2 And generates a second voltage V2. In addition, the controller 150 compares the first voltage V1 with the second voltage V2. As shown, the length of the first ON period ON1 is t ON1 . When the first voltage V1 is higher than the second voltage V2, the controller 150 may decrease the length of the second ON-period ON2.

At time t3, the gate signal GATE is enabled again. That is, the monitoring voltage CS is sampled at the start time of the second ON-period ON2 to generate the third sampling voltage Va2.

At time t4, the gate signal GATE is disabled again. That is, the monitoring voltage CS is sampled at the end of the second ON-period ON2 to generate the fourth sampling voltage Vb2.

As described above, since the first voltage V1 is higher than the second voltage V2 in the first ON-period ON1, the length tON2 of the second ON-period ON2 is the first ON- ON1 is shorter than the length tON1 by a predetermined length u1.

The slope at which the monitoring voltage CS increases in the first ON period ON1 and the slope at which the monitoring voltage CS increases in the second ON period ON2 may be equal to each other. Thus, the second due to the length (t ON2) of the on-period (ON2) is shorter than the length (t ON1) of the first on interval (ON1), the first is identical to the sampling voltage (Va1) and the third sampling voltage (Va2) If so, the fourth sampling voltage Vb2 is different from the second sampling voltage Vb1. The fourth sampling voltage Vb2 may be smaller than the second sampling voltage Vb1.

4 is a diagram for explaining a case where the second voltage V2 is higher than the first voltage V1. Referring to FIG. 4, a section between time t5 and time t6 is a first ON section (ON1), and a section between times t7 and t8 is a second ON section (ON2).

At time t5, the gate signal GATE is enabled. That is, the monitoring voltage CS is sampled at the start time of the first ON period ON1 to generate the first sampling voltage Va1.

At time t6, the gate signal GATE is disabled. That is, the monitoring voltage CS is sampled at the end of the first ON-period ON1 to generate the second sampling voltage Vb1.

The first calculation circuit 130 generates the first voltage V1 by adding the first sampling voltage Va1 and the second sampling voltage Vb1 and the second calculation circuit 140 generates the reference voltage REF by 2 And generates a second voltage V2. In addition, the controller 150 compares the first voltage V1 with the second voltage V2. As shown, the length of the first ON period ON1 is t ON1 . If the first voltage V1 is smaller than the second voltage V2, the controller 150 may increase the length of the second ON-period ON2.

At time t7, the gate signal GATE is enabled again. That is, the monitoring voltage CS is sampled at the start time of the second ON-period ON2 to generate the third sampling voltage Va2.

At time t8, the gate signal GATE is disabled again. That is, the monitoring voltage CS is sampled at the end of the second ON-period ON2 to generate the fourth sampling voltage Vb2.

As described above, since the first voltage V1 is smaller than the second voltage V2 in the first ON-period ON1, the length tON2 of the second ON-period ON2 is the first ON- ON1 is longer than the length tON1 by a predetermined length u2.

The slope at which the monitoring voltage CS increases in the first ON period ON1 and the slope at which the monitoring voltage CS increases in the second ON period ON2 may be equal to each other. Thus, the second due to the length (t ON2) of the on-period (ON2) is longer than the length (t ON1) of the first on interval (ON1), the first is identical to the sampling voltage (Va1) and the third sampling voltage (Va2) If so, the fourth sampling voltage Vb2 is different from the second sampling voltage Vb1. The fourth sampling voltage Vb2 may be greater than the second sampling voltage Vb1.

3 and 4, the sum of the sum of the first sampling voltage Va1 and the second sampling voltage Vb1 (i.e., the first voltage V1) and the reference voltage REF 2 (I.e., the second voltage V2), it is possible to control the monitoring voltage CS to move around the reference voltage REF. That is, when the first voltage V1 is lower than the second voltage V2 in the previous ON period (for example, ON1), the first voltage V1 is increased in the next ON period (for example, ON2) It is possible to increase the length of the next ON-period ON2. Conversely, if the first voltage V1 is greater than the second voltage V2 in the previous ON period (for example, ON1), then the first voltage V1 is decreased in the next ON period (for example, ON2) The length of the ON section ON2 can be reduced. By controlling the switch 20 in this way, the average current flowing through the output rod 13 and the inductive element 15 can be accurately controlled.

On the other hand, the second ON period ON2 can be varied in length depending on the magnitude of the sampling voltages Va1 and Vb1, but the off period between the first ON period ON1 and the second ON period ON2 is fixed It can have a length.

5 is a conceptual diagram for explaining a method of driving a signal control circuit according to a second embodiment of the present invention. For the sake of convenience of explanation, differences from those described with reference to Figs. 3 and 4 will be mainly described.

Referring to FIG. 5, a first ON interval (ON1), a first OFF interval (OFF1), a second ON interval (ON2), a second OFF interval (OFF2), a third ON interval (ON3) (OFF3), the fourth ON period (ON4), and the like are continuously performed.

In the driving method of the signal control circuit 100 according to the first embodiment of the present invention, the comparison operation is performed using the sampled voltage in the previous on period, (present on period).

On the other hand, in the driving method of the signal control circuit 100 according to the second embodiment of the present invention, the comparison operation is performed using the sampled voltage in the previous ON period, and the comparison result is not continuous (i.e., It is reflected in the whole section.

Specifically, for example, the signal control circuit 100 performs a comparison operation using the sampled voltages (for example, Va1 and Va2) and the reference voltage REF in the first ON period ON1, The length of the third ON period ON3 can be adjusted. Therefore, the length t ON2 of the third ON section ON3 may be different from the length t ON1 of the first ON section ON1.

Similarly, the signal control circuit 100 performs the comparison operation using the voltage sampled in the second ON-period ON2 and the reference voltage REF, and determines the length of the fourth ON-interval ON4 according to the comparison result Can be adjusted.

In FIG. 5, the result of the comparison operation conducted in the first ON-period ON1 is reflected in the third ON-period ON3, but the present invention is not limited thereto. For example, it may be reflected in the fourth ON period (ON4), or may be reflected in the fifth ON period.

Alternatively, a plurality of voltages may be sampled and averaged over a plurality of ON intervals (for example, ON1 to ON3) to generate an average voltage, and the average voltage and the reference voltage may be compared, and the next ON period For example, the length of ON4 may be adjusted.

Alternatively, the lengths of a plurality of ON intervals (for example, ON1 to ON3) may be averaged to be reflected in the next ON interval (for example, ON4).

6 is a conceptual diagram for explaining a method of driving a signal control circuit according to the third embodiment of the present invention. For the sake of convenience of explanation, differences from those described with reference to Figs. 3 and 4 will be mainly described.

6, a first ON period, a first OFF period, a second ON period, a second OFF period, OFF2, w (where w is a natural number of 3 or more) (ONw), the w-th off period (OFFw), the w + 1 on period (ONw + 1), and the w + 1 off period (OFFw + 1).

In the method of driving the signal control circuit 100 according to the first embodiment of the present invention, the sampling operation, the comparison operation, and the ON-period adjustment operation are performed in all the ON sections.

On the other hand, in the method of driving the signal control circuit 100 according to the third embodiment of the present invention, a sampling operation, a comparison operation, and an on-period adjustment operation are performed in a part of the ON period.

Specifically, for example, the signal control circuit 100 performs a comparison operation using the sampled voltages (for example, Va1 and Va2) and the reference voltage REF in the first ON period ON1, The length of the second ON section ON2 can be adjusted according to the length of the second ON section. Thus, the length (t ON2) of the second on interval (ON2) is adjusted differently from the length (t ON1) of the first on interval (ON1).

The sampling operation, the comparison operation, and the on-period adjustment operation are not performed for a predetermined period.

The signal control circuit 100 again performs a comparison operation using the sampled voltage at the nth ON period ONw and the reference voltage REF and outputs the comparison result of the (n + 1) -th ON period + The length can be adjusted.

Here, the period during which the on-period adjustment operation is not performed may be set in advance. Alternatively, the signal control circuit 100 may cause the adjustment operation of the on-period to be re-executed when the reference range is out of operation without setting in advance.

7 is a conceptual diagram for explaining a method of driving a signal control circuit according to a fourth embodiment of the present invention.

Referring to FIG. 7, voltages (for example, Va1 and Vb1) sampled in the driving method of the signal control circuit 100 according to the first embodiment of the present invention are sampled at the start and end points of the ON period.

On the other hand, the voltages (for example, Va3 and Vb3) sampled in the method of driving the signal control circuit according to the fourth embodiment of the present invention are set such that the time after the first time (tx) May be a time point before the first time (tx) from the ending point of the first time.

8 is a block diagram for explaining a signal control circuit according to the fifth embodiment of the present invention.

8, the signal control circuit 100 includes sampling circuits 111 and 112, a first calculation circuit 130, a second calculation circuit 140, a control unit 150, and the like. The control unit 150 may include a comparing unit 159, a mux 151, a memory 152, a gate signal providing unit 158, an oscillator 156, a pulse generating unit 155, and the like. The control unit 150 can digitally control the length of the ON interval.

First, the gate signal providing unit 158 generates a first instant signal INST1 indicating the start time point of the first ON period ON1, a second instant signal INST2 indicating the end time point of the first ON period ON1, . As described above, the first time point may be the start time point of the first ON period ON1 and the second time point may be the end time point of the first ON period ON1. Alternatively, the first time point may be a time point after the first time point tx from the start time point of the first ON period ON1, and the second time point may be a time point from the end time point of the first ON period ON1 until the first time point tx Lt; / RTI >

The first sampling circuit 111 generates a first sampling voltage Va1 by sampling the voltage of the monitoring node MN1 in response to the first instant signal INST1.

The second sampling circuit 112 generates a second sampling voltage Vb1 by sampling the voltage of the monitoring node MN1 in response to the second instant signal INST2.

The first calculation circuit 130 generates the first voltage V1 by adding the first sampling voltage Va1 and the second sampling voltage Vb1, for example.

The second arithmetic circuit 140 generates the second voltage V2 by doubling the reference voltage REF, for example.

The comparator 159 compares the first voltage V1 with the second voltage V2 and outputs the comparison result to the mux 151.

The mux 151 provides -n to the memory 152 when the first voltage V1 is greater than the second voltage V2. On the other hand, if the second voltage V2 is greater than the first voltage V1, + n is provided to the memory 152. [ Here, + n or -n is a value indicating how much the length of the second ON section ON2 should be changed when compared with the length of the first ON section ON1.

The memory 152 stores the number of reference pulses (e.g., m) (i.e., the first number) corresponding to the length of the first ON period ON1. When the memory 152 receives + n or -n from the mux 151, the number of reference pulses corresponding to the length of the second ON section ON2 continuous to the first ON section ON1 is m + n or m-n (i.e., the second number). Thus, the signal corresponding to the second number provided by the memory 152 may be the reset signal RST.

On the other hand, the oscillator 156 outputs a signal of a constant frequency.

The pulse generator 155 corrects the signal supplied from the oscillator 156 and provides it to the gate signal supplier 158. For example, the pulse generator 155 may change the frequency of the signal provided from the oscillator 156. [ Alternatively, the pulse generator 155 may use the set signal SET to provide a reference pulse to the gate signal supplier 158 from a point in time when the set signal SET is provided.

The gate signal providing unit 158 counts the number of reference pulses supplied from the pulse generating unit 155 to generate a gate signal GATE. That is, in the first ON period ON1, a gate signal GATE is generated which is enabled for a period corresponding to the first number (m) of reference pulses. And generates a gate signal GATE that is enabled for a period corresponding to the second number (m + n or m-n) of reference pulses in the second ON-period ON2.

A method of driving the signal control circuit according to the fifth embodiment of the present invention will be described in detail with reference to Figs. 9 and 10. Fig. FIGS. 9 and 10 are timing charts for explaining a method of driving the signal control circuit according to the fifth embodiment of the present invention.

Referring to FIG. 9, the gate signal providing unit 158 counts the number of reference pulses to determine the length of the first ON period (ON1) (i.e., a period between time t1 and time t2). That is, in the first ON period ON1, the gate signal GATE is enabled for a period corresponding to m reference pulses.

At time t1, the first sampling circuit 110 generates the first sampling voltage Va1, and at the time t2, the second sampling circuit 110 generates the second sampling voltage Vb1.

The comparator 159 compares the sum of the first sampling voltage Va1 and the second sampling voltage Vb1 with twice the reference voltage REF. As a result of comparison, if the sum of the first sampling voltage Va1 and the second sampling voltage Vb1 is greater than twice the reference voltage REF, the mux 151 provides -n to the memory 152. [ The memory 152 stores m-n.

The gate signal providing unit 158 counts the number of reference pulses and determines the length of the second ON-period ON2 (i.e., the interval between the time t3 and the time t4). That is, in the second ON-period ON2, the gate signal GATE is enabled for a period corresponding to m-n reference pulses. That is, according to the comparison result, the length of the second ON-section ON2 is shorter than the length of the first ON-section ON1.

Referring to FIG. 10, the gate signal providing unit 158 counts the number of reference pulses to determine the length of the first ON period (ON1) (i.e., the period from time t5 to time t6). That is, in the first ON period ON1, the gate signal GATE is enabled for a period corresponding to m reference pulses.

At time t5, the first sampling circuit 110 generates the first sampling voltage Va1, and at the time t6, the second sampling circuit 110 generates the second sampling voltage Vb1.

The comparator 159 compares the sum of the first sampling voltage Va1 and the second sampling voltage Vb1 with twice the reference voltage REF. As a result of comparison, if the sum of the first sampling voltage Va1 and the second sampling voltage Vb1 is less than twice the reference voltage REF, the mux 151 provides + n to the memory 152. [ The memory 152 stores m + n.

The gate signal providing unit 158 counts the number of reference pulses to determine the length of the second ON-period ON2 (i.e., the interval between time t7 and time t8). That is, in the second ON-period ON2, the gate signal GATE is enabled for a period corresponding to m + n reference pulses. That is, according to the comparison result, the length of the second ON-section ON2 is longer than the length of the first ON-section ON1.

11 is a block diagram for explaining a signal control circuit according to a sixth embodiment of the present invention. For convenience of description, differences from those described with reference to Figs. 8 to 10 will be mainly described.

11, the signal control circuit 100 includes sampling circuits 111 and 112, first calculation circuits 131 and 132, a second calculation circuit 141, a control unit 150, and the like.

The first calculation circuits 131 and 132 include an adder 131 which combines the first sampling voltage Va1 and the second sampling voltage Vb1 with each other and a multiplier 132 which multiplies the output value of the adder by 1/2 can do. That is, the first calculation circuits 131 and 132 can output the average value of the first sampling voltage Va1 and the second sampling voltage Vb1 as the first voltage V1.

The second arithmetic circuit 141 buffers the reference voltage REF and outputs it as the second voltage V2. The reference voltage REF may be input to the comparator 159 without the second arithmetic circuit 141. [

The comparator 159 compares the first voltage V1 (that is, the average value of the first sampling voltage Va1 and the second sampling voltage Vb1) and the second voltage V2 (that is, the reference voltage REF) The result can be provided to the mux 151.

Figures 12-14 illustrate examples of the application circuitry of Figure 1, respectively. Figure 12 is a buck converter, Figure 13 is a light device, and Figure 14 is a power transformer. 12 to 14 are merely illustrative and not restrictive.

Referring to FIG. 12, the buck converter includes, for example, a resistor-shaped output load 213 and a capacitor 220 connected to both terminals of the output load 213. In addition, an inductive element 215 may be connected to one terminal of the output rod 213, and a diode 204 may be connected to the other terminal.

Referring to FIG. 13, the light device includes an output rod 213a including, for example, a plurality of LEDs. An inductive element 215 may be connected to one terminal of the output rod 213a, and a diode 204 may be connected to the other terminal of the output rod 213a.

Referring to FIG. 14, the power transformer 250 includes a primary winding 251 and a secondary winding 252. The input power source 211 is connected to the primary winding 251. The control diode 253 is connected to the secondary winding 252. The inductive element 215 may be connected to the control diode 253 and the output load 213b in the form of a resistor. An output filter capacitor 260 may be connected across the output load 213b. One terminal of the catch diode 204 is connected to a node between the inductive element 15 and the control diode 253 and the other terminal is connected to the node between the output load 213b and the secondary winding 252 Lt; / RTI >

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, You will understand. It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive.

10: Application circuit part 11: Input power source
13: output load 15: inductive element
20: Switch 30: Monitoring element
100: sampling circuit 130: first calculation circuit
140: second arithmetic circuit 150:
151: Mux 152: Memory
155: Pulse generator 158: Gate signal supplier

Claims (15)

A switch for controlling an electric current flowing through an inductive element;
A monitoring node connected to the switch; And
And a signal control circuit connected to the monitoring node for receiving a reference voltage to turn on / off the switch,
Wherein the signal control circuit generates a first sampling voltage and a second sampling voltage by sampling respective voltages of the monitoring node at different first and second points of time during the first on period of the switch, And adjusts a second on-period using the first sampling voltage, the second sampling voltage, and the reference voltage. The method according to claim 1,
Wherein the signal control circuit compares a first voltage based on a sum of the first sampling voltage and the second sampling voltage with a second voltage based on the reference voltage, . 3. The method of claim 2,
If the first voltage is greater than the second voltage, decreasing the length of the second on period from the length of the first on period,
And increases the length of the second ON-period than the length of the first ON-period if the first voltage is smaller than the second voltage. The method of claim 3,
The signal control circuit
A memory for storing a first number of reference pulses corresponding to the first on period and for storing a second number of reference pulses corresponding to a second on period according to a comparison result,
And a gate signal provider for holding the second on-period for the second number of times. 5. The method of claim 4,
Wherein the gate signal provider generates a first instant signal indicating a start point of the first ON interval and a second instant signal indicating an end point of the first ON interval,
The signal control circuit
A first sampling circuit for sampling the voltage of the monitoring node in response to the first instant signal to generate the first sampling voltage;
A second sampling circuit for sampling the voltage of the monitoring node in response to the second instant signal to generate the second sampling voltage;
And an arithmetic circuit for summing the first sampling voltage and the second sampling voltage. The method according to claim 1,
The first time point is a start time point of the first ON period,
And the second point of time is the end point of the first on-period. The method according to claim 1,
Wherein the first time point is a time point after the first time point from the start time point of the first on-
And the second time point is a time point before the first time point from an end time point of the first ON period. The method according to claim 1,
And the second on-duration is immediately subsequent to the first on-duration. The method according to claim 1,
And an OFF period between the first ON period and the second ON period has a fixed length. The method according to claim 1,
Wherein the signal control circuit samples the voltage of the monitoring node at a third point of time and a fourth point of time that are different from each other during a second ON period of the switch to generate a third sampling voltage and a fourth sampling voltage, Is the start point of the second on-period, the fourth point is the end point of the second on-
Wherein the second sampling voltage and the fourth sampling voltage are different from each other. 11. The method of claim 10,
Wherein the first sampling voltage and the third sampling voltage are equal to each other. A signal control circuit for turning on / off a switch for controlling a current flowing through an inductive element and receiving a reference voltage,
A sampling unit configured to perform a sampling operation at a first point in time and a second point in time that are different from each other during a first ON period of the switch to generate a first sampling voltage and a second sampling voltage associated with the switch; And
And a controller for adjusting a second on-period using the first sampling voltage, the second sampling voltage, and the reference voltage. 13. The method of claim 12,
Wherein the signal control circuit compares a first voltage based on a sum of the first sampling voltage and the second sampling voltage with a second voltage based on the reference voltage, . 13. The apparatus of claim 12, wherein the control unit
A memory for storing a first number of reference pulses corresponding to the first on period and for storing a second number of reference pulses corresponding to a second on period according to a comparison result,
And a gate signal provider for holding the second on-period for the second number of times. A signal control circuit for turning on / off a switch for controlling a current flowing through an inductive element and receiving a reference voltage,
A first sampling voltage and a second sampling voltage are generated by performing a sampling operation at a start point and an end point of a first on period of the switch, respectively, and at a start point and an end point of a second on- A sampling unit for performing a sampling operation to generate a third sampling voltage and a fourth sampling voltage, respectively; And
And a control unit for adjusting a sum of the first sampling voltage and the second sampling voltage and a length of a second ON period of the switch using the reference voltage,
Wherein the second sampling voltage and the fourth sampling voltage are different from each other.
KR1020140082269A 2014-07-02 2014-07-02 Signal control circuit and switching device comprising the same KR20160004016A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110504951A (en) * 2019-08-16 2019-11-26 杰华特微电子（杭州）有限公司 The control circuit and control method of switching circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110504951A (en) * 2019-08-16 2019-11-26 杰华特微电子（杭州）有限公司 The control circuit and control method of switching circuit

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