KR20150092515A - Capacitor for semiconductor device and method of manufacturing the same - Google Patents

Abstract

A capacitor for a semiconductor device includes a base substrate, a plurality of reflection members, a mold structure, a first electrode, a dielectric element, and a second electrode. The reflection members are arranged on the base substrate and include conductive materials. The mold structure is arranged between the reflection members on the base substrate and has a lateral side with a wave shape. The first electrode is arranged on the reflection member and the mold structure, is electrically connected to the reflection member, and has a lateral side with the wave shape. The dielectric element is arranged on the first electrode and has a lateral side with the wave shape. The second electrode is arranged on the dielectric element and faces the first electrode. Therefore, capacitance is increased and a manufacturing process is simplified.

Description

[0001] CAPACITOR FOR SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME [0002] CAPACITOR FOR SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME [

The present invention relates to a capacitor for a semiconductor device and a manufacturing method thereof. More particularly, the present invention relates to a capacitor for a semiconductor device with improved performance and a manufacturing method thereof

Semiconductor devices include various elements such as thin film transistors, diodes, capacitors, resistors, wirings, and the like. In the past, semiconductor devices were fabricated by arranging elements two-dimensionally on a plane. However, as the degree of integration of the semiconductor device increases, a technique of vertically arranging the elements has been developed.

Semiconductor devices having a three-dimensional structure in the vertical direction have been developed through various processes such as a photolithography process, an etch-back process, and a polishing process. The semiconductor devices having the three-dimensional structure have remarkably increased the degree of integration and can realize high performance.

However, the three-dimensional structures cause problems such as the collapse of the intermediate structure during the manufacturing process. Particularly, as the degree of integration of the semiconductor device increases, these problems become more serious.

However, since the complexity of the structure is in trade-off relation with the performance of a semiconductor device, it is difficult to realize a high-performance semiconductor device.

However, recently, in the fabrication of semiconductor devices, there has been a need to increase the surface area of some devices such as capacitors of DRAM.

Conventional techniques for increasing the surface area used a method of forming a deep and thin pattern, i.e., a method of increasing the aspect ratio. However, when the aspect ratio is increased, defects due to the surface tension of the cleaning liquid occur in the cleaning step.

Therefore, a method of forming a semiconductor pattern in which the surface area is increased without increasing the aspect ratio is required.

It is an object of the present invention to provide a capacitor for a semiconductor device with improved performance.

It is another object of the present invention to provide a method of manufacturing a capacitor for a semiconductor device with improved performance.

It is to be understood that the invention is not limited to the disclosed exemplary embodiments and that various changes and modifications may be made therein without departing from the spirit and scope of the invention.

In order to accomplish one aspect of the present invention, a capacitor for a semiconductor device according to exemplary embodiments of the present invention includes a base substrate, a plurality of reflection members, a mold structure, a first electrode, a dielectric and a second electrode do. The reflective members are disposed on the base substrate and include a conductive material. The mold structure is disposed on the base substrate between the reflection members and has a wavy side surface. The first electrode is disposed on the reflective member and the mold structure and is electrically connected to the reflective member and has a wavy shape on the side surface. The dielectric is disposed on the first electrode and has a wavy shape on the side. The second electrode is disposed on the dielectric and faces the first electrode.

In exemplary embodiments, the width of the first electrode may be equal to or less than the width of the reflective member.

In order to accomplish one aspect of the present invention, a capacitor for a semiconductor device according to exemplary embodiments of the present invention includes a base substrate, a plurality of reflection members, a first electrode, a dielectric, and a second electrode. The reflective members are disposed on the base substrate and include a conductive material. The first electrode is disposed on the reflective member and electrically connected to the reflective member, and the side surface has a wavy shape. The dielectric includes a first dielectric portion disposed on an inner surface of the first electrode and having a side surface wavy shape, and a second dielectric portion disposed on an outer surface of the first dielectric portion and the first electrode. The second electrode includes a second electrode disposed on the dielectric and facing the inner surface and the outer surface of the first electrode.

In order to accomplish one aspect of the present invention, in a method of manufacturing a capacitor for a semiconductor device according to exemplary embodiments of the present invention, a reflection member is formed on a base substrate. Subsequently, photoresist is applied on the base substrate on which the reflective member is formed. Thereafter, the coated photoresist is irradiated with the incident light so that the reflected light is generated from the reflective member, and a predetermined phase difference exists between the incident light and the reflected light. Subsequently, the exposed photoresist is developed to form a wavy mold structure on the side surface. Subsequently, a conductive material is deposited on the mold structure to form a first electrode. Thereafter, a dielectric is formed on the first electrode. Subsequently, a second electrode is formed on the dielectric.

In exemplary embodiments, the forming of the first electrode may further include exposing the mold structure by removing an upper portion of the deposited conductive material.

In exemplary embodiments, forming the dielectric may include removing the exposed mold structure, and forming a dielectric layer on the inner and outer surfaces of the first electrode.

In exemplary embodiments, the step of forming the dielectric may include forming a dielectric layer on the first electrode, removing the top portion of the dielectric layer to form a first dielectric portion and exposing the mold structure, Removing the exposed mold structure, and forming a second dielectric portion on an outer surface of the first dielectric portion and the first electrode.

In exemplary embodiments, the wavelengths of the incident light and the reflected light are the same, and the phase difference may be a value obtained by dividing the wavelength by an integer of 2 or more.

According to exemplary embodiments of the present invention, the contact area of a capacitor for a semiconductor device can be increased to realize various electrical characteristics. In particular, the surface area of the capacitor is increased to increase the capacitance. Therefore, a high-performance semiconductor device can be realized.

1 is a plan view showing a capacitor for a semiconductor device according to an embodiment of the present invention.
2 is a cross-sectional view showing the capacitor shown in FIG.
FIGS. 3, 5A and 6 to 9 are cross-sectional views illustrating a method of manufacturing the capacitor shown in FIG.
4A is a graph showing the light shown in FIG.
4B is a graph illustrating the principle of standing wave phenomenon according to an embodiment of the present invention.
Fig. 5B is an image showing the mold structure shown in Fig. 5A. Fig.
10 is a cross-sectional view showing a capacitor for a semiconductor device according to another embodiment of the present invention.
11A to 11D are cross-sectional views illustrating a method of manufacturing the capacitor shown in FIG.
12 is a cross-sectional view showing a capacitor for a semiconductor device according to still another embodiment of the present invention.
13A to 13F are cross-sectional views illustrating a method of manufacturing the capacitor shown in FIG.

Hereinafter, a capacitor for a semiconductor device and a method of fabricating the capacitor according to exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the following embodiments, It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

In this specification, specific structural and functional descriptions are merely illustrative and are for the purpose of describing the embodiments of the present invention only, and embodiments of the present invention may be embodied in various forms and are limited to the embodiments described herein And all changes, equivalents, and alternatives falling within the spirit and scope of the invention are to be understood as being included therein. It is to be understood that when an element is described as being "connected" or "in contact" with another element, it may be directly connected or contacted with another element, but it is understood that there may be another element in between something to do. In addition, when it is described that an element is "directly connected" or "directly contacted " to another element, it can be understood that there is no other element in between. Other expressions that describe the relationship between components, for example, "between" and "directly between" or "adjacent to" and "directly adjacent to", and the like may also be interpreted.

The terminology used herein is for the purpose of describing exemplary embodiments only and is not intended to be limiting of the invention. The singular expressions include plural expressions unless the context clearly dictates otherwise. In this specification, the terms "comprising," "comprising" or "having ", and the like, specify that there are performed features, numbers, steps, operations, elements, It should be understood that the foregoing does not preclude the presence or addition of other features, numbers, steps, operations, elements, parts, or combinations thereof. Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in commonly used dictionaries are to be interpreted as having a meaning consistent with the contextual meaning of the related art and are to be interpreted as either ideal or overly formal in the sense of the present application .

The terms first, second and third, etc. may be used to describe various components, but such components are not limited by the terms. The terms are used for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as a second component or the third component, and similarly the second or third component may be alternately named.

FIG. 1 is a plan view showing a capacitor for a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view showing the capacitor shown in FIG.

1 and 2, a semiconductor device includes a base substrate 10, a reflection member 20, a base insulating film 30, and a capacitor 100. [

The base substrate 10 includes a semiconductor substrate, a display substrate, an insulating substrate, and the like. For example, the base substrate 10 may be a silicon substrate, a silicon on insulator (SOI) substrate, a germanium substrate, a silicon germanium substrate, a gallium arsenide substrate, a ceramic substrate, a quartz substrate, Substrate and the like.

On the base substrate 10, fine elements such as active elements, passive elements, wirings, and the like can be formed.

The reflective member 20 is disposed on the base substrate 10 and reflects light used for exposure. In this embodiment, the reflective member 20 includes a contact line to connect the first electrode 110 of the capacitor 100 to the fine elements. For example, the reflective member 20 includes a metal such as aluminum or copper, a conductive metal oxide, or the like, and has a reflectance of 80% or more in the ultraviolet region.

The base insulating film 30 is disposed on the base substrate 10 to insulate the reflecting member 20 from other electric elements.

For example, the etch stop layer 40 may be disposed between the base insulating layer 30 and the capacitor 100. The etching stopper film 40 prevents the base insulating film 30 from being etched during the manufacturing process. In another embodiment, the etch stop layer 40 is optically anisotropic and may delay the phase of the transmitted light. For example, the etch stop layer 40 may include optically anisotropic calcium carbonate (CaCO3), mica, ice, an optical fiber, a polymer compound, and the like.

The capacitor 100 includes a first electrode 110, a second electrode 120, a dielectric 130, and a mold structure 140.

The mold structure 140 is disposed on the base insulating film 30 and the etching stopper film 40. The mold structure 140 may include SiO2, SiGe, Si, or a carbon-based resin.

The side surface of the mold structure 140 has various shapes other than a flat shape such as a wavy shape, a step shape, a projecting shape, and a concavo-convex shape. In this embodiment, the mold structure 140 has a wavy shape.

The first electrode 110 includes a metal, a conductive metal oxide, and the like, and is disposed along the side surface of the reflective member 20 and the mold structure 140. The side surface of the first electrode 110 has various shapes other than a planar shape as the side surface of the mold structure 140. For example, the side surface of the first electrode 110 has a wavy shape.

In this embodiment, the width of the first electrode 110 is equal to or smaller than the width of the reflective member 20. [ When the width of the first electrode 110 is larger than the width of the reflective member 20, a standing wave is not sufficiently generated in an exposure step to be described later in the region outside the reflective member 20. However, in this embodiment, since the width of the first electrode 110 is equal to the width of the reflective member 20 or smaller than the width of the reflective member 20, the standing wave is sufficiently generated in the exposure step.

The dielectric 130 is disposed on the first electrode 110 and the mold structure 140. The side surface of the dielectric 130 has various shapes other than a planar shape as the side surface of the first electrode 110. For example, the side surface of the dielectric 130 has a wavy shape.

The second electrode 120 includes a metal, a conductive metal oxide, and the like, and is disposed on the dielectric 130 to be electrically opposed to the inner surface of the first electrode 110. The side surface of the second electrode 120 has various shapes other than a planar shape such as a side surface of the dielectric 130. For example, the side surface of the second electrode 130 has a wavy shape. In this embodiment, the second electrode 120 embeds the well W, which is the space formed by the first electrode 110, and covers the top of the mold structure 140.

FIGS. 3, 5A and 6 to 9 are cross-sectional views illustrating a method of manufacturing the capacitor shown in FIG.

Referring to FIG. 3, a reflective member 20 and a base insulating film 30 are formed on a base substrate 10. For example, after the reflective member 20 is formed on the base substrate 10 through a photoresist process, an insulating material is deposited on the base substrate 10 on which the reflective member 20 is formed, and the reflective member 20 The reflective member 20 and the base insulating film 30 may be formed by removing the insulating material deposited on the substrate 20 by a method such as etch back or chemical mechanical polishing (CMP). In another embodiment, a base insulating film 30 having a hole through which a reflecting member 20 is to be formed is formed on a base substrate through a photoresist process, and then a conductive film is formed on the base substrate 10 on which the base insulating film 30 is formed. The reflective member 20 and the base insulating film 30 may be formed by depositing a material and removing the conductive material deposited on the base insulating film 30 by a method such as etch-back, chemical mechanical polishing or the like.

An etch stop line 40 is formed on the base substrate 10 on which the reflective member 20 and the base insulating film 30 are formed. In another embodiment, the etch stop film 40 may be omitted.

A photoresist film 141 is formed on the base substrate 10 on which the etching stopper film 40 is formed.

The mask 50 is used to expose the photoresist film 141 disposed on the etch stop film 40. And irradiates the photoresist film 141 with light such as ultraviolet rays, X-rays, or laser beams through the transmissive portion 51 of the mask 50.

4A is a graph showing the light shown in FIG.

Referring to FIGS. 3 and 4A, the light irradiated on the photoresist film 141 is incident light? 2. The etching stopper film 40 disposed under the photoresist film 141 transmits the incident light epsilon 2 but the contact line 20 disposed under the etching stopper film 40 contains a metal, 2). Therefore, the incident light epsilon 2 and the reflected light epsilon 3 exist simultaneously in the photoresist film 141 and the etch stop film 40. Since the etching stopper film 40 does not include the photosensitive material, there is no change even if the incident light? 2 and the reflected light? 3 are present at the same time. However, since the photoresist film 141 includes a photosensitive material, the shape of the mold structure (140 in FIG. 5) to be formed later changes depending on the optical characteristics of the incident light? 2 and the reflected light? 3.

In this embodiment, there is a predetermined phase difference (? / N) between the incident light? 2 and the reflected light? 3. For example, the incident light? 2 and the wavelength? Of the reflected light? 3 are the same, and the phase difference? / N can be equal to a value obtained by dividing the wavelength by 1 or an integer n of 3 or more. The interference phenomenon occurs between the incident light epsilon 2 and the reflected light epsilon 3 by appropriately adjusting the phase difference lambda / n between the incident light epsilon 2 and the reflected light epsilon 3 in this embodiment.

In this embodiment, the reflecting member 20 is disposed under the photoresist film 141 to maximize the generation of the reflected light? 3. Further, the thickness of the etching stopper film 40 disposed between the photoresist film 141 and the reflective member 20 is adjusted to easily adjust the phase difference? / N between the incident light? 2 and the reflected light? 3 .

When the interference phenomenon occurs between the incident light epsilon 2 and the reflected light epsilon 3, the maximum exposure amount MAX is shown at a portion where the waves of the incident light epsilon 2 and the reflected light epsilon 3 overlap each other and the incident light epsilon 2 and the reflected light epsilon 3 (MIX) at the portion where the wave of the incident light is canceled. The maximum exposure amount MAX and the minimum exposure amount MIN are repeated alternately with each other along the direction perpendicular to the incidence direction of the incident light? 2.

The portion corresponding to the maximum exposure amount (MAX) is exposed to the inner side, and the photoresist is photo-decomposed to the inner side. The portion corresponding to the maximum exposure amount (MIN) is less exposed and the photoresist is photolytically degraded.

Thus, portions of the photoresist that are photolyzed and partially photolyzed in the vertical direction are repeatedly alternating with each other.

4B is a graph illustrating the principle of standing wave phenomenon according to an embodiment of the present invention.

4A and 4B, when n is 1, the wavelengths of the incident light? 2 and the reflected light? 3 coincide with each other. When the wavelengths of the incident light epsilon 2 and the reflected light epsilon 3 coincide with each other, the incident light epsilon 2 and the reflected light epsilon 3 exhibit wave amplification phenomena such as resonance and resonance. For example, the extent to which photoresist is photo-degraded by the wave amplification phenomenon is determined. The magnitude of the side curvature generated by the photo-decomposition of the photoresist is determined by the aperture (?) Of the incident light (? 2) and the reflected light (? 3) and the opening formed in the lens (not shown) of the exposure apparatus . The minimum distance (dmin) giving the resolution according to the wavelength (λ) can be obtained by [Equation 1].

[Formula 1]

In this case, NA represents the numerical aperture (NA) seen from the light source or the object and has the same value as sin? (? Represents the spread angle of light). Therefore, the magnitude of the side curvature can be controlled by adjusting the exposure conditions.

In this embodiment, the line width of the capacitor 100 has a size of several tens of nanometers, so that the effect of bending due to the standing wave used for exposure is maximized.

In comparison with the embodiment of the present invention, when n is 1/2, the wavelengths of the incident light epsilon 2 and the reflected light epsilon 4 have a phase difference of half wavelength (? / 2). When the incident light epsilon 2 and the reflected light epsilon 4 have a phase difference of half wavelength? / 2, the incident light epsilon 2 and the reflected light epsilon 4 interfere with each other by destructive interference and show no optical effect.

Referring again to FIG. 5A, the exposed photoresist film 141 is developed to form a mold structure 140. Subsequently, the etching stopper film 40 is partly etched using the mold structure 140 as an etching mask to expose the reflective member 20.

Fig. 5B is an image showing the mold structure shown in Fig. 5A. Fig.

Referring to FIGS. 5A and 5B, the side surface of the mold structure 140 has a wave shape in which protrusions and recesses are repeated in the vertical direction. The projecting portion on the side of the mold structure 140 corresponds to the minimum exposure amount MIN and the recessed portion corresponds to the maximum exposure amount MAX.

Referring to FIG. 6, a conductive material is deposited on a base substrate 10 on which a mold structure 140 is formed to form a first conductive layer 111. The first conductive layer 111 is formed along the shape of the mold structure 140 so that the side surface has a wavy shape.

Referring to FIG. 7, an upper portion of the first conductive layer 111 is removed by an etch-back, a chemical mechanical polishing, or the like to expose an upper surface of the mold structure 140 to form a first electrode 110.

Referring to FIG. 8, a dielectric material is deposited on a mold structure 140 having a first electrode 110 to form a dielectric layer 130. For example, the highly dielectric material includes a metal oxide. The dielectric layer 130 is formed along the shape of the first electrode 110 so that the side surface has a wavy shape.

Referring to FIG. 9, a conductive material is deposited on the dielectric layer 130 to form the second electrode 120. The second electrode 120 embeds the well W, which is a space formed by the first electrode 110, and covers the upper portion of the mold structure 140.

The capacitance of the capacitor 100 is proportional to the area of the dielectric 130 interposed between the first electrode 110 and the second electrode 120 and inversely proportional to the thickness of the dielectric 130. In this embodiment, the shape of the dielectric 130 has a wavy shape, so that the area of the dielectric 130 increases and the capacitance of the capacitor 100 increases.

Further, in the exposure step, a wave form is formed between the incident light? 2 and the reflected light? 3 by using an interference phenomenon, so that the manufacturing process is simple.

10 is a cross-sectional view showing a capacitor for a semiconductor device according to another embodiment of the present invention. The remaining components except for the mold structure in this embodiment are the same as those in the embodiment shown in Figs. 1 to 9, so duplicate descriptions of the same components will be omitted.

10, the semiconductor device includes a base substrate 10, a reflection member 20, a base insulating film 30, and a capacitor 200. [

The capacitor 200 includes a first electrode 210, a second electrode 220, and a dielectric 230.

The first electrode 210 includes a metal, a conductive metal oxide, and the like, and is disposed on the reflective member 20. The side surface of the first electrode 210 has various shapes other than a planar shape. For example, the side surface of the first electrode 210 has a wavy shape.

The dielectric 230 is disposed on the first electrode 210 and the etch stop layer 40. In this embodiment, the dielectric 230 is disposed on the outer surface as well as the inner surface of the first electrode 210. The side surface of the dielectric 230 has various shapes other than the planar shape as the side surface of the first electrode 210. For example, the side surface of the dielectric 230 has a wavy shape.

The second electrode 220 includes a metal, a conductive metal oxide, and the like, and is disposed on the dielectric 230 to be electrically opposed to the inner surface as well as the outer surface of the first electrode 210. The second electrode 220 also embeds not only the inner space W formed by the first electrode 210 but also the peripheral portion P which is the outer space of the first electrode 210. In this embodiment,

The side surface of the second electrode 220 has various shapes other than a planar shape as the side surface of the dielectric 230. For example, the side surface of the second electrode 230 has a wavy shape.

11A to 11D are cross-sectional views illustrating a method of manufacturing the capacitor shown in FIG.

Referring to FIG. 11A, a reflective member 20, a base insulating film 30, an etching stopper film 40, a mold structure 140, and a first electrode 210 are formed on a base substrate 10. The step of forming the reflective member 20, the base insulating film 30, the etching stopper film 40, the mold structure 140 and the first electrode 210 on the base substrate 10 is the same as that shown in Fig. 3 7, and therefore, overlapping description will be omitted.

Referring to FIG. 11B, the mold structure 140 is then removed to expose the outer surface of the first electrode 210. For example, the mold structure 140 may be removed through a development process, dry etching, or the like.

Referring to FIG. 11C, a metal oxide is deposited on the inner and outer surfaces of the first electrode 210 to form a dielectric 230. In this embodiment, the dielectric 230 is also formed on the etch stop film 40 as well as the inner and outer surfaces of the first electrode 210. The outer and inner surfaces of the dielectric 230 have a wavy shape along the inner and outer surfaces of the first electrode 210.

Referring to FIG. 11D, a conductive material is deposited on the dielectric 230 to form a second electrode 220. The second electrode 220 may be formed by embedding the conductive material into the inner space W formed by the first electrode 210 and the peripheral portion P that is the outer space.

According to this embodiment, the area of the second electrode 220 opposed to the first electrode 210 increases, and the capacitance of the capacitor 200 increases.

12 is a cross-sectional view showing a capacitor for a semiconductor device according to still another embodiment of the present invention. In this embodiment, the remaining components except for the dielectric are the same as the embodiment shown in Figs. 10 to 11D, so that redundant description of the same components is omitted.

12, the semiconductor device includes a base substrate 10, a reflective member 20, a base insulating film 30, and a capacitor 300.

The capacitor 300 includes a first electrode 310, a second electrode 320, and a dielectric 330.

In this embodiment, the side surface of the first electrode 310 has a wavy shape.

The dielectric 330 is disposed on the first electrode 310 and the etch stop layer 40. In this embodiment, the dielectric 330 is disposed not only on the inner surface but also on the outer surface of the first electrode 310. The side surface of the dielectric 330 has a wavy shape like the side surface of the first electrode 310.

In this embodiment, the dielectric 330 includes a first dielectric portion 334 and a second dielectric portion 336. The first dielectric portion 334 is disposed on the inner surface of the first electrode 310. The second dielectric portion 336 is disposed on the outer surface of the first dielectric portion 334 and the first electrode 310 and on the etching stopper film 40.

The first and second electrodes 334 and 336 are stacked on the first electrode 310 and the second electrode 336 is disposed on the outer side of the first electrode 310. Therefore, the thickness of the dielectric 330 is thicker than the inside of the first electrode 310.

The second electrode 320 is disposed on the second dielectric portion 336 of the dielectric 330 and electrically opposes not only the inner surface but also the outer surface of the first electrode 310. The second electrode 320 also embeds not only the inner space W formed by the first electrode 310 but also the peripheral portion P which is the outer space of the first electrode 310. In this embodiment,

The side surface of the second electrode 320 has a wavy shape like the side surface of the dielectric 330.

13A to 13F are cross-sectional views illustrating a method of manufacturing the capacitor shown in FIG.

Referring to FIG. 13A, a reflective member 20, a base insulating film 30, an etching stopper film 40, a mold structure 140, and a first electrode 310 are formed on a base substrate 10. In this embodiment, the step of forming the reflective member 20, the base insulating film 30, the etching stopper film 40, the mold structure 140 and the first electrode 310 on the base substrate 10 is the same as that shown in Fig. 7, and therefore, overlapping description will be omitted.

Referring to FIG. 13B, a metal oxide is deposited on the mold structure 140 having the first electrode 310 to form a dielectric layer 332. For example, the highly dielectric material includes a metal oxide. The dielectric layer 332 is formed along the shape of the first electrode 310 so that the side surface has a wavy shape.

Referring to FIG. 13C, the upper portion of the dielectric layer 332 is removed to form the first dielectric portion 334 and expose the mold structure 140. At this time, the first dielectric part 334 is laminated with the first electrode 310, which increases the resistance against external forces that can be received during the process. For example, the top of the dielectric layer 332 may be removed using etch back, chemical mechanical polishing, or the like.

In this embodiment, the first dielectric portion 334 includes a material having a high dielectric constant. However, in another embodiment, it is possible to use a material having high resistance to an external force regardless of the kind of the material of the first dielectric portion 334. [

Referring to FIG. 13D, the mold structure 140 is then removed to expose the outer surface of the first electrode 310. For example, the mold structure 140 may be removed through a development process, dry etching, or the like.

Referring to FIG. 13E, a metal oxide is deposited on the outer surface of the first dielectric layer 334, the first electrode 310, and the etching stopper film 40 to form the second dielectric portion 336. Thus, the dielectric 330 having the first dielectric portion 334 and the second dielectric portion 336 is formed. The inner surface and the outer surface of the second dielectric portion 336 have a wavy shape along the shape of the outer surface of the first dielectric portion 334 and the first electrode 310, respectively.

In this embodiment, the dielectric 330 is also formed on the etch stop film 40 as well as the inner and outer surfaces of the first electrode 310.

Referring to FIG. 13F, a conductive material is deposited on the dielectric 330 to form a second electrode 320. The second electrode 320 is formed by embedding the conductive material into the inner space W formed by the first electrode 310 and the peripheral portion P that is the outer space.

According to the present embodiment as described above, since the first electrode 310 and the first dielectric portion 334 are lined, resistance to external force is great. Accordingly, the shape of the first electrode 310 is maintained for the subsequent processes, and the defective rate is reduced.

While the present invention has been described with reference to exemplary embodiments, it is to be understood that the invention is not limited thereto. Those skilled in the art will readily obviate modifications and variations within the spirit and scope of the appended claims. It will be understood that various changes and modifications may be made therein without departing from the spirit and scope of the invention.

According to exemplary embodiments of the present invention, the geometry of the dielectric has a wavy shape to increase the capacitance of the capacitor. Further, since a wave shape is formed between the incident light and the reflected light in the exposure step by using the interference phenomenon, the manufacturing process is simple.

Furthermore, a material having a high reflectivity such as a reflective member is disposed under the photoresist film to maximize the generation of reflected light. In addition, the thickness of the etching stopper film disposed between the photoresist film and the reflective member can be adjusted to easily adjust the phase difference between the incident light and the reflected light.

Moreover, the area of the second electrode facing the first electrode increases, and the capacitance of the capacitor increases.

In addition, since the first electrode and the first dielectric portion are lined with each other, resistance to external force is great. Accordingly, the shape of the first electrode is maintained for the subsequent processes, and the defective rate is reduced.

In the conventional semiconductor manufacturing technology, the standing wave phenomenon occurring in the exposure process is regarded as a defect, and the anti-reflection coating is applied to the bottom of the photoresist to prevent the generation of the standing wave, or post exposure baking (PEB) . That is, the conventional semiconductor devices having relatively large device sizes were not technically significant because they were relatively small in the bending due to the standing wave, and were treated as defective. However, in the case of semiconductor devices with tens of nanometers (nm) scale as in the present, the bending due to the standing wave can be used as a useful technique for securing the surface area.

10: base substrate 20: reflective member
30: base insulating film 40: etch stop film
100: capacitor 110: first electrode
120: second electrode 130: dielectric
140: Mold structure

Claims (8)

A base substrate;
A plurality of reflective members disposed on the base substrate and including a conductive material;
A mold structure disposed on the base substrate between the reflection members and having a side wave shape;
A first electrode disposed on the reflective member and the mold structure, the first electrode being electrically connected to the reflective member and having a side wave shape;
A dielectric disposed on the first electrode and having a side wave shape; And
And a second electrode disposed on the dielectric and facing the first electrode. The capacitor for a semiconductor device according to claim 1, wherein a width of the first electrode is equal to or smaller than a width of the reflective member. A base substrate;
A plurality of reflective members disposed on the base substrate and including a conductive material;
A first electrode disposed on the reflective member and electrically connected to the reflective member and having a side wave shape;
A dielectric disposed on an inner surface of the first electrode and having a wavy shape on a side surface and a second dielectric portion disposed on an outer surface of the first dielectric portion and the first electrode; And
And a second electrode disposed on the dielectric and facing the inner and outer surfaces of the first electrode. Forming a reflective member on the base substrate;
Applying a photoresist on a base substrate on which the reflective member is formed;
Irradiating the applied photoresist with an incident light so that reflected light is generated from the reflective member and a predetermined retardation exists between the incident light and the reflected light;
Developing the exposed photoresist to form a wavy mold structure on the side surface;
Depositing a conductive material on the mold structure to form a first electrode;
Forming a dielectric on the first electrode; And
And forming a second electrode on the dielectric. 5. The method of claim 4, wherein forming the first electrode further comprises removing an upper portion of the deposited conductive material to expose the mold structure. 6. The method of claim 5, wherein forming the dielectric comprises:
Removing the exposed mold structure; And
And forming a dielectric layer on the inner and outer surfaces of the first electrode. 6. The method of claim 5, wherein forming the dielectric comprises:
Forming a dielectric layer on the first electrode;
Removing an upper portion of the dielectric layer to form a first dielectric portion and exposing the mold structure;
Removing the exposed mold structure; And
And forming a second dielectric portion on an outer surface of the first dielectric portion and the first electrode. 5. The method of claim 4, wherein the wavelengths of the incident light and the reflected light are the same, and the phase difference is a value obtained by dividing the wavelength by an integer of 2 or more.

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