KR20150061155A - Inverter - Google Patents

Abstract

The present invention relates to an inverter converting direct current voltage to alternating current voltage. The present invention has: a direct current voltage supply unit which filters and outputs direct current voltage inputted from the outside; an alternating voltage converting unit which converts the direct current voltage outputted from the direct current voltage supply unit into alternating current voltage; and an alternating current voltage filtering unit which filters the alternating current voltage outputted from the alternating voltage converting unit.

Description

Inverter {Inverter}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an inverter, and more particularly to an inverter for converting a DC voltage into an AC voltage.

The inverter converts the DC voltage into an AC voltage and supplies it to the load. One example of such an inverter is disclosed in Korean Patent Application (10-2011-0137178). The above-mentioned patent uses a feedback circuit having a complicated configuration for converting a direct current voltage into an alternating current voltage. That is, the disclosed patent is subjected to various complicated processes in order to output an AC voltage of 220 volts.

As described above, according to the related art, a complicated process is required to convert the DC voltage into the AC voltage, and the size of the inverter accordingly increases accordingly. As the size of the inverter increases, the number of components used increases, which leads to an increase in the manufacturing cost of the inverter, thereby degrading the competitiveness of the product. In addition, if the inverter fails, the repair process becomes complicated and the repair cost increases. In addition, since the internal structure of the inverter is complicated, the conversion efficiency of converting the DC voltage into the AC voltage is also lowered. Therefore, it is necessary to provide a simple structure inverter in order to enhance the product competitiveness while increasing the conversion efficiency.

SUMMARY OF THE INVENTION The present invention has been made in order to satisfy the above-mentioned need, and is intended to provide an inverter having a simple circuit structure.

According to an aspect of the present invention, there is provided an inverter including: a DC voltage supplier for filtering and outputting a DC voltage input from the outside; An alternating-current voltage converting unit for converting the direct-current voltage output from the direct-current voltage supplier into an alternating-current voltage; And an AC voltage filter unit for filtering the AC voltage output from the AC voltage conversion unit.

In the present invention, the AC voltage converting unit may include: a PWM wave generating unit that receives the DC voltage to generate a PWM wave; And a transformer for converting the PWM wave output from the PWM wave generator into a sine wave to output an AC voltage.

In the present invention, the PWM wave generating unit may include a plurality of NMOS transistors for generating the PWM wave, and the AC voltage converting unit may further include a PWM controller for controlling operations of the plurality of NMOS transistors.

In the present invention, the AC voltage conversion unit may further include a current detector for detecting a current of the input DC voltage to block an excessive current from being applied to the AC voltage conversion unit.

In the present invention, the PWM wave generating unit may include: a positive polarity PWM wave generating unit for generating a positive polarity PWM wave and applying it to the transforming unit; And a negative PWM wave generator for generating a negative PWM wave and applying it to the transforming unit.

In the present invention, the PWM wave generating unit may further include a blocking capacitor for causing the PWM wave applied to the transforming unit to rise obliquely without abruptly rising, and to descend obliquely without abruptly lowering.

As described above, according to the present invention, the conversion efficiency of the inverter is increased (about 85%), the size of the inverter is reduced and the inverter can be reduced in size and weight, Can be easily obtained.

1 is a block diagram of an inverter according to a preferred embodiment of the present invention.
FIG. 2 is a circuit diagram of the PWM wave generator, the transformer, and the output filter shown in FIG.
3 is a waveform diagram of voltages used in the inverter shown in Fig.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily carry out the present invention. Like reference numerals in the drawings denote like elements.

1 is a block diagram of an inverter according to the present invention. Referring to FIG. 1, the inverter 100 includes a DC voltage providing unit 110, an AC voltage converting unit 120, and an AC voltage filtering unit 130.

The DC voltage providing unit 110 filters the DC voltage VIN input from the outside and provides the AC voltage to the AC voltage converting unit 120. The DC voltage supplier 110 includes an initial charging unit 111 and an input filter unit 112.

The initial charging unit 111 receives and charges the DC voltage VIN input from the outside, and transmits the charged DC voltage to the input filter unit 112. During the charging of the DC voltage (VIN), a pulsating current is generated in the DC voltage (VIN).

The input filter unit 112 filters the DC voltage output from the initial charging unit 111. That is, the input filter unit 112 removes the pulsating current included in the DC voltage output from the initial charging unit 111. Therefore, the DC voltage output from the input filter unit 112 is transferred to the AC voltage conversion unit 120 in a state in which the pulsating current is removed, as shown in FIG. 3 (a).

The AC voltage converting unit 120 receives the DC voltage V1 output from the input filter unit 112, converts the AC voltage into an AC voltage, and outputs the AC voltage. The AC voltage converting unit 120 includes a PWM (Pulse Width Modulation) wave generating unit 121, a PWM control unit 122, and a transforming unit 123.

The PWM wave generating unit 121 receives the DC voltage output from the input filter unit 112 and generates and outputs a signal having a PWM wave. The PWM wave generating unit 121 will be described in detail with reference to FIG.

The PWM control unit 122 controls the operation of the PWM wave generating unit 121.

The transformer 123 converts the PWM wave signal output from the PWM wave generator 121 into an AC voltage. The transformer 123 will be described in detail with reference to FIG.

The AC voltage filter unit 130 filters and outputs the output signal of the AC voltage conversion unit 120. The AC voltage filter unit 130 includes an output filter unit 131 and a noise removing unit 132.

The output filter unit 131 is connected to the transforming unit 123 and filters the AC voltage output from the transforming unit 123. That is, the output filter unit 131 removes the DC component included in the AC voltage output from the transformer 123 and outputs the DC component. The output filter unit 131 will be described in more detail with reference to FIG.

The noise removing unit 132 is connected to the output filter unit 131. The noise removing unit 132 removes the inverting noise included in the signal output from the output filter unit 131 and outputs the final AC voltage. That is, the noise removing unit 132 removes the PWM wave component included in the signal output from the output filter unit 131.

2 is a circuit diagram of the PWM wave generating unit 121, the transforming unit 123, and the output filter unit 131 shown in FIG.

2, the PWM wave generating unit 121 includes first and second current detectors 141 and 142, a positive polarity PWM wave generating unit 125, a negative PWM wave generating unit 126, and capacitors C1 To C4, and the transforming unit 123 includes a transformer 127. [

The primary terminals 1 and 2 of the transformer 127 are connected to the PWM wave generating unit 121 and the secondary terminals 3 and 4 of the transformer 127 are connected to the output filter unit 131 .

The first current detector 141 is connected between the DC voltage supply 110 and the NMOS transistors Q3, Q4, Q7 and Q8. The first current detector 141 detects the current of the output signal V1 of the DC voltage supply 110 and outputs the overcurrent when the current of the signal V1 is higher than a predetermined level, Polarity PWM wave generator 125 and the negative polarity PWM wave generator 126. The positive polarity PWM wave generator 125 and negative polarity PWM wave generator 126 shown in FIG.

The positive polarity PWM wave generating unit 125 generates a positive polarity PWM wave. That is, the positive polarity PWM wave generating section 125 generates the positive polarity PWM wave b11 of the waveform of the PWM wave shown in Fig. 3 (b). The positive polarity PWM wave generator 125 includes a plurality of NMOS transistors Q1 to Q4 and a capacitor C1.

The capacitor C1 removes the noise, for example, the AC component included in the signal input to the positive polarity PWM wave generator 125. [

The upper two NMOS transistors Q3 and Q4 of the plurality of NMOS transistors Q1 to Q4 are connected in parallel with each other. That is, the drains of the NMOS transistors Q3 and Q4 are connected to the output terminal of the first current detector 141, the sources of the NMOS transistors Q3 and Q4 are connected to the node N1, , And Q4 are connected to the PWM control unit (122 in FIG. 1). Therefore, when a predetermined voltage is applied to the gates of the NMOS transistors Q3 and Q4, the NMOS transistors Q3 and Q4 are turned on and output from the first current detector 141 Is transmitted to the transformer 123, that is, the first terminal of the primary side of the transformer 127 through the node N1.

The lower two NMOS transistors Q1 and Q2 of the plurality of NMOS transistors Q1 to Q4 are connected in parallel to each other. That is, the drains of the NMOS transistors Q1 and Q2 are connected to the node N1, the sources of the NMOS transistors Q1 and Q2 are connected to the ground GND, and the drains of the NMOS transistors Q1 and Q2 The gates are connected to a PWM control section (122 in FIG. 1). Therefore, when a predetermined voltage is applied to the gates of the NMOS transistors Q1 and Q2, the NMOS transistors Q1 and Q2 are turned on and the voltage of the node N1 Is lowered to the ground voltage level. At this time, the first terminal of the primary side of the transformer 127 is lowered to the ground voltage level.

Although the NMOS transistors Q3 and Q4 and the NMOS transistors Q1 and Q2 are configured as a pair, they are not necessarily configured as a pair. That is, when the voltage applied to the AC voltage conversion unit 120 is low or the capacity of the NMOS transistors Q1 to Q4 is large, the NMOS transistors Q3 and Q4 and the NMOS transistors Q1 and Q2 .

The negative PWM wave generator 126 generates a negative PWM wave. That is, the negative PWM wave b21 of the waveform of the PWM wave shown in Fig. 3 (b) is generated. The negative PWM wave generator 126 includes a plurality of NMOS transistors Q5 to Q8 and a capacitor C2.

The capacitor C2 removes the noise, for example, the AC component included in the signal input to the negative PWM wave generating unit 126. [

The upper two NMOS transistors Q7 and Q8 of the plurality of NMOS transistors Q5 to Q8 are connected in parallel with each other. That is, the drains of the NMOS transistors Q7 and Q8 are connected to the output terminal of the first current detector 141, the sources of the NMOS transistors Q7 and Q8 are connected to the node N2, , And Q8 are connected to the PWM control unit (122 in Fig. 1). Therefore, when a predetermined voltage is applied to the gates of the NMOS transistors Q7 and Q8, the NMOS transistors Q7 and Q8 are turned on and output from the first current detector 141 Is transmitted to the transformer 123, that is, the second terminal of the primary side of the transformer 127 through the node N2.

The lower two NMOS transistors Q5 and Q6 of the plurality of NMOS transistors Q5 to Q8 are connected in parallel with each other. That is, the drains of the NMOS transistors Q5 and Q6 are connected to the node N2, the sources of the NMOS transistors Q5 and Q6 are connected to the ground GND, and the drains of the NMOS transistors Q5 and Q6 The gates are connected to a PWM control section (122 in FIG. 1). Accordingly, when a predetermined voltage is applied to the gates of the NMOS transistors Q5 and Q6, the NMOS transistors Q5 and Q6 are turned on and the voltage of the node N2 Is lowered to the ground voltage level. At this time, the second terminal of the primary side of the transformer 127 is lowered to the ground voltage level.

Although the NMOS transistors Q7 and Q8 and the NMOS transistors Q5 and Q6 are formed as a pair, they are not necessarily configured as a pair. That is, when the voltage applied to the AC voltage conversion unit 120 is low or the capacitance of the NMOS transistors Q5 to Q8 is large, the NMOS transistors Q7 and Q8 and the NMOS transistors Q5 and Q6 .

A second current detector 142 is coupled between node N2 and capacitors C3 and C4. The second current detector 142 detects the current flowing through the node N2 and blocks the overcurrent from being applied to the capacitors C3 and C4 when the current is above a predetermined level, that is, when an overcurrent is detected .

The capacitors C3 and C4 are connected between the second current detector 142 and the transformer 123. The capacitors C3 and C4 are turned on when the NMOS transistors Q5 to Q8 provided in the negative PWM wave generating section 125 are turned on or off so that the current flowing between the node N2 and the transforming section 123 Is prevented from being rapidly lowered or increased. That is, the capacitors C3 and C4 accumulate a voltage input from the NMOS transistors Q7 and Q8, and when the NMOS transistors Q7 and Q8 are turned on, the voltage output from the NMOS transistors Q7 and Q8 The capacitors C3 and C4 accumulate the voltage input from the transformer 127 and the NMOS transistors Q7 and Q8 are turned off And the NMOS transistors Q5 and Q6 are turned on so that the voltage output from the transformer 127 is applied to the NMOS transistors Q5 and Q6 while being lowered obliquely without being abruptly lowered. C4 function as a blocking capacitor.

The operation of the AC voltage converting unit 120 for converting the DC voltage into the AC voltage will be described.

The NMOS transistors Q3 and Q4 of the positive polarity PWM wave generating section 125 and the negative polarity PWM wave generating section 125 of the positive polarity PWM wave generating section 125 are supplied with the DC voltage V1 from the DC voltage providing section 110 to the AC voltage converting section 120, When the NMOS transistors Q5 and Q6 of the generator 126 are turned on, the NMOS transistors Q3 and Q4, the node N1, the transformer 123, the capacitors C3 and C4, A current path is formed through the NMOS transistor 142 and the NMOS transistors Q5 and Q6 to the ground terminal GND. Therefore, the DC voltage V1 is applied to the primary terminals 1 and 2 of the transformer 127 through the NMOS transistors Q3 and Q4 and the node N1. When the NMOS transistors Q3 and Q4 of the positive PWM wave generator 125 and the NMOS transistors Q5 and Q6 of the negative PWM wave generator 126 are turned on and turned off, The positive PWM wave b11 of the PWM wave shown in Fig. 3 (b) is generated and input to the primary terminals 1 and 2 of the inverter 127. [ As a result, the positive-polarity sine wave c11 of the sine wave shown in Fig. 3 (c) is outputted to the secondary terminals 3, 4 of the transformer 127. [

When the DC voltage V1 from the DC voltage providing unit 110 is applied to the AC voltage converting unit 120, the positive polarity PWM wave generating unit 126 and the NMOS transistors Q7 and Q8 of the positive polarity wave generating unit 126 When the NMOS transistors Q1 and Q2 of the PWM wave generating unit 125 are turned on, the NMOS transistors Q7 and Q8, the node N2, the second current detector 142, the capacitors C3 and C4, A current path is formed through the transformer 123 and the NMOS transistors Q1 and Q2 to the ground terminal GND. Therefore, the DC voltage V1 is applied to the primary terminals 2, 1 of the transformer 127 through the NMOS transistors Q7, Q8 and the node N2. When the NMOS transistors Q7 and Q8 of the negative PWM wave generating unit 126 and the NMOS transistors Q1 and Q2 of the positive PWM wave generating unit 125 are turned on and turned off, The negative PWM wave b21 of the PWM wave shown in Fig. 3 (b) is generated and input to the primary terminals 2, As a result, the negative sine wave c21 of the sinusoidal wave shown in Fig. 3 (c) is outputted to the secondary terminals 3, 4 of the transformer 127. [

Consequently, the DC voltage V1 (FIG. 3 (a)) input to the AC voltage conversion unit 120 through the above operation is converted to the AC voltage (FIG. 3 (c)). That is, the AC voltage required at the secondary side of the transformer 127, for example, 220 volts can be directly obtained.

2, the output filter unit 131 includes a plurality of coils L1 and L2, a capacitor C5 and a third current detector 143 to filter the AC voltage output from the transformer 123, do.

The plurality of coils L1 and L2 and the capacitor C5 provided in the output filter unit 131 are not necessarily limited thereto. That is, the numbers of the coils L1 and L2 and the capacitor C5 may be varied or may be configured using other elements.

The third current detector 143 is connected between the coil L2 and the capacitor C5. The third current detector 143 detects the current flowing through the coil L2 and blocks the overcurrent from being applied to the capacitor C5 when the current is higher than a predetermined level, that is, when an overcurrent is detected.

As described above, the inverter 100 according to the present invention can smoothly perform the function of converting the DC voltage to the AC voltage while the configuration is simple.

As described above, since the inverter 100 has a simple structure, the conversion efficiency is increased (about 85%), the size of the inverter 100 is reduced and the size and weight of the inverter 100 can be reduced. Cost is reduced, and repair is easy with circuit simplification.

Although the present invention has been described with reference to the embodiments shown in the drawings, it is to be understood that various modifications and equivalent embodiments may be made by those skilled in the art without departing from the scope of the present invention. Accordingly, the true scope of the present invention should be determined by the technical idea of the appended claims.

110: DC voltage supply unit 111: Initial charging unit
112: Input filter unit 120: AC voltage conversion unit
121: PWM wave generating unit 122: PWM control unit
123; Transformer 130: AC voltage filter unit
131: output filter unit 132: noise rejection unit

Claims (6)

A DC voltage supplier for filtering and outputting a DC voltage input from the outside;
An alternating-current voltage converting unit for converting the direct-current voltage output from the direct-current voltage supplier into an alternating-current voltage; And
And an AC voltage filter section for filtering the AC voltage output from the AC voltage conversion section. The apparatus as claimed in claim 1,
A PWM wave generator for receiving the DC voltage to generate a PWM wave; And
And a transformer for converting the PWM wave output from the PWM wave generator into a sine wave to output an AC voltage. 3. The method of claim 2,
Wherein the PWM wave generating unit includes a plurality of NMOS transistors for generating the PWM wave,
Wherein the AC voltage conversion unit further comprises a PWM control unit for controlling operations of the plurality of NMOS transistors. The apparatus as claimed in claim 1, wherein the AC voltage converter
Further comprising a current detector for detecting a current of the input DC voltage to block an excessive current from being applied to the AC voltage conversion unit. The apparatus as claimed in claim 2, wherein the PWM wave generating unit
A positive polarity PWM wave generating unit for generating a positive polarity PWM wave and applying it to the transforming unit; And
And a negative PWM wave generating unit for generating a negative PWM wave and applying it to the transforming unit. The apparatus as claimed in claim 2, wherein the PWM wave generating unit
Further comprising a blocking capacitor for causing the PWM wave applied to the transforming unit to rise obliquely without abruptly rising, and to cause the voltage to fall to a diagonal line without abruptly lowering.

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