KR20150041314A - Organic Electroluminescence Device and fabrication method thereof - Google Patents

Abstract

The present invention discloses an organic electroluminescent device and a method for fabricating the same. The organic electroluminescent device according to the present invention comprises a first electrode; a second electrode; a light emitting layer disposed between the first and second electrodes; a first carrier transport layer disposed between the light emitting layer and the first electrode; a second carrier transport layer disposed between the light emitting layer and the second electrode; and a high morphology layer formed of an insulating material and disposed between the light emitting layer and the first electrode. According to the present invention, since the high morphology layer is introduced, the luminance, voltage efficiency, and life cycle is improved and color interference is reduced.

Description

[0001] The present invention relates to an organic electroluminescent device and a fabrication method thereof,

The present invention relates to an organic electroluminescent device, and more particularly, to a hybrid organic electroluminescent device without a buffer layer and a method of manufacturing the same.

An organic electroluminescence device (OLED) is an element that emits light when an exciton formed by the combination of electrons injected into the light emitting layer from the electron injection electrode and the hole injection electrode and from the excitation electrode falls from the excited state to the ground state.

The organic electroluminescent device has a self-luminescent property and does not require a separate light source unlike a liquid crystal display device, thereby reducing the thickness and weight of the organic electroluminescent device. In addition, organic electroluminescent devices are considered to be the next generation display devices for mobile electronic devices because they exhibit high-quality characteristics such as low power consumption, high luminance, and high reaction speed.

1A is a plan view for explaining a general organic electroluminescent device. Specifically, it is an equivalent circuit diagram for the red (R), green (G), and blue (B) sub pixel regions.

Referring to FIG. 1A, a general organic light emitting device includes a plurality of sub pixel regions formed at intersections of a gate line GL, a data line DL, and a power source line PL.

The plurality of sub pixel regions are composed of red (R), green (G), and blue (B) sub pixel regions, and these sub pixel regions are arranged in a matrix form to display an image.

The cell driver A and the organic light emitting diode E connected to the cell driver A are formed in each of the red (R), green (G), and blue (B) sub pixel regions.

The cell driver A includes a switch thin film transistor TS connected to a gate line GL and a data line DL and a switch thin film transistor TS connected to the power line PL and the organic light emitting diode E And a storage capacitor C connected between the power supply line PL and the drain electrode of the switch thin film transistor TS.

Fig. 1B is an enlarged view of the portion A shown in Fig. 1A. Specifically, a plan view for explaining the A portion expressed by an equivalent circuit diagram.

Referring to FIG. 1B, the gate electrode 14 'of the switch thin film transistor TS is connected to the gate line GL, the source electrode 16' is connected to the data line DL, and the drain electrode 18 ' And is connected to the gate electrode 14 and the storage capacitor C of the driving thin film transistor TD.

The source electrode 16 of the driving thin film transistor TD is connected to the power supply line PL and the drain electrode 18 is connected to the first electrode 24 of the organic light emitting diode E.

The storage capacitor C includes an upper electrode 29 connected to the power supply line PL and a lower electrode 25 connected to the gate electrode 14 of the driving thin film transistor TD. The lower electrode 25 is connected to the drain electrode 18 'of the switch thin film transistor TS.

The switch thin film transistor TS is turned on when a scan pulse is supplied to the gate line GL so that a data signal supplied to the data line DL is applied to the gate electrode GL of the storage capacitor C and the drive thin film transistor TD 14). The driving thin film transistor TD controls the current supplied from the power supply line PL to the organic electroluminescent element in response to a data signal supplied to the gate electrode 14 to control the amount of light emitted from the organic electroluminescent element. Even if the switch thin film transistor TS is turned off, the driving thin film transistor TD supplies a constant current I until the data signal of the next frame is supplied by the voltage charged in the storage capacitor C Thereby allowing the organic electroluminescent device to maintain luminescence.

2 is a cross-sectional view taken along the line I-I 'of FIG. 1B. Specifically, it is a cross-sectional view in which red (R), green (G), and blue (B) sub pixel regions are cut along the line I-I '.

2, a driving thin film transistor TD is formed on a substrate 10 on which red (R), green (G) and blue (B) subpixels Pr, Pg and Pb are defined, . The driving thin film transistor TD is formed in units of sub-pixels and includes a semiconductor layer 12, a gate electrode 14, a source electrode 16, and a drain electrode 18.

A protective layer 22 is formed on the driving thin film transistor TD. A buffer pattern 28 and a bank 30 are formed on the protective layer 22 and formed on the edges of the first electrode 24 and the first electrode 24. Pb and Pr regions are divided by the buffer pattern 28 and the bank 30 and the first carrier transport layer 32 and the light emitting layer 32 are formed in the sub- (34a, 34b, 34c) and a second carrier transport layer (36) are formed in this order. A second electrode 38 is formed on the upper surface of the second carrier transfer layer 36 and the bank 30.

When the first electrode 24 is an anode and the second electrode 38 is a cathode, the first carrier transport layer 32 is a hole transport layer, and the second carrier transport layer 32 is a hole transport layer. (36) is made of an electron transport layer (Electron-Transport Layer).

When the recombination ratio of the hole and the electron pair in the light emitting layers 34a, 34b, and 34c is increased, the electric charge contributing to light emission is increased and the efficiency is increased. Therefore, in order to increase the recombination ratio in the light emitting layers 34a, 34b and 34c, not only the light emitting layers 34a, 34b and 34c but also various layers such as a charge injection layer, a transport layer and a barrier layer are used, Layer structure using eight or more layers in the device.

However, such an organic electroluminescent device having such a multi-layer structure is difficult to manufacture and thus the productivity is greatly reduced. In order to increase the production efficiency, a hybrid organic electroluminescent device using a solution method and a deposition method has been developed.

In such a hybrid organic electroluminescent device structure, a buffer layer connecting the solution layer and the deposition layer is used. These buffer layers must be both polar and have good electron mobility and hole mobility. However, until now, it has been difficult to develop materials satisfying all of these properties.

One object of the present invention is to provide a hybrid type organic electroluminescent device having improved luminous efficiency and lifetime through introduction of a polymer layer of high morphology and removal of a buffer layer, and a method of manufacturing the same.

According to an aspect of the present invention, there is provided an organic electroluminescent device. The organic electroluminescent device includes a first electrode, a second electrode, a light emitting layer disposed between the first and second electrodes, a first carrier transporting layer disposed between the light emitting layer and the first electrode, and a light emitting layer between the light emitting layer and the second electrode. And a high-morphology layer made of an insulating material between the light-emitting layer and the first carrier-transporting layer. The organic light-

According to another aspect of the present invention, there is provided a method of manufacturing an organic electroluminescent device. The method of fabricating an organic electroluminescent device includes forming a thin film transistor on a substrate, forming a protective film and a planarization film covering the thin film transistor, forming a first electrode on the planarization film, Forming a high-morphology layer of an insulating material on the first carrier-transporting layer, forming a light-emitting layer on the high-morphology layer, forming a second carrier- And forming a second electrode on the second carrier transporting layer. The method of manufacturing a hybrid organic electroluminescent device according to claim 1,

The present invention can improve the light emitting efficiency and lifetime of the hybrid organic electroluminescent device by improving the interface characteristics between the solution layer and the deposition layer.

Further, the present invention can improve the color interference phenomenon of the hybrid organic electroluminescent device without using the buffer layer.

1A is a plan view for explaining a general organic electroluminescent device.
Fig. 1B is an enlarged view of the portion A shown in Fig. 1A.
2 is a cross-sectional view taken along the line I-I 'of FIG. 1B.
3A and 3B are cross-sectional views illustrating an organic electroluminescent device according to an embodiment of the present invention.
4 is a diagram illustrating a band diagram for explaining an emission principle of an organic electroluminescent device according to an embodiment of the present invention.
5A to 5C are cross-sectional views for explaining a method of manufacturing an organic electroluminescent device according to an embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings showing an organic electroluminescent device and a method of manufacturing the same. The following embodiments are provided by way of example so that those skilled in the art can fully understand the spirit of the present invention. Therefore, the present invention is not limited to the embodiments described below, but may be embodied in other forms. In the drawings, the size and thickness of an apparatus may be exaggerated for convenience. Like reference numerals designate like elements throughout the specification.

3A and 3B are cross-sectional views illustrating an organic electroluminescent device according to an embodiment of the present invention.

3A and 3B, an organic electroluminescent device according to an embodiment of the present invention includes a TFT substrate having red (R), green (G), and blue (B) sub-pixel regions (Pr, Pg, Pb) And an organic light emitting diode E formed on the TFT substrate 200 and including a first electrode 231, a light emitting layer 233 and a second electrode 243.

The first and second light emitting layers 233a and 233b of the light emitting layer 233 are formed on the same layer. At this time, the first emission layer 233a is formed in a red (R) sub-pixel Pr region and the second emission layer 233b is formed in a green (G) sub-pixel Pg region. The third light emitting layer 233c of the light emitting layer 233 is formed on the first and second light emitting layers 233a and 233b. The third emission layer 233c is formed over the red (R), green (G), and blue (B) sub-pixels Pr, Pg, and Pb. That is, the third light emitting layer 233c is formed over all the pixels.

The first and second light emitting layers 233a and 233b of the light emitting layer 233 are major elements. That is, the electron mobility is faster than the hole mobility.

A first carrier transport layer 232 is further formed between the emission layer 233 and the first electrode 231 and a second carrier transport layer 246 is formed between the emission layer 233 and the second electrode 243. [ ) Are further formed.

When the first electrode 231 is an anode and the second electrode 243 is a cathode, the first carrier transport layer 232 includes a hole transporting layer (HTL). In some cases, a hole injection layer (HIL) may be further formed below the hole transporting layer (HTL). The first carrier transport layer 232 may be formed as a single layer including a hole transporting material and a hole injecting material, or may be formed of a plurality of layers. In any case, the first carrier transport layer 232 is a layer that performs hole transport from the first electrode 231 to the light emitting layer 233. The second carrier transport layer 246 may include an electron transport layer (ETL), and may further include an electron injection layer (EIL).

The first carrier transport layer 232 and the first and second emission layers 233a and 233b are formed by a solution process and the second carrier transport layer 246 and the third emission layer 233c are formed by a deposition process do.

A high morphology layer 250 is further formed between the light emitting layer 233 and the first carrier transport layer 232. Specifically, the high morphology layer 250 is made of an insulating material, and thus has a wide band gap energy.

The thickness of the high morphology layer 250 is such that tunneling injection is possible. In general, tunneling is known to be possible at thicknesses less than 30 ANGSTROM. However, if the thickness is too thin, a region where the film is not formed is formed. Therefore, it is preferable that the thickness is 1 ANGSTROM or more for uniform film formation.

The high morphology layer 250 may be a thin film layer composed of a polymeric compound, for example, poly (methylmethacrylate) (PMMA). However, it is not limited thereto, and it may be another organic or inorganic compound.

The high morphology layer 250 may be formed by a vacuum deposition method or a solution coating method. Examples of the solution coating method include a spin coating method, a dip coating method, an ink jet prining method, and a slit coating method.

Also, the high morphology layer 250 may be mixed with a hole transporting layer (HTL) of the one carrier transport layer 232.

Referring to FIG. 3B, the TFT substrate 200 includes a driving thin film transistor (TD) formed on a substrate 201. The organic electroluminescent device further includes a switch thin film transistor TS connected to the gate line GL and the data line DL although not shown.

The driving thin film transistor TD includes an active layer 210, a source electrode 219a, a drain electrode 219b, and a gate electrode 215 formed on a buffer layer 202 on a substrate 201.

The active layer 210 is divided into a source region 213 and a drain region 211 and a channel region 212 connecting the source region 213 and the drain region 211. On the active layer 210, a gate insulating layer 214 is formed on the entire surface of the substrate 200. A gate electrode 215 is formed at a position corresponding to the channel region 212 of the active layer 210 on the gate insulating layer 214. First and second interlayer insulating films 216 and 217 are formed on the upper surface of the gate electrode 215. The first interlayer insulating film 216 may be silicon oxide (SiO 2), and the second interlayer insulating film 217 may be silicon nitride (SiN x).

First and second contact holes 218a and 218b are formed in the gate insulating film 214 and the first and second interlayer insulating films 216 and 217, respectively. The source region 213 of the active layer 210 is exposed through the first contact hole 218a and the drain region 211 of the active layer 210 is exposed through the second contact hole 218b. A source electrode 219a and a drain electrode 219b are electrically connected to the exposed source region 213 and the drain region 211, respectively.

The source electrode 219a is connected to a power supply line PL. The power supply line PL controls the current flowing to the first electrode 231 of the organic light emitting diode E through the driving thin film transistor TD and supplies the power supply voltage Vdd to each of the plurality of pixels in common .

As described above, the coplanar structure of the driving thin film transistor TD has been described. However, the present invention is not limited thereto. For example, all the known thin film transistors may have an inverted coplanar structure, A staggered structure, an inverted staggered structure and its equivalent structure are all possible.

A protective film 220 and a planarization film 221 are sequentially formed on the upper surface of the driving thin film transistor TD. Thus, the TFT substrate 200 is completed.

An organic light emitting diode E including a first electrode 231, a light emitting layer 233, and a second electrode 243 is formed on the planarization film 221 of the TFT substrate 200.

The light emitting direction of the organic light emitting diode E is defined by one of the first electrode 231 and the second electrode 243 being a transparent electrode and the other side being a reflective electrode. For example, when the first electrode 231 is a transparent electrode such as ITO (Indium Tin Oxide) or the like, and the second electrode 243 is a reflective metal such as Al, lower light emission is performed.

On the contrary, when the first electrode 231 is made of a laminate containing a reflective metal of Ag / ITO and the second electrode 243 is made of Mg: Ag of 20 nm or less, top emission can be achieved.

Although not shown, a bank may be further formed between the first carrier transport layers 232 as occasion demands. These banks may also be formed between the first and second light emitting layers 233a and 233b.

4 is a diagram illustrating a band diagram for explaining an emission principle of an organic electroluminescent device according to an embodiment of the present invention.

4, the organic electroluminescent device according to an embodiment of the present invention includes a first electrode 231 and a second electrode 243 and a first carrier transport layer 232 interposed therebetween, A light emitting layer 233, and an organic light emitting diode E including a second carrier transport layer 246.

When the first electrode 231 is an anode and the second electrode 243 is a cathode, the first carrier transport layer 232 includes a hole transporting layer (HTL) The transport layer 246 includes an electron transporting layer (ETL). In order to more efficiently inject holes and electrons, a hole injection layer (HIL) and an electron transport layer (ETL) positioned between the first electrode 231 and the hole transport layer (HTL) And an electron injection layer (EIL) positioned between the first electrode layer 243 and the second electrode layer 243.

When a voltage is applied between the first electrode 231 and the second electrode 243, electrons generated from the second electrode 243 pass through the EIL and the ETL to the light emitting layer 233 And the holes generated from the first electrode 231 move to the light emitting layer 233 through the hole injection layer (HIL) and the hole transport layer (HTL). Accordingly, in the light emitting layer 233, the supplied electrons and holes collide with each other and recombine to form an exciton. And the excitons emit light when the excitons fall from the excited state to the ground state.

The first and second light emitting layers 233a and 233b of the light emitting layer 233 are major elements. Therefore, the recombination occurs due to the bias of the hole transport layer (HTL).

A high morphology layer 250 is further formed between the light emitting layer 233 and the first carrier transport layer 232 of the present invention. The high morphology layer 250 is made of an insulating material. The principle is that the insulating material does not participate in the transport of holes and electrons. However, the high morphology layer 250 of the present invention is formed into a thin film, and tunneling phenomenon occurs. Therefore, the tunneling phenomenon is involved in the transport of holes and electrons. Specifically, when a specific voltage is applied, a tunneling phenomenon occurs at a certain point of time when electric charges accumulate. Because of this phenomenon, bright brightness can be obtained at once.

The present invention includes such a high morphology layer 250 so that a buffer layer may not be formed between the first and second light emitting layers 233a and 233b and the third light emitting layer 233c. Here, the buffer layer refers to a layer that transmits electrons to the first and second light emitting layers 233a and 233b and transmits holes to the third light emitting layer 233c. However, if such a buffer layer can not smoothly perform electron and hole injection, recombination occurs in the buffer layer instead of the light emitting layer. This causes a color interference phenomenon. Therefore, the present invention can prevent the color interference phenomenon due to the presence of the buffer layer by omitting the buffer layer formation.

Further, since the present invention includes the high morphology layer 250, the interface characteristic between the first carrier transporting layer 232 formed by the solution process and the third light emitting layer 233c formed by the deposition process without the buffer layer Can be improved.

Specifically, in the case of the first carrier transporting layer 232 formed by a solution process, the surface condition may become rough while the solvent evaporates during the post-deposition baking process. The trapping phenomenon of trapping charges on these rough parts increases the required voltage. However, when the high morphology layer 250 is formed on the first carrier transport layer 232 formed by the solution process, the roughness of the surface is improved. Therefore, the voltage efficiency is improved.

The present invention also includes the high morphology layer 250 so that the light emitting layer is formed at the interface between the first carrier transport layer 232 formed by the solution process and the third light emitting layer 233c formed by the deposition process . Therefore, a reduction in the lifetime due to the formation of the light emitting layer at the interface can also be improved.

As a result, the high-morphology layer 250 of the present invention can improve luminance, voltage efficiency, lifetime, and reduce the color interference effect.

In the illustrated example, the first to third light emitting layers 233a, 233b, and 233c are red (R), green (G), and blue (B) light emitting layers, respectively. The first and second light emitting layers 233a and 233b are formed in the red (R) and green (G) sub-pixels Pr and Pg, respectively, and the third light emitting layer 233c is formed . However, the organic electroluminescent device of the present invention is not limited to such a color combination, but may be changed to other combinations of colors as long as white can be realized by mixing colors of the respective light emitting layers. For example, the third light emitting layer 233c may be a blue (B) light emitting layer, and the first and second light emitting layers 233a and 233b may be yellow (Y) and green (G) light emitting layers, respectively.

5A to 5C are cross-sectional views for explaining a method of manufacturing an organic electroluminescent device according to an embodiment of the present invention.

5A, a method of fabricating an organic electroluminescent device according to an embodiment of the present invention includes forming a buffer layer 202 on a substrate 201, forming an active layer 210 on the buffer layer 202, .

A gate insulating layer 214 is formed on the substrate 201 on which the active layer 210 is formed. Then, a gate electrode 215 is formed at a position corresponding to the center of the active layer 210.

Thereafter, ion implantation with an appropriate dose amount is performed on the substrate 201 to perform n + or p + doping. The ion implantation may include forming a low concentration region using the gate electrode 215 as a mask, forming a high concentration region using a photoresist pattern exposing a portion to be the source and drain regions 213 and 211 as a mask . The low concentration region (not shown) serves to reduce the off current of the driving thin film transistor TD, and the high concentration region becomes the source and drain regions 213 and 211. The portion where the ion implantation is blocked by the gate electrode 215 becomes the channel region 212. On the other hand, when forming the heavily doped region, the gate electrode 215 may be used as a mask without using a photoresist pattern as a mask.

Then, first and second interlayer insulating films 216 and 217 are formed on the gate electrode 215. First and second contact holes 218a and 218b are also formed to expose the source and drain regions 213 and 211 of the active layer 210 when the second interlayer insulating layer 217 is formed.

A source electrode 219a and a drain electrode 219b connected to the source region 213 and the drain region 211 exposed through the first and second contact holes 218a and 218b are formed. At this time, the source and drain electrodes 219a and 219b are spaced apart from each other with the gate electrode 215 therebetween. Through the above process, the driving thin film transistor TD is completed.

A passivation layer 220 and a planarization layer 221 are formed on the source electrode 219a and the drain electrode 219b.

Referring to FIG. 5B, a first electrode 231 is formed on the planarization film 221 for each pixel. The first electrode 231 is connected to the drain electrode 219b through a drain contact hole 230. [

Then, the first carrier transport layer 232 is formed by coating the first electrode 231 with a hole injection property and / or a hole transport property low molecular weight or polymer material by a solution process. At this time, a hole injection layer (HIL) and a hole transporting layer (HTL) may be separately formed. Also, as shown in the figure, the first electrode 231 may be formed of one layer including a hole transporting material and a hole injecting material.

A high morphology layer 250 is formed on top of the first carrier transport layer 232. The high morphology layer 250 is formed by a vacuum evaporation method or a solution coating method. Examples of the solution coating method include spin coating, dip coating, inkjet printing, slit coating and the like.

Next, first and second light emitting layers 233a and 233b are formed on the high morphology layer 250 through a solution process. The first emission layer 233a is formed in a red (R) sub-pixel Pr region and the second emission layer 233b is formed in a green (G) sub-pixel Pg region.

As described above, the first and second light emitting layers 233a and 233b are divided into different color pixels. Specifically, it is formed by selectively coating a material capable of solving a low-molecular or high-molecular material on the high-morphology layer 250. Here, the first and second light emitting layers 233a and 233b may be a fluorescent light emitting material or a phosphorescent light emitting material, respectively. Theoretically, the phosphorescence emission has an efficiency of about three times as much as that of fluorescent emission, but the material can be selected in consideration of the degree of color mixing with other light emission layers and the lifetime.

Such a solution process may be, for example, any one of inkjet printing, nozzle printing, transferring process, and thermal jet printing. This solution process can be done on a substrate without a separate mask or chamber.

Next, referring to FIG. 5C, a blue light emitting layer 233c and a second carrier transporting layer 246 are sequentially formed through a deposition process. The blue light emitting layer 233c and the second carrier transport layer 246 are formed as a whole between the first and second electrodes 231 and 243 without any region. These layers are formed by a vacuum deposition method without a mask. Then, the second electrode 243 is formed by sputtering or the like.

Thus, the organic light emitting diode E including the first electrode 231, the light emitting layer 233, and the second electrode 243 is completed.

Only the blue light emitting layer 233c of the light emitting layer 233 is formed by a vapor deposition method because the material of the blue light emitting layer 233c known so far does not exhibit sufficient efficiency compared with other light emitting layers when formed by a solution process, This is because it falls.

Next, an encapsulating layer (not shown) and a front film (not shown) for preventing penetration of moisture or oxygen are sequentially formed on the organic electroluminescent diode E.

As described above, the method for manufacturing an organic electroluminescent device of the present invention is a hybrid method in which a soluble process method and an evaporation method are combined. And a high morphology layer 250 is provided between the light emitting layer 233 and the first carrier transporting layer 232, luminance, voltage efficiency, lifetime, and color interference effect can be reduced.

The foregoing description is merely illustrative of the present invention, and various modifications may be made by those skilled in the art without departing from the spirit of the present invention. Accordingly, the embodiments disclosed in the specification of the present invention are not intended to limit the present invention. The scope of the present invention should be construed according to the following claims, and all the techniques within the scope of equivalents should be construed as being included in the scope of the present invention.

200: TFT substrate
232: first carrier transport layer 246: second carrier transport layer
233: light emitting layer
231: first electrode 243: second electrode
250: high morphology layer

Claims (10)

A first electrode;
A second electrode;
A light emitting layer positioned between the first and second electrodes;
A first carrier transporting layer disposed between the light emitting layer and the first electrode; And
And a second carrier transporting layer disposed between the light emitting layer and the second electrode, and a high-morphology layer made of an insulating material between the light emitting layer and the first carrier transporting layer. .
The method according to claim 1,
Wherein the light emitting layer comprises red, green and blue light emitting layers, and the red and green light emitting layers have electron mobility faster than hole mobility.
The method according to claim 1,
Wherein the thickness of the high-morphology layer is a thickness capable of tunneling injection.
The method of claim 3,
Wherein the high-morphology layer has a thickness of 1 nm or more and 20 nm or less.
The method according to claim 1,
Wherein the high-morphology layer is mixed with a hole-transporting layer.
Forming a thin film transistor on a substrate;
Forming a protective film and a planarizing film covering the thin film transistor;
Forming a first electrode on the planarization layer;
Forming a first carrier transport layer on the first electrode;
Forming a high-morphology layer of an insulating material on the first carrier transport layer;
Forming a light emitting layer on the high-morphology layer;
Forming a second carrier transport layer on the light emitting layer;
And forming a second electrode on the second carrier transport layer. ≪ RTI ID = 0.0 > 21. < / RTI >
The method according to claim 6,
Wherein the light emitting layer comprises red and green light emitting layers formed on the same layer, and a blue light emitting layer formed on the red and green light emitting layers, the red and green light emitting layers being formed in a red sub pixel region and a green sub pixel region, Wherein the organic light emitting layer is formed in the entire pixel region.
8. The method of claim 7,
Wherein the green and red light emitting layers are formed by a solution process, and the blue light emitting layer is formed by a deposition process.
The method according to claim 6,
Wherein the hybrid polymer layer is formed by a vacuum deposition method or a solution coating method, and the solution coating method is any one of a spin coating method, a dip coating method, an ink jet prining method and a slit coating method. Gt;
The method according to claim 6,
Wherein the hybrid polymer layer is formed to have a thickness capable of tunneling injection.

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