KR20150020140A - Hydrophobic bank - Google Patents

Abstract

A method of manufacturing an electronic device having an electrical insulation bank structure with a sidewall defining a well comprises: forming a bank structure such that the sidewall includes a first slope extending from a surface layer region and a second slope extending from the first slope, wherein the sidewall has a surface energy discontinuity at one spot on the second slope spaced apart from the first slope; forming a layer structure having at least one layer including an organic semiconductor material by depositing a solution of the material inside the well, wherein the deposited solution soaks into the first and second slopes from the surface energy discontinuity point to a pinning point; and drying the deposited solution.

Description

Hydrophobic bank {HYDROPHOBIC BANK}

The present invention generally relates to an electronic device comprising a surface layer and a substrate having a well defined bank structure on the surface layer and a method of manufacturing an electronic device comprising a surface layer and a substrate having a well defined bank structure in the surface layer will be.

BACKGROUND OF THE INVENTION [0002] Methods of manufacturing electronic devices, including processes for depositing active components from solutions (solution processing) have been extensively studied. If the active ingredient is deposited from solution, it is preferred that the active ingredient be contained within a desired area of the substrate. This can be achieved by providing a substrate comprising a patterned bank layer defining a well from which the active component can be deposited from solution. The well contains the solution while the solution is being dried so that the active ingredient remains in the area of the substrate defined by the well.

This method has been found to be particularly useful for the deposition of organic materials from solutions. The organic material can be conductive, semiconducting, and / or photo-electronically active such that they can emit light when an electric current passes through them, or detect light by generating a current when the light impinges on them . Devices that utilize such materials are known as organic electronic devices. If the organic material is a light-emissive material, the device is known as an organic light-emissive device (OLED). In addition, the solution process enables the manufacture of thin film transistors (TFTs) and especially organic thin film transistors (OTFTs) at low cost and low temperature. In such an apparatus, it is particularly desirable to include an organic semiconductor (OSC) in the correct area and especially in the channel of the device, and a bank may be provided to define the well to include the OSC.

Some devices may require more than one solution deposition layer. A typical OLED, such as that used in a display, can have two organic semiconductor material layers, one layer being a layer of a light emitting material such as a light-emitting polymer (LEP) and the other being a polythiophene derivative or a layer of a hole transporting material such as a polythiophene derivative or a polyaniline derivative.

Advantageously, the simple bank structure has a single material / layer configured to sequentially contain all such deposited fluids. However, when the device has a single bank material and a single pinning point for all deposited fluids, an electrical leakage path or short circuit between the electrodes on either side of the solution deposited layer There is a risk of. For example, in an OLED structure comprising an anode-HIL-IL-EL-cathode structure, the leakage current may flow between the anode and the cathode through a leakage path at the boundary of the HIL. Similarly, the leakage path may be caused by a hole injection layer (HIL) on the bank, a very thin device stack on the bank, or a cathode in direct contact with a point contact at the pinning point. The JV (current density-voltage) curve of a fully printed device may show high leakage (high current), for example, when it is reversely driven and / or after it is turned on. When the intermediate layer (interlayer IL) and the electroluminescent layer (EL) are spun, the HIL is completely covered by the spin-formed film on the upper layer, resulting in much lower leakage. This results in much lower efficiency.

Current low leakage devices generally require a dual bank system to separate the anode pinning point from the cathode. However, a single bank is less complex than a dual bank architecture. Additionally or alternatively, a single bank patterned using photolithography can provide an inexpensive method of defining pixels (banks). However, such a bank may require a single fluid pinning point to expose the anode region to hydro-carbons (residual resist) and / or to all solution treated layers (HIL, IL and EL) . The addition of a short path length between the anode (ITP) surface and the matching pinning point of the HIL-IL-EL-cathode in a highly conductive HIL resulted in a high leakage device.

Similarly, a light emitting device having a bank structure may have poor color uniformity of color and / or luminous efficiency throughout the active region.

Thus, it is desirable to provide an improved structure that allows multiple fluids to be contained in the well and / or to provide a process for manufacturing such a structure. The improved structure is, among other things, improved color uniformity across the device, lower and / or adjustable electrical leakage, overall increased power efficiency and / or uniformity of efficiency throughout the active area of the device, (E. G., More stable and / or more repeatable device luminance, preferably in a life test), smaller devices, and / or reduced structural complexity and / or less (Some of which may benefit from improved time or cost efficiency of device manufacturing, improved device yield, repeatability, e.g., cost savings) To the reduced requirement of the amount and / or number of composition materials that can be brought to bear).

For use in understanding the present invention, the following references are cited.

US 8,063,551 (DuPont); US2006 / 197086 (Samsung Electronics Co., Ltd.) US2010 / 271353 (Sony Corporation); WO2009042792 (inventor Tsai Yaw-Ming A et al.); US2007 / 085475 (Semiconductor Energy Lab); US7799407 (Seiko Epson Corporation); US7604864 (Dainippon Screen MFG); WO9948339 (Seiko Epson Corporation); JP2007095425A (Seiko Epson Corporation); WO 2009/077738 (PCT / GB2008 / 004135, published June 25, 2009, inventors Burroughes and Dowling; and WO2011 / 070316 A2 (PCT / GB2010 / 002235, published June 16, 2011, inventors Crankshaw and Dowling).

According to a first aspect of the present invention there is provided a method of fabricating an electronic device comprising a substrate having a well defined bank structure on a surface layer and a surface layer, the bank structure comprising a side wall Wherein the surface layer region comprises a first electrode and the apparatus further comprises a second electrode and a semiconductive material disposed between the first electrode and the second electrode, Forming a bank structure having a sidewall including a first slope extending from a surface layer zone and a second slope extending from the first slope, the second slope being steeper than the first slope, Having a surface energy discontinuity at a point on a second slope spaced from the first electrode and a layer structure having at least one layer, Wherein the step of forming a layer structure comprises depositing an organic solution on the surface layer zone and on the first and second slopes of the sidewall to form a solution processable forming a solution processable layer on the substrate; depositing the organic solution on the first and second slopes to a pinning point in a surface energy discontinuity; and drying the deposited organic solution.

Therefore, the embodiment provides at least one solution processable layer (preferably a plurality of pins are pinned at the same point), so that the pinning point is shifted by a path deviating from the straight line, . This can reduce the risk of electrical leakage paths or short circuits between the anodes, e.g., the anode and either anode of the solution deposited layer (s). For example, in an OLED structure comprising an anode HIL-IL-EL-cathode structure, all leakage paths between the anode and the cathode are formed long along the boundary of the preferably highly resistive HIL. The elongated path preferably has a sufficiently high resistivity to prevent leakage which would otherwise considerably reduce efficiency, reliability and / or lifetime, color change, and the like.

More specifically, in view of the resulting device structure, a surface energy discontinuity is preferably generated by the process step (s) resulting in a boundary between a wet (e.g. hydrophilic) zone and a non-wet (e.g. hydrophobic) . Such a boundary preferably exists at the top of the second slope. The top of the second slope is preferably adjacent to a relatively flat surface of the bank structure - the flat surface facing and parallel to the surface layer. In any case, the surface energy discontinuity is preferably far from the first slope and thus far from the surface layer zone.

The method comprises the steps of depositing at least one further solution, for example an EL (light emitting layer) and / or an IL (interlayer) on the solution processable layer, wherein at least one further solution is wetted to the pinning point, And drying at least one further solution deposited. Thus, many such solution processable layers may have the same pinning point.

A method may also be provided, wherein forming the bank structure in the method comprises forming a first bank layer comprising a photoresist on the surface layer of the substrate, photo-patterning and developing the first bank layer Depositing a fluorinated photoresist solution over the exposed areas of the first bank layer and the surface layer to form a second bank layer; The fluorine containing compounds of the fluorinated photoresist solution move to the surface of the second bank layer during baking to increase the contact angle with the surface of the organic solution - The bank layer is photo-patterned and developed to re-expose the area of the surface layer and expose the area of the first bank layer so that the first bank layer area has a first slope The second bank layer having a second slope, wherein the increased contact angle is greater than the contact angle of the organic solution having the first and second slopes, and the pinning point comprises a second bank having a shifted fluorine- It is at the boundary of the layer surface. The surface on which the compound migrates during baking can generally be described as the 'free surface', ie, the interface with the external environment, eg air. As in all embodiments employing such fluorinated photoresists, the photoresist may be fluorinated and supplied from the photoresist manufacturer, or the process may have an additional step of adding the fluorine containing compound to the non-fluorinated photoresist . In any case, after the second bank layer is cured, the second bank layer preferably comprises a higher concentration of the fluorine-containing compound than the first bank layer. Also, after the second bank layer is developed to remove a portion of the second bank layer, the previously ' free surface ' portion is preferably the edge-edge of the second bank layer is part of the side wall, Non-wetting boundary. Thus, the pinning point may be created in addition to the sidewall having the double slope.

A method may also be provided wherein forming the bank structure in the method comprises forming a bank structure layer by depositing a fluorinated photoresist solution on the surface layer and drying the deposited solution to cure the bank structure layer The fluorine-containing compound of the fluorinated photoresist solution migrates to the surface of the bank structure layer during baking to increase the contact angle with the surface of the organic solution; and depositing and drying the photoresist layer on the bank structure layer, Photo-patterning and developing the photoresist layer; and etching the bank structure layer through the developed photoresist layer to expose the surface layer region so that the etched bank structure layer has sidewalls surrounding the exposed surface layer regions Dry etching so as to have first and second slopes, removing the developed photoresist layer to form a bank structure layer Wherein the exposed surface comprises the transferred fluorine containing compound and the surface energy discontinuity is present at the interface between the exposed surface comprising the transferred fluorine containing compound and the etched sidewall, do. The dry etching step may preferably comprise reactive ion etching using an oxygen plasma. Similar to the foregoing, the portion that was previously the ' free surface ' of the bank layer is preferably a wet / non-wetted boundary exposed to the edge of the bank layer, such edge being part of the side wall, . Thus, the pinning point may be created in addition to the sidewall having the double slope.

A method may also be provided wherein forming the bank structure in the method comprises developing and photo-patterning the bank structure layer to expose a surface layer region surrounded by a sidewall of the bank structure layer, Depositing the layer on the bank structure layer includes depositing a photoresist solution on the photo-patterned bank structure layer, wherein developing the photoresist layer includes re-exposing the surface layer region And the dry etching step exposing the surface layer zone comprises forming the first and second slopes by thinning the bank structure layer to extend the exposed areas.

A method may also be provided wherein the step of photo-patterning the photoresist layer in the method comprises the steps of: providing a substantially non-transmissive region, a partially transmissive region, Irradiating the photoresist layer through a mask having a substantially fully transmissive region (having a higher transmittance), wherein developing the photoresist layer comprises removing the photoresist region completely and partially And partially removing the photoresist zone exposed to the radiation through the permeation zone.

A method may also be further provided wherein forming the bank structure comprises forming a bank layer by depositing a fluorinated photoresist solution on the surface layer and baking and curing the bank layer, The phosphorous compound moves to the surface of the bank layer during baking to increase the contact angle with the surface of the organic solution - and photo-patterning the cured bank layer - the photo-patterning step comprises a first dose of radiation dose ) And irradiating a second region of the bank layer with a second irradiation dose, wherein the second irradiation dose is less than the first irradiation dose - and the step of developing the bank layer Exposing a region of the surface layer and partially removing a region of the bank layer irradiated with the second irradiation dose, And a sidewall having a second slope, wherein the pinning point is at a boundary between the bank layer surface having the transferred fluorine-containing compound and the sidewall. The first zone may be above the surface zone or above the portion of the bank structure to be held, depending on whether a negative or positive photoresist is used. The partial removal preferably reduces the area of the bank layer extending into the area of the surface layer and provides a longer path length shelf structure along the sidewalls and thus along the edge of the solution processable layer which will eventually be deposited in the well.

A method may also be provided wherein photo-patterning in the method comprises concurrently irradiating the bank layer through a first mask and a second mask, wherein the step of irradiating the first region with a first irradiation dose comprises Irradiating the first zone with a first irradiation dose through a complete transmission zone of the first and second masks and irradiating the second zone with a second irradiation dose comprises irradiating the second zone with at least a partial transmission zone of each of the first and second masks, Lt; / RTI > At least the partially transmissive region may comprise the complete transmissive region of the first mask and / or the partially transmissive region of the second mask. At least one of these zones is preferably a partially transmissive zone having a transmission gradient.

A method may also be provided wherein photo-patterning in the method comprises irradiating the bank layer through a mask having a partially transmissive region and a more (preferably, complete) transmissive region, The step of irradiating with the first irradiation dose comprises irradiating the first zone through the more transmissive area and the step of irradiating the second zone with the second irradiation dose comprises the step of irradiating the second zone through the partial transmission area .

A method may also be provided, the method comprising depositing a reflector layer on a region of a surface layer, wherein depositing a fluorinated photoresist solution comprises depositing a fluorinated solution onto the reflector layer and onto the surface layer And photo-patterning comprises irradiating the bank layer through a mask, the step of irradiating the first zone comprises the steps of absorbing a portion of the first irradiated dose directly received through the mask, And a first zone for absorbing some of the radiation dose reflected back to the first zone by the reflector layer.

A method may also be provided wherein the electronic device is a device such as an optoelectronic device such as a light emitting device or a light absorbing device, preferably a photovoltaic device (OPV, e.g. solar cell) Light emitting devices such as light absorbing devices or organic light emitting diodes (OLEDs). Alternatively, the device may be a thin film transistor.

A method may also be further provided, wherein the electronic device is an organic light emitting diode and the organic solution is a solution for providing a hole injection layer (HIL). Further, at least one other solution processable layer may be formed on the solution processable layer and between the first electrode and the second electrode, and another solution processable layer (s) may be formed on the interlayer (IL) And / or a light emissive layer (EL).

A method may also be provided wherein the contact angle when the organic solution is deposited on at least one of the first slope and the second slope region extending from the first slope to the pinning point is 10 DEG or less. Such a contact angle generally provides good surface wetting.

A method may also be provided wherein the contact angle when the organic solution is deposited on the area of the bank structure extending from the first slope and extending from the pinning point in the method is preferably 50 DEG or more. Such contact angle generally does not favor good wetting of the surface, i. E., Makes it non-wetting.

According to a second aspect of the present invention, an electronic device-bank structure comprising a surface layer and a substrate having a well-defined bank structure on the surface layer has a sidewall having an electrically insulating material and surrounding a region of the surface layer Wherein the surface layer region comprises a first electrode, wherein the device further comprises a second electrode and a semiconductive material disposed between the first electrode and the second electrode, A first slope extending from the surface layer zone and a second slope extending from the first slope, the second slope being steeper than the first slope, the apparatus comprising a layer structure having at least one layer, wherein at least one Wherein the layer is a solution processable layer, the layer structure has a semiconducting material and is disposed between the first electrode and the second electrode, Pro has a second pinning points (pinning point) at a point on the slope spaced apart from, and is solution processable layer is deposited on the first and second slopes of the side walls and on the surface layer section.

Therefore, similar to the first embodiment, the embodiment can provide a pinning point for the solution processable layer (s), which deviates from a straight line because it has a different slope along its entire length. This again can reduce the risk of electrical leakage paths or short circuits between the anode and cathode of either of the electrodes, e.g., the solution deposited layer (s). For example, preferably all the leakage paths between the anode and the cathode along the boundary of the highly resistive HIL of the OLED are lengthened so as to have a sufficiently high resistivity, so that, for example, efficiency, reliability and / , Leakage that can significantly degrade color change, and the like.

More particularly, in view of the device structure, it is noted that the surface layer may include one of the electrodes (e.g., an anode) and / or a partially reflective layer. In the case of a bottom emission device embodiment, a surface layer (e.g., a tin oxide such as indium tin oxide (ITO)) and a substrate (e.g., glass) are preferably at least partially It is transparent. The individual sub-layers of the surface layer, for example, the silver layer, may be a light cavity or a micro-cavity, which may have a dimension small enough to allow an observable quantum effect that leads to a narrow emission spectrum from the light- Described partial reflective layer that can be configured to form a partially reflective layer. For example, in a device including a reflective layer such as silver, the fabrication of the device may include a blanket (alloy) deposition step, a blanket ITO deposition step, a step of patterning ITO to form at least one electrode , Spin forming the bank, and then patterning the bank. Alternatively, the electrode layer of the surface layer may also function as a partially reflective layer.

An electronic device may also be provided, wherein the contact angle of the solution for forming the solution processable layer disposed on the surface layer zone in the electronic device is such that the solution reaches the second slope and the second 10 DEG or less when deposited on at least one of the zones of the slope. Additionally or alternatively, the contact angle of the solution for forming the solution processable layer disposed on the surface layer zone is such that when solution is deposited on the surface area of the bank structure extending from the first slope away from the pinning point , 50 ° or more. Thus, such a solution may have a contact angle of 10 DEG or less and 50 DEG or more.

An electronic device may also be provided, wherein the bank structure in the electronic device comprises at least one photoresist layer.

An electronic device may also be provided, wherein the photoresist layer in the electronic device has a point on the second slope and comprises a fluorine-containing compound.

An electronic device may also be provided, wherein the bank structure in the electronic device comprises a plurality of photoresist layers and the photoresist layer has a first slope.

Electronic devices may also be further provided, wherein the bank structure includes a fluorine-containing compound and a photoresist layer having first and second slopes.

An electronic device may also be provided, wherein the first slope in the electronic device has a slope angle less than or equal to 20 degrees relative to the surface layer, more preferably less than 5, 10 or 15 degrees. Such an angle may be an average along the first slope and / or where the first slope meets the surface layer.

An electronic device may also be provided, wherein the first slope in the electronic device has a bank structure thickness (the thickness is a height difference relative to the surface layer) less than 300 nm, preferably less than 200 nm at the interface with the second slope, And preferably the slope of at least one of the first and second slopes extends along a bank structure thickness of 100 nm to 150 nm (so that the height traversed by the first and / or second slope is preferably 100 And the plurality of layers form a bank structure and each have a slope, at least one slope, for example, the first slope preferably traverses a height of 100-150 nm).

Electronic devices may also be provided, wherein the sidewalls in the electronic device extend from the surface area to provide a bank structure thickness of at least 300 nm, preferably at least 1 탆. Thus, the maximum height of the side wall above the surface layer is preferably at least 300 nm. In an embodiment, the maximum height advantageously has a thickness sufficient to withstand a dry etch step, e. G., RIE.

An electronic device may also be provided in which the first slope extends over a length of at least 1 mu m along the surface layer and preferably the second slope extends over a length of at least 8 mu m along the surface layer, Preferably, the side walls (at least the first and second slopes) extend over a length of at least 10 탆 along the surface layer.

An electronic device may also be provided, wherein the device is a light emitting device and the solution processable layer comprises an organic semiconducting material for providing a hole injection layer (HIL), and preferably the light emitting device is an OLED . Also, at least one solution processable layer comprises another organic semiconducting material disposed over the material to provide the HIL, and the other organic semiconducting material comprises an interlayer (IL) or light emissive layer (EL)).

In the case where the electronic device is a light emitting device such as an OLED, preferably one of the first and second electrode layers (any one of the first or second electrode layers, preferably the second electrode layer in the case of the back light emitting device, ) Is light reflective (preferably totally reflective) and the other of the electrode layers is light transmissive (preferably the substrate is transmissive for backlighting devices). Such a device is preferably a partially reflective (preferably antireflective) layer (preferably a metal, for example silver and / or preferably blanket deposited rather than patterned, for example), arranged to form a micro- Lt; / RTI > Such a cavity can amplify the light and / or make the device more efficient.

Preferred embodiments are defined in the appended independent claims.

Any one or more of the foregoing aspects and / or any one or more of the above-described optional features of the preferred embodiments may be combined in any combination.

BRIEF DESCRIPTION OF THE DRAWINGS For a better understanding of the present invention and to show how the same may be carried into effect, reference will now be made, by way of example, to the accompanying drawings, in which: FIG.
Figure 1A illustrates an exemplary method of manufacturing a fluorinated bank material spun on an anode, e. G., ITO, and photo-patterned to form a well.
Figure IB shows the use of a single mask step with partially transmissive regions in the mask defining a long anode-cathode distance.
1C shows an implementation of a pixel (bottom view) according to an embodiment providing a longer path length, in contrast to a RIE patterned bank pixel having a shorter sidewall path length (top to middle drawing) .
Figure 1d shows an apparatus with a bank formed from the process of Figure 1a or 1b.
Figure 2 shows the life (device stability) configuration.
Figure 3a shows a dual develop process.
Figure 3B shows a dual mask process with a single patterning layer.
Figure 3c shows a single mask partially transmissive process with a single patterning layer.
Figure 3D shows a single mask process with a single patterning layer using a reflective region and a sub-threshold exposure dose.
Figures 4A-4E show scanning electron microscope images of a section of a shelf bank of an embodiment.
Figure 5 shows the variation of the HIL + IL thickness and the emission CIE value across the active zone of the device.
Figure 6 illustrates the preferred removal of steep bank structure boundaries.
Figure 7 shows a histogram of HIL zone thickness dimensions for standard and shallow bank embodiments.

In general, the layers of the exemplary OLED embodiment may be as follows.

기판, 예를 들어, 바람직하게 ITO(80㎚) 전극을 포함하는 표면 층 및 옵션으로 마이크로-캐비티(micro-cavity)의 형성을 위한 반사 층, 예를 들어, Ag을 갖는 유리.

A substrate, for example, a surface layer comprising preferably an ITO (80 nm) electrode and optionally a reflective layer for the formation of a micro-cavity, for example Ag.

HIL(정공 주입 층) 닛산 화학 공업으로부터 구입가능한 ND3202b를 이용하여 잉크 젯 인쇄됨

HIL (hole injection layer) Ink jet printing using ND3202b available from Nissan Chemical Industries, Ltd.

IL(중간층)

IL (middle layer)

발광 폴리머 LEP, 예를 들어, 녹색 발광 폴리머를 포함하는 EL(발광 층).

A light-emitting polymer LEP, for example, an EL (light-emitting layer) comprising a green light-emitting polymer.

Embodiments generally reduce leakage current, for example, by providing a single bank architecture with a longer path length. In the case of OLEDs, such path lengths may be between the anode surface (e.g., ITO) and the matching fluid pinning points of the HIL-IL-EL (HIL-IL-EL co-incident fluid pinning points). With such a longer path length, the high-resistance HIL can create a high-resistance path for any potential parasitic leakage current and / or non-emissive edge device diodes. Such a bank structure proves to be improved in OLED lifetime stability.

In such an embodiment, multiple bank fabrication processes are observed in the following discussion. For example, (i) developing a hydrophobic bank patterned with a secondary reactive ion etch (RIE) process; (ii) a non-patterned hydrophobic bank in which pixel edges are partially exposed in the RIE masking layer; (iii) dual development process; (iv) a dual mask process using a single patterning layer; (v) a single mask Partially transmissive (leaky) process using a single patterning layer; And (vi) a single mask process using a single patterning layer utilizing reflective areas and sub-critical exposure doses.

An example of such a process may provide a single developed hydrophobic bank having a partially oxygen plasma etched shelf. Advantageously, a single developed hydrophobic bank and subsequent patterning step allows the oxygen plasma to clean the ITO region and also partially etch a predefined amount of the bank. The ITO and partially etched banks are preferably hydrophilic which wet the HIL to the un-etched areas of the hydrophobic bank. The cross section of the HIL places the bank downward to the HIL pinning point that will be shared with the IL and EL. The active anode is advantageously long and preferably separated from the cathode by a designable distance in the device, thereby resulting in, for example, lowering the electrical leakage when using a highly resistive HIL.

Thus, the single bank architecture of the OLED can be improved by providing a wetting anode surface (ITO) and lengthening the path length between the anode surface and the matching fluid pinning point of the HIL-IL-EL. So making the path length longer can create a higher resistance option for any potential parasitic leakage current. The embodiment allows the anode-cathode path to be lengthened in a controlled manner and therefore can reduce the parasitic leakage current, which in turn can improve the efficiency of the device.

Additionally or alternatively, such a process may reduce the structural complexity compared to the dual bank architecture.

Figure 1a shows a cross-sectional view of a well (a region 13 above the surface layer zone) in which a fluorinated bank material (bank structure layer 12) is spin-formed and photo-patterned on the anode (surface layer 11) ≪ RTI ID = 0.0 > 1 < / RTI > A layer of photoresist 14 is then photo-patterned on top of the bank material and additional processing is performed to remove one cross-section of the bank, thereby lengthening the insulating bank shelf. Such additional processing steps may include a reactive ion etching step applied to partially etch through the bank material. The photoresist is removed after further processing. So the profile of the bank material at the edge of the well is changed to provide a longer path length for that profile. A long electrical path is created in the exposed surface 15 by removing the photoresist as a result of the etching, as shown by only an exemplary thin line along the first slope s1 and the second slope s2 in Fig.

The alternative approach shown in FIG. 1B employs a single mask step with a partially transmissive region in the mask to define a long anode-cathode distance for the bank shelf; The RIE step preferably etches the pixel edges where there was a positive masking layer of the thin film. The RIE can etch the pixel by exposing the edge of the pixel to the plasma by the masking layer of the thin film. By varying the mask design size of the developed bank pixel relative to the dimensions of the RIE patterned cut-out, this approach is used to control the amount of anode-cathode distance and the resulting parasitic leakage current . This is the opposite of simple photo-patterned bank pixels and / or simple RIE patterned bank pixels, each such bank pixel will typically provide a short path length from the anode-cathode (blue region) Can not be adjusted. 1B shows a surface layer 21, a bank structure layer 22, a surface layer zone 23, a photoresist layer 24, slopes s1 and s2, and a surface 25.

(Fig. 1 (c) shows the configuration of a pixel (bottom view) according to an embodiment providing a longer path length, in contrast to a RIE patterned bank pixel with a shorter sidewall path length ).

Figure 1d shows a solution processable layer L1 in the form of a HIL (Hole Injection Layer) and IL (intermediate layer) and / or LEP (light emitting polymer) having banks formed from the process embodiment as described above. Lt; RTI ID = 0.0 > (L2) < / RTI > As can be seen from Fig. 1d, the HIL, IL and LEP fluids have matching pinning points. The IL and / or LEP layer may be covered with an EIL (electron injection layer), which may be covered with a cathode layer. Preferably, such an EIL does not share the pinning point of layers L1 and L2, but covers these layers and extends beyond the adjacent regions of the bank structure. The cathode layer may preferably be deposited directly over the EIL, which in one embodiment conformally covers the EIL to extend beyond the layers and adjacent regions.

In view of the foregoing, the embodiment provides a single bank structure with an elongated insulating shelf, for example, in contrast to a dual bank system that separates the anode pinning point from the cathode. A single hydrophobic bank can be used and the subsequent patterning process is applied to lengthen the bank shelf. In an embodiment, the ITO and bank shelf may be hydrophilic, wetting the HIL to a predefined point (ink peen point) where the bank becomes hydrophobic. The cross section of the HIL will have a bank down to the HIL pinning point that will be shared with the IL and LEP. By using a high-resistance HIL, the active node can be separated from the cathode by a long (and device-designable) distance.

Embodiments can provide an adjustable process that can increase the anode-cathode path length in a controlled manner and thus reduce parasitic leakage current, resulting in more stable (and repeatable) device lumens in the life test something to do. In contrast, a single bank formed by a standard photo-lithography process or a more complicated but standard RIE (reactive ion etching) process can provide an inexpensive method for pixel (bank) definition. However, two standard techniques can leave a short anode-cathode path length at the pixel (device) edge. It has been found that the short path length between the anode (ITO) surface and the matching pinning points of the HIL-IL-EL-cathode results in instability when driving over time.

Figure 1a may alternatively be considered to represent a process flow embodiment in which a single bank has a long shelf. This process involves a dual step patterning process to create an elongated bank shelf. Since the depth of the shelf can provide adequate electrical insulation with the anode, the length of the shelf from the anode (ITO) to the ink pinning point can be controlled by a secondary patterning step. By varying the mask design size of the developed bank pixel with respect to the pixel dimensions of the secondary partially-patterned step, such an embodiment can be used to determine the anode-cathode distance (see thin lines that are just exemplary) and the result The amount of parasitic leakage current can be controlled. Such an embodiment may be, for example, a simple photo-patterned bank pixel, which typically will provide a short path length (< 1 mu m) from the anode-cathode and typically can not control the length (other than the bank height) (E.g., > 2 [mu] m) compared to simple RIE patterned bank pixels.

The longer distance of the anode-cathode can also be achieved by making the bank higher, but this will generally have a negative impact on the HIL-IL-EL profile at the pixel edge, i.e. thicker the profile and result in uneven luminescence .

Preferably, the HIL, IL and EL of the embodiment all have matching pinning points. This can result in a longer leakage path from the anode to the cathode where the HIL (conductive hole injection layer) meets the metal cathode. This effect is minimized by using a high resistivity HIL and then separating the anode (ITO) from the cathode through the long side HIL distance as described above.

Considering the results of the device, the stability of the device during the life test showed a significant improvement. In an embodiment, the elongated shelf significantly reduces the pixel edge diode effect (of non-luminescent thin film diodes) by increasing the resistance (path-length) to the point where the HIL-IL-EL meets.

Figure 2 shows the life (device stability) configuration. This configuration can show that the initial brightwave (which increases the luminance at constant current) of single bank-short shelf devices (dotted curve) varies considerably from device to device. This is probably due to the presence of a "burned out" vertical leakage path during the test, which causes current redistribution. In FIG. 2, a single bank-long shelf (continuous curve) shows that the bright wave size is distributed more tightly, which implies that the effect is probably not related to the leakage current. It is possible to evaluate material and process stability using these banks. Depending on the single bank-long shelf configuration, the lifetime (device degradation) becomes more predictable and less dependent on the pixel-edge device effect. Thus, a single hydrophobic bank with an elongated shelf has been shown to improve with respect to OLED lifetime stability.

Considering process complexity, it can be shown that the simplified process methodology can create a single hydrophobic bank of long shelves and / or reduce the complexity compared to the dual bank architecture by creating a single bank approach that reduces leakage with a long insulated shelf It is noted. Advantageously, such a simplified embodiment adjustably reduces the parasitic leakage current which increases the cathode-anode path in an adjustable manner and thereby reduces device efficiency. Embodiments encompass an alternative, simplified approach to achieving a single bank pixel.

Further, with respect to process complexity, the process methodology of FIG. 1A includes a developed hydrophobic bank that patterns and partially reactively ion etches (RIE) the secondary layer. This requires the addition of a RIE step and a positive resist removal step to two lithographic patterning loops (e.g., cleaning, baking, covering, baking, exposing, baking, developing, bank curing, coating, .

The embodiment of FIG. 1B is similar to the embodiment in which, for example, two photo-patterned steps plus additional reactive ion etching are used to create a long shelf required for OLED device stability, for example as shown in FIG. 1A To provide a simplified process of a single developed hydrophobic bank of elongated shelves.

However, as shown in FIG. 1B, The method shows an unpatterned hydrophobic bank in which a pixel edge is partially exposed due to the RIE masking layer. This process eliminates the need for a mask and development step in the first patterning loop.

An alternative simplification method is shown in Fig. 3A, which is described as a dual development process. This process can eliminate the requirements of the RIE and strip steps. Preferably, the first patterned bank is thin, wherein a shallow slope is formed on the pixel side. Preferably, the first thin bank layer is deposited, for example, spin-formed and cured. The thin layer is then photo-patterned and subsequently developed to expose an area of the anode where the thin layer has a gentle slope with respect to the exposed area. Then another bank layer is deposited, photo-patterned and developed. Advantageously, a paper such as a fluoro-species, e.g., a fluorine component, in another bank layer migrates to the top surface of another bank layer during banking of that layer such that its top surface is exposed to the side walls of another bank layer Lt; RTI ID = 0.0 &gt; deposition &lt; / RTI &gt; 3A shows a surface layer 31, a first bank layer 32, a surface layer section 33, a second bank layer having a surface 34, and slopes s1 and s2.

Figure 3B illustrates an alternative simplification method in the form of a double mask process to form a single patterning layer. This process is a single patterning step process without a positive resist layer, but may require two photo-masks and a double exposure step. The upper mask (mask 2) may be a gradient mask that defines the slopes s1 and s2 more sharply. 3B shows a surface layer 41, a bank layer 42, a surface layer zone 43, slopes s1 and s2, and a surface 45, (S) of the bank layer between the second region (s) 44 or below the surface 45.

FIG. 3C illustrates another alternative simplification method, i.e., a single mask partial permeation (leakage) process with a single patterning layer. This process is a single patterning step process without a positive resist layer, but may require a more expensive photomask, but with a single exposure step. 3C shows a surface layer 51, a bank layer 52, a surface layer zone 53, slopes s1 and s2, and a surface 55, (S) of the bank layer in relation to the first zone (s) below or below the surface 55 of the substrate. A mask that features partial transmission, e.g., sub-resolution, may be a gradient mask that defines the slopes s1 and s2 more sharply.

FIG. 3D illustrates another alternative simplification method, i.e., a single mask process with a single patterning layer utilizing a reflection region and a sub-threshold exposure dose. This process is a single patterning step process and a single exposure step without a positive resist layer. The composition of previous layers may include a reflective area used to create a higher irradiance dose zone to cross-link the bank completely. The anode-cathode distance and the resulting amount of parasitic leakage current can be adjusted using this approach. Specifically, Figure 3d shows surface layer 61, bank layer 62, surface layer section 63, slopes s1 and s2, and surface 65, 65 are the second zones of the bank layer for the first zone (s) below.

This process will provide a short path length, typically from an anode-cathode (blue region), and typically each of the photo-patterned single bank pixels and / or RIE patterning Bank pixels.

With respect to the different approaches and embodiments described above, Fig. 4 shows various exemplary shelf bank images. Figure 4a shows a dual developed long shelf bank, Figure 4b shows a doubly developed long shelf bank with HIL, Figure 4c shows an elongated shelf bank through a RIE notch, , Fig. 4D shows a single developed bank, and Fig. 4E shows a single developed bank (short shelf (without)) with HIL.

The flat thickness profile of the HIL + IL is desirable to maximize OLED device performance in a micro-cavity platform. For ink jet printed devices, the thickness profile is dependent on the bottom bank structure. These details are the preferred bank profiles for achieving a suitable flat thickness profile in a single bank ink jet printed device. Advantageously, such a profile provides a gradual transition from the bank shelf to the active area, allowing the printed HIL to form a flat profile suitable for micro-cavity OLED devices.

Considering a flat film profile using a single bank of progressive shelves + a non-aqueous HIL, the embodiment provides a gradual transition from the bank shelf to the active area so that the printed HIL is suitable for micro-cavity OLED devices Thereby forming a flat profile. A flat thickness profile for HIL + IL is desirable to maximize OLED device performance in a micro-cavity platform. For ink jet printed devices, the thickness profile is dependent on the lower bank structure. The embodiment provides a bank profile for achieving a suitable flat thickness profile in a single bank inkjet printed device.

Achieving maximum performance at the most likely color points typically requires precise control of layer thickness and profile in micro-cavity OLED devices. Also, if there is a noticeable non-uniformity in the HIL + IL, then there will be a non-optimal out-coupling layer profile section and performance degradation.

For example, the width cross-section of the HIL + IL for an inkjet printed device is shown in Fig. It can be seen that the edge area of the pixel is much thicker than the center area. The CIE coordinates are shifted from the target color point within these zones. This causes overall device performance to deteriorate.

The bank shape has evolved to minimize the amount of edge fading and to improve printing performance as a result. Since the HIL can not follow the bank profile very closely, the sharp transition from shelf to ITO thickens the edge.

An embodiment having a progressive bank shelf is shown in FIG. 6, which includes a view from the close distance of the upper circle segment in the bottom figure, wherein the progressive falling slope is compared with the right slope (left side) It is shown in the figure below.

Using this progressive shelf bank form can be used to maximize device performance in an inkjet printing platform such that it can be compared to SC (spin-coated device) data (data shown for a device emitting green light) do.

Here, DE = D (u'v ') using u', v 'definition of CIE 1976 color space (' CIELUV '). The table above shows that inkjet printed devices, such as incremental shelf bank devices, have comparable performance to spin-coated devices.

Also in this regard, the conversion from CIExy to CIE u'v 'of CIE XUZ in the 1931 CIE XYZ color space (ie CIE 1931 -> CIE 1976) is given as follows,

Using the u ', v' definition of CIELUV, the color difference metric is:

That is, it is noted that CIE 1976 space is given as Euclidean distance.

In an embodiment such as the 'progressive shelf bank' device described above, the target CIEx and y targets of the green light emission (NTSC) are 0.213 and 0.724, respectively. CIExy measurements were obtained using a Minolta colorimeter and dE was calculated using CIExy.

dE = 0.02 is a preferred upper limit acceptable in the examples, but more preferably 0.005, 0.01 or 0.015.

Figure 7 shows a histogram showing that the standard bank has a greater proportion of thicker regions than the embodiment with progressive shelf banks. This histogram is obtained by measuring the thickness at regularly spaced points across the active area above the surface layer area surrounded by the sidewalls of the bank structure. An apparatus having a "standard bank" is an apparatus having an elongated shelf of substantially constant thickness similar to that shown in the upper diagram of Fig. Devices having a "shallow bank" have a long shelf tapered toward the surface layer of the device, e.g., the first slope has an angle preferably less than 5, 10, 15 or 20 degrees, And can further control outcoupling (incoupling in the case of a light absorbing device).

There will probably be many other effective alternatives to those skilled in the art. It is to be understood that the invention is not to be limited to the disclosed embodiments but is to be accorded the widest scope consistent with the spirit and scope of the following claims.

Claims (15)

A method of manufacturing an electronic device comprising a surface layer and a substrate having a well-defining bank structure on the surface layer,
The bank structure having a sidewall that includes an electrically insulating material and surrounds a region of the surface layer, wherein the surface layer region includes a first electrode and the electronic device includes a second electrode and the first electrode And a semiconductive material disposed between the first electrode and the second electrode,
The method comprises:
Forming a bank structure having the sidewalls including a first slope extending from the surface layer region and a second slope extending from the first slope, the second slope being steeper than the first slope, The sidewall having a surface energy discontinuity at a point on the second slope away from the first slope,
The method comprising: forming a layer structure having at least one layer, the layer structure being disposed between the first electrode and the second electrode and having the semiconductive material,
Wherein forming the layer structure comprises:
Depositing an organic solution on the surface layer zone and on the first and second slopes of the sidewall to form a solution processable layer, wherein the deposited organic solution is deposited on the first and second slopes To a pinning point in the surface energy discontinuity,
And drying the deposited organic solution.
/ RTI &gt;
The method according to claim 1,
Depositing at least one additional solution onto the solution-processable layer, the at least one additional solution wetting up to the pinning point,
Drying said at least one additional solution deposited
/ RTI &gt;
3. The method according to claim 1 or 2,
Wherein forming the bank structure comprises:
Forming a first bank layer comprising a photoresist on the surface layer of the substrate;
Patterning and developing the first bank layer to expose the region of the surface layer;
Depositing a fluorinated photoresist solution on the exposed areas of the first bank layer and the surface layer to form a second bank layer;
Wherein the fluorine containing compounds of the fluorinated photoresist solution migrate to the surface of the second bank layer during the baking and contact the surface of the organic solution with the surface of the second bank layer, Increasing the angle - and,
Patterning and developing the second bank layer to expose the region of the surface layer and expose a region of the first bank layer so that the first bank layer region has the first slope and the second bank layer is exposed, Layer so as to have the second slope,
Wherein the increased contact angle is greater than the contact angle of the organic solution with the first and second slopes and the pinning point is at a boundary of the surface of the second bank layer having the transferred fluorine-
/ RTI &gt;
3. The method according to claim 1 or 2,
Wherein forming the bank structure comprises:
Forming a bank structure layer by depositing a fluorinated photoresist solution on the surface layer, and drying the deposited solution to cure the bank structure layer, wherein the fluorine containing compound of the fluorinated photoresist solution has a concentration To the surface of the bank structure layer to increase the contact angle of the organic solution with the surface -
Depositing and drying a photoresist layer on the bank structure layer, photo-patterning and developing the photoresist layer,
And etching the bank structure layer through the developed photoresist layer to expose the surface layer region so that the etched bank structure layer has the sidewalls surrounding the exposed surface layer regions, 2 &lt; / RTI &gt; slope,
Removing the developed photoresist layer to expose a surface of the bank structure layer, the exposed surface comprising the transferred fluorine containing compound,
Wherein the surface energy discontinuity is present at the interface between the exposed surface comprising the transferred fluorine-containing compound and the etched sidewall
/ RTI &gt;
5. The method of claim 4,
Wherein forming the bank structure comprises:
Developing and photo-patterning the bank structure layer to expose the surface layer region surrounded by the sidewalls of the bank structure layer,
Wherein depositing the photoresist layer on the bank structure layer comprises depositing a photoresist solution on the photo-patterned bank structure layer, wherein developing the photoresist layer comprises depositing Wherein the dry etching step of exposing the surface layer region comprises forming the first slope and the second slope by thinning the bank structure layer to extend the exposed region In addition,
Preferably, photo-patterning the photoresist layer comprises exposing the photoresist layer through a mask having a non-transmissive region, a partially transmissive region and a fully transmissive region, Comprising the steps of:
Wherein developing the photoresist layer comprises completely removing the region of the photoresist and partially removing the photoresist region exposed to the radiation through the partially permeable region,
More preferably, the dry etching step preferably comprises reactive ion etching using an oxygen plasma
/ RTI &gt;
The method according to claim 1,
Wherein forming the bank structure comprises:
Forming a bank layer by depositing a fluorinated photoresist solution on the surface layer;
And baking and curing the bank layer, wherein the fluorine compound of the photoresist solution moves to the surface of the bank layer during the baking to increase the contact angle of the organic solution with the surface,
Photo-patterning the cured bank layer, the photo-patterning step comprising: irradiating a first region of the bank layer with a first radiation dose and irradiating the first region of the bank layer with a second irradiation dose The second irradiation dose being less than the first irradiation dose,
Developing the bank layer to expose the area of the surface layer and partially remove the area of the bank layer irradiated with the second exposure dose, the first area surrounding the exposed area, Providing the sidewall having a slope and the second slope,
Wherein the pinning point is located at a boundary between the bank layer surface having the transferred fluorine-
/ RTI &gt;
The method according to claim 6,
Wherein the step of photo-patterning comprises simultaneously irradiating the bank layer through a first mask and a second mask, the step of irradiating the first region with the first irradiation dose comprises: 1 &lt; / RTI &gt; mask and the second mask, wherein irradiating the second region with the second irradiated dose comprises irradiating the second region with a first dose of each of the first and second masks At least through a partially transmissive zone, and / or
Wherein the step of photo-patterning comprises irradiating the bank layer through a mask having a partially transmissive region and a more transmissive region, the step of irradiating the first region with the first irradiated dose comprises: Wherein the step of irradiating the second zone with the second irradiated dose comprises irradiating the second zone through the partially transmissive zone and /
The method includes depositing a reflector layer on a region of the surface layer,
Wherein depositing the fluorinated photoresist solution comprises depositing the fluorinated solution on the reflector layer and on the surface layer,
Wherein said photo-patterning step comprises irradiating said bank layer through a mask, said step of irradiating said first zone comprises the steps of absorbing a portion of said first irradiated dose directly received through said mask, And a second zone adapted to receive a portion of the irradiated dose received from the mask and reflected back to the first zone by the reflector layer
/ RTI &gt;
8. The method according to any one of claims 1 to 7,
The electronic device may be an optoelectronic device such as a light emitting device or a light absorbing device, preferably a light absorbing device such as an organic photovoltaic device (OPV) or an organic light emitting diode ) &Lt; / RTI &gt;
/ RTI &gt;
9. The method according to any one of claims 1 to 8,
The electronic device is an OLED and the organic solution is a solution for providing a hole injection layer (HIL)
The method preferably includes forming at least one additional solution processable layer on the solution processable layer and between the first electrode and the second electrode, wherein the additional solution processable layer comprises an intermediate layer interlayer (IL) and / or light emissive layer (EL)
/ RTI &gt;
10. The method according to any one of claims 1 to 9,
The contact angle when the organic solution is deposited on at least one of the first slope and the second slope area extending from the first slope to the pinning point is 10 DEG or less and /
The contact angle when the organic solution is deposited in the region of the bank structure extending from the first slope and extending from the pinning point is 50 DEG or greater
/ RTI &gt;
An electronic device comprising a surface layer and a substrate having a well defined bank structure on the surface layer, the bank structure defining a well by having a sidewall containing an electrically insulating material and surrounding a region of the surface layer, The layer region comprising a first electrode,
The electronic device further includes a second electrode and a semiconducting material disposed between the first electrode and the second electrode,
The sidewall having a first slope extending from the surface layer zone and a second slope extending from the first slope, the second slope being steeper than the first slope,
The electronic device comprising a layer structure having at least one layer, wherein at least one of the layers is a solution processable layer, the layer structure having the semiconductive material and the first electrode and the second electrode, Two electrodes,
Wherein at least one of the solution processable layers has a pinning point at a point on the second slope spaced from the first slope and the solution processable layer is disposed on the surface layer zone and on the side of the side wall 1 and the second slope
Electronic device.
12. The method of claim 11,
Wherein the bank structure comprises at least one photoresist layer,
Preferably, the photoresist layer has the point on the second slope and comprises a fluorine-containing compound, and / or
Wherein the bank structure comprises a plurality of photoresist layers, the photoresist layer having the first slope, and / or
Wherein the bank structure comprises a fluorine-containing compound and the photoresist layer having the first slope and the second slope
Electronic device.
13. The method according to claim 11 or 12,
Wherein the first slope has a slope angle less than or equal to 20 degrees, more preferably less than 10 degrees with respect to the surface layer
Electronic device.
13. The method according to claim 11 or 12,
The first slope extends to a bank structure thickness of less than 300 nm, preferably less than 200 nm at the interface with the second slope, and preferably at least one slope of the first and second slopes extends from 100 nm to &lt; Extending along the bank structure thickness of 150 nm, and / or
The sidewalls extending from the surface layer region to provide a bank structure thickness of at least 300 nm, and / or
The first slope extends over a length of at least 1 mu m along the surface layer and preferably the second slope extends over a length of at least 8 mu m along the surface layer, Lt; RTI ID = 0.0 &gt; 10 &lt; / RTI &gt;
Electronic device.
15. The method according to any one of claims 11 to 14,
The electronic device is a light emitting device and the solution processable layer comprises an organic semiconducting material for providing a hole injection layer (HIL), preferably the light emitting device is an OLED, and preferably at least one Wherein the solution processable layer comprises an additional organic semiconducting material disposed over the material to provide the HIL and the further organic semiconducting material comprises an interlayer (IL) or light emissive layer EL) &lt; / RTI &gt;
Electronic device.

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