KR20140108809A - Manufacturing method of semiconduntor device metal line using expansion absorbing film formed by layer by layer thin films - Google Patents

Abstract

The present invention relates to a method for manufacturing a metal line using an expansive absorbing film formed by multi-layered thin films, comprising a step for preparing a base material where a pattern is formed; a step for arranging one or more layers of an organic matter layer on the base material where the pattern is formed; and a step for filling inside the pattern of the base material by absorbing metal on the organic matter layer.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a method of manufacturing a metal wiring of a semiconductor device using an expansion absorbing film formed by a multilayer thin film,

The present invention relates to a method of fabricating a metal wiring of a semiconductor device using an expansion absorbing film formed by a multilayer thin film.

A manufacturing process of a semiconductor integrated circuit is largely divided into a process of forming devices on a silicon substrate and a process of electrically connecting the devices. The process of electrically connecting the two devices is referred to as a wiring process or a metallization process, which increases the yield and reliability as the device integration increases.

Currently, metal is widely used as wiring material. However, as the degree of integration of the device increases, the wiring width decreases and the total length increases, thereby increasing the signal propagation delay time indicated by the RC time constant. In addition, as the wiring width is reduced, electromigration or shorting of the wiring due to stress migration is becoming an important problem. Therefore, in order to fabricate a device with a high operating speed and high reliability, a very high integrated device using copper with a small specific resistance and a high resistance against electromigration and stress transfer, and many researches as a next generation wiring material of a large area TFT-LCD It is.

However, copper is accompanied by the use of diffusion barrier and bonding layers due to the fast diffusion of insulating layers and Si, and low adhesion problems. Also, as the size of the semiconductor device is reduced to 22 nm or less, the thickness of the diffusion barrier layer and the bonding layer of several nanometers is not only a problem in filling the pattern, but also in the subsequent heat treatment process, It has difficulties. Korean Patent Laid-Open No. 10-2009-0045302 relates to a self-assembled monolayer that improves the adhesion between copper and a barrier layer, and enables deposition of a thin conformal barrier layer and a copper layer at a copper interconnect, thereby achieving good electromigration performance And reducing a short circuit of the wiring due to the stress transfer of the copper interconnections. However, since the above method includes a method of oxidizing the metallic barrier layer of the copper interconnect and then depositing the functionalized layer in order to improve the electromigration performance of the copper interconnect, the method is somewhat complicated, and when the copper is heat- It may cause damage to the functionalized layer due to the expansion of copper.

In order to solve this problem, it is possible to fabricate the metal wiring of the semiconductor element through a simple process, to offset the barrier layer and the impact at the copper interconnect, to improve the electromigration performance and to reduce the stress-inducing void of the copper interconnect ) Is required to develop a metal wiring of a semiconductor device.

The present invention seeks to provide a method of fabricating a metal wiring of a semiconductor device using an expansion absorbing film formed by a multilayer thin film.

According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: preparing a patterned substrate; Laminating one or more organic layers on the patterned substrate; And a step of adsorbing the metal to the organic material layer to fill the pattern of the base material. The present invention also provides a method for fabricating a metal wiring using an expanded absorbing film formed by a multilayer thin film.

According to one embodiment of the present invention, the substrate may include, but is not limited to, selected from the group consisting of silicon wafers, glass, sapphire, polymers, and combinations thereof.

According to one embodiment of the invention, the pattern formed on the substrate may be a via hole having a size of the order of several nanometers to several hundreds of nanometers, a trench width having a size on the order of several nanometers to several hundreds of nanometers, But may not be limited to, including a trough silicon via (TSV) hole having a level of dimensions.

According to one embodiment of the present invention, the surface treatment of the base material for improving the adhesion between the base material and the organic material layer may be additionally included, but the present invention is not limited thereto.

According to one embodiment of the invention, the surface treatment may include, but is not limited to, UV irradiation, plasma, catalytic treatment, or self-assembled monolayer treatment.

According to one embodiment of the present invention, the method of laminating the organic layer may be performed by spin coating, dipping coating, roll-to-roll coating, or flow coating, but the present invention is not limited thereto.

According to one embodiment of the present invention, the one or more organic layers may include an organic layer having a charge of the opposite nature to the substrate and an organic layer having a charge of the same nature as the substrate, .

According to an embodiment of the present invention, the organic material layer may include at least one selected from the group consisting of PAH [poly (allylaminehydrochloride)], PEI [poly (ethyleneimine)], PDAC [poly (diallyldimethylammonium chloride)], PVTAC [poly (4-vinylbenzyltrimethylammoniumchloride)], ), PAA [poly (acrylicacid)], PVS [poly (vinylsulfonicacid)], SPS (sulfonatedpolystyrene), PEDOT [poly (3,4-ethylenedioxythiophene)], ferritin (ferrihydritephosphate) ), HMF (5-hydroxymethylfurfural), PGMEA (propylene glycol methyl ether acetate), PVP [poly (4-vinylphenol)], and combinations thereof.

According to an embodiment of the present invention, a barrier layer for preventing diffusion of the adsorbed metal may be additionally provided between the substrate and the organic layer, but the present invention is not limited thereto.

According to one embodiment of the present invention, the barrier layer may include, but not limited to, a metal film, a metal nitride film, or a metal oxide film.

According to an embodiment of the present invention, the organic material layer may further include a surface treatment for improving adhesion between the organic material layer and the adsorbed metal. However, the present invention is not limited thereto.

According to one embodiment of the present invention, the surface treatment may be performed by formation of a bonding layer, UV irradiation, plasma, catalytic treatment, or formation of a self-assembled monolayer, but the present invention is not limited thereto.

According to an embodiment of the present invention, the bonding layer may include, but is not limited to, a metal film, a metal nitride film, or a metal oxide film.

According to one embodiment of the present invention, the stabilization temperature of the organic material layer may be higher than the heat treatment temperature of the metal, but may not be limited thereto.

According to an embodiment of the present invention, the thickness of the organic material layer may be thicker than the expanded thickness of the metal after the heat treatment, but may not be limited thereto.

According to one embodiment of the present invention, the organic layer may include, but is not limited to, selectively controlling the material to be deposited according to the surface properties thereof.

According to one embodiment of the present invention, the adsorption method of the metal may be performed by a method such as chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), electroplating deposition, electroless plating electroless plating deposition, or a combination of adsorption methods.

According to an embodiment of the present invention, the metal wiring may further include a heat treatment for enhancing the electrical characteristics of the metal wiring, but the present invention is not limited thereto.

According to the above-mentioned problem solving means of the present invention, when the organic material layers are laminated by using the layer by layer (LbL) method, when the heat treatment for enhancing the electrical characteristics of the copper wiring is performed, the swelling of the lower organic layer due to the thermal expansion of the metal, It is possible to form an expansion absorbing film capable of solving the problems of diffusion and agglomeration. In addition, a metal wiring of a semiconductor device having a good electromigration performance and a reduced risk of stress-inducing voids in the copper interconnections can be manufactured through a simple process of adsorbing metal in the organic material layer and filling the pattern into the pattern.

1A to 1D are cross-sectional views illustrating a method of fabricating a metal wiring of a semiconductor device using an expanded absorber formed by a multilayer thin film according to an embodiment of the present invention.
Figures 2A-2E are schematic diagrams of a multi-layer processing (LbL) method according to one embodiment of the present invention.
FIG. 3A is a view showing the internal filling when copper is deposited on a patterned substrate using the multi-layer processing (LbL) method according to an embodiment of the present invention, FIG. 3B is a view showing the expansion And Fig.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily carry out the present invention. It should be understood, however, that the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. In the drawings, the same reference numbers are used throughout the specification to refer to the same or like parts.

Throughout this specification, when a part is referred to as being "connected" to another part, it is not limited to a case where it is "directly connected" but also includes the case where it is "electrically connected" do.

Throughout this specification, when a member is " on " another member, it includes not only when the member is in contact with the other member, but also when there is another member between the two members.

Throughout this specification, when an element is referred to as "including " an element, it is understood that the element may include other elements as well, without departing from the other elements unless specifically stated otherwise. The terms "about "," substantially ", etc. used to the extent that they are used throughout the specification are intended to be taken to mean the approximation of the manufacturing and material tolerances inherent in the stated sense, Accurate or absolute numbers are used to help prevent unauthorized exploitation by unauthorized intruders of the referenced disclosure. The word " step (or step) "or" step "used to the extent that it is used throughout the specification does not mean" step for.

Throughout this specification, the term " combination thereof " included in the expression of the machine form means one or more combinations or combinations selected from the group consisting of the constituents described in the expression of the machine form, And the like.

Throughout this specification, the description of "A and / or B" means "A or B, or A and B".

Hereinafter, a method for fabricating a metal wiring of a semiconductor device using an expanded absorber formed by the multilayer thin film of the present invention will be described in detail with reference to the accompanying drawings.

1A to 1D are cross-sectional views illustrating a method of fabricating a metal wiring of a semiconductor device using an expanded absorber formed by a multilayer thin film according to an embodiment of the present invention.

As shown in Fig. 1A, a patterned substrate 100 is prepared. The substrate 100 may include, but is not limited to, selected from the group consisting of silicon wafers, glass, sapphire, polymers, and combinations thereof. First, the substrate 100 on which the pattern is formed is washed and prepared according to a conventional method. Cleaning the substrate 100 in this manner is for removing organic matter present on the substrate 100. When the organic material exists on the substrate 100, the organic material layer 120 may not be uniformly applied during the subsequent application of the organic material layer 120. After immersing the substrate 100 in the detergent for a predetermined period of time, the substrate 100 is rinsed to remove organic substances. For example, the substrate 100 may be cleaned using a piranha solution, but the present invention is not limited thereto. The piranha solution may be prepared by mixing sulfuric acid (H ₂ SO ₄ ) and hydrogen peroxide (H ₂ O ₂ ) at a ratio of about 4: 1, but is not limited thereto. In the step of rinsing the substrate 100, rinsing may be performed using deionized water to prevent re-contamination of the substrate, but the present invention is not limited thereto.

 The pattern formed on the substrate 100 may be a via hole having a size of several nanometers to several hundreds of nanometers, a trench width having a size of several nanometers to several hundreds of nanometers, or a size of several hundred nanometers to several hundreds of micrometers But may include, but is not limited to, trough silicon via (TSV) holes. The via hole having a size of the order of several nanometers to several hundreds of nanometers may have a size of, for example, about 1 nm to about 100 nm, but may not be limited thereto. The via hole may have a thickness of, for example, from about 1 nm to about 100 nm, from about 5 nm to about 100 nm, from about 10 nm to about 100 nm, from about 15 nm to about 100 nm, from about 20 nm to about 100 nm, From about 30 nm to about 100 nm, from about 50 nm to about 100 nm, from about 70 nm to about 100 nm, from about 90 nm to about 100 nm, from about 1 nm to about 90 nm, from about 5 nm to about 90 nm, To about 90 nm, from about 15 nm to about 90 nm, from about 20 nm to about 90 nm, from about 30 nm to about 90 nm, from about 50 nm to about 90 nm, from about 70 nm to about 90 nm, From about 5 nm to about 70 nm, from about 10 nm to about 70 nm, from about 15 nm to about 70 nm, from about 20 nm to about 70 nm, from about 30 nm to about 70 nm, from about 50 nm to about 70 nm , About 1 nm to about 50 nm, about 5 nm to about 50 nm, about 10 nm to about 50 nm, about 15 nm to about 50 nm, about 20 nm to about 50 nm, about 30 nm to about 50 nm, From about 1 nm to about 30 nm, from about 5 nm to about 30 nm, from about 10 nm to about 30 nm, from about 15 nm to about 30 nm, from about 20 nm From about 1 nm to about 15 nm, from about 5 nm to about 20 nm, from about 1 nm to about 20 nm, from about 5 nm to about 20 nm, from about 10 nm to about 20 nm, from about 15 nm to about 20 nm, 15 nm, about 10 nm to about 15 nm, about 1 nm to about 10 nm, about 5 nm to about 10 nm, or about 1 nm to about 5 nm. The trench width having a size of the order of several nanometers to several hundreds of nanometers may have a size of, for example, from about 1 nm to about 100 nm, but may not be limited thereto. The trench width may be, for example, from about 1 nm to about 100 nm, from about 5 nm to about 100 nm, from about 10 nm to about 100 nm, from about 15 nm to about 100 nm, from about 20 nm to about 100 nm, From about 30 nm to about 100 nm, from about 50 nm to about 100 nm, from about 70 nm to about 100 nm, from about 90 nm to about 100 nm, from about 1 nm to about 90 nm, from about 5 nm to about 90 nm, To about 90 nm, from about 15 nm to about 90 nm, from about 20 nm to about 90 nm, from about 30 nm to about 90 nm, from about 50 nm to about 90 nm, from about 70 nm to about 90 nm, From about 5 nm to about 70 nm, from about 10 nm to about 70 nm, from about 15 nm to about 70 nm, from about 20 nm to about 70 nm, from about 30 nm to about 70 nm, from about 50 nm to about 70 nm , About 1 nm to about 50 nm, about 5 nm to about 50 nm, about 10 nm to about 50 nm, about 15 nm to about 50 nm, about 20 nm to about 50 nm, about 30 nm to about 50 nm, From about 1 nm to about 30 nm, from about 5 nm to about 30 nm, from about 10 nm to about 30 nm, from about 15 nm to about 30 nm, from about 20 nm From about 5 nm to about 20 nm, from about 10 nm to about 20 nm, from about 15 nm to about 20 nm, from about 1 nm to about 15 nm, from about 5 nm to about 20 nm 15 nm, about 10 nm to about 15 nm, about 1 nm to about 10 nm, about 5 nm to about 10 nm, or about 1 nm to about 5 nm. The TSV hole having a size of the order of several hundreds nm to several hundreds of micrometers may have a size of, for example, about 100 nm to about 200 μm, but may not be limited thereto. The TSV holes may be formed, for example, from about 100 nm to about 200 탆, from about 300 nm to about 200 탆, from about 500 nm to about 200 탆, from about 800 nm to about 200 탆, from about 1 탆 to about 200 탆, From about 10 microns to about 200 microns, from about 30 microns to about 200 microns, from about 70 microns to about 200 microns, from about 100 microns to about 200 microns, from about 150 microns to about 200 microns, from about 100 nanometers to about 150 microns, from about 300 nanometers From about 1 micron to about 150 microns, from about 10 microns to about 150 microns, from about 30 microns to about 150 microns, from about 70 microns to about 150 microns, from about 500 microns to about 150 microns, from about 800 nanometers to about 150 microns, About 100 nm to about 100 mu m, about 100 nm to about 100 mu m, about 300 nm to about 100 mu m, about 500 nm to about 100 mu m, about 800 nm to about 100 mu m, about 1 mu m to about 100 mu m From about 10 microns to about 50 microns, from about 500 microns to about 50 microns, from about 100 microns to about 50 microns, from about 10 microns to about 100 microns, from about 30 microns to about 100 microns, from about 70 microns to about 100 microns, 800 nm to about 50 탆, about 1 탆 From about 10 microns to about 50 microns, from about 30 microns to about 50 microns, from about 100 nanometers to about 30 microns, from about 300 nanometers to about 30 microns, from about 500 nanometers to about 30 microns, from about 800 nanometers to about 30 mu m, from about 1 mu m to about 30 mu m, or from about 10 mu m to about 30 mu m, for example.

The patterned substrate 100 may further include a surface treatment of the substrate 100 to improve adhesion between the substrate 100 and the subsequent organic layer 120. However, the present invention is not limited thereto. The surface treatment may, for example, include, but is not limited to, UV irradiation, plasma, catalytic treatment, or self-assembled monolayer treatment. For example, when UV is irradiated by the above-mentioned surface treatment, UV light having a wavelength of 184.9 nm or 53.7 nm is irradiated for about 30 minutes to decompose the organic material to form an OH- group on the surface of the substrate, But may not be limited thereto.

The barrier layer may further include a barrier layer between the substrate 100 and the organic material layer 120 to prevent diffusion of the metal 150 that may be generated in a subsequent heat treatment process of the metal 150. However, But may not be limited. The barrier layer may include, but is not limited to, a metal film, a metal nitride film, or a metal oxide film. The barrier layer may include, for example, a metal film selected from the group consisting of Ti, Ta, Ru, W, Zr, Hf, Mo, Nb, V, Cr, But may not be limited.

Next, as shown in FIG. 1B, the organic material layer 120 may be laminated on the substrate 100, but the present invention is not limited thereto. The organic layer 120 may be formed by spin coating, dipping coating, roll-to-roll coating, or flow coating, but the present invention is not limited thereto. The organic layer 120 may be formed to enhance adhesion between the substrate 100 and the metal 150 and allow the metal 150 to be easily adsorbed to the substrate 100. The one or more organic layers 120 may include, but are not limited to, an organic layer having a charge of the opposite nature to the substrate and an organic layer having a charge having the same properties as the substrate. For example, when the substrate 100 is charged with a negative charge, the organic layer 123 having a (+) charge can be laminated, and then the organic layer 125 having a negative charge can be laminated However, the present invention is not limited thereto. Poly (ethyleneimine)], PDAC [poly (diallyldimethylammonium chloride)], PVTAC [poly (4-vinylbenzyltrimethylammoniumchloride)], and the like, But are not limited to, those selected from the group consisting of combinations thereof, and the like. The (-) charged organic layer 125 may include, for example, PSS [poly (styrenesulfonate)], PAA [poly (acrylic acid)], PVS [poly (vinylsulfonic acid)], SPS (sulfonated polystyrene) But the present invention is not limited thereto.

In addition, the organic material layer 120 may be formed by stacking an organic material layer having a charge opposite to that of the base material 100, and then replacing the surface of the organic material layer to stack the organic material layers having different properties . For example, when the substrate 100 is charged with a negative charge, the organic layer 123 having a positive charge is first laminated, and then the positive charge on the surface of the organic layer 123 is substituted To form a new type of organic layer, but the present invention is not limited thereto. The organic layer laminated by substituting the charge of the surface may be formed of a material selected from the group consisting of PEDOT [poly (3,4-ethylenedioxythiophene)], Ferritin (ferrihydritephosphate), MMF [polyamine- , Propylene glycol methyl ether acetate (PGMEA), poly (4-vinylphenol) PVP, and combinations thereof.

The organic layer 120 may further include a surface treatment for improving adhesion between the organic layer 120 and the adsorbed metal 150, but the present invention is not limited thereto. The surface treatment may be performed, for example, by forming a bonding layer, UV irradiation, plasma, catalytic treatment, or formation of a self-assembled monolayer, but may not be limited thereto. For example, the organic material layer 120 may be surface-modified using a self-assembled monolayer, but the present invention is not limited thereto. The self-assembled monolayer is a flexible and simple system capable of controlling the interfacial properties of metals, metal oxides, and semiconductors. When the self-assembled monolayer film is formed on the organic material layer to perform surface modification, The adhesion between the metal layer 150 and the metal layer 150 may be enhanced by providing a bonding agent capable of ionic bonding to the metal layer 150 and the organic layer 120 when the metal layer 150 is adsorbed. . The bonding layer may be formed to allow the metal 150 to be easily adsorbed. The bonding layer may include, but is not limited to, a metal film, a metal nitride film, or a metal oxide film. The bonding layer may include, for example, a metal film selected from the group consisting of Ti, Ta, Ru, W, Zr, Hf, Mo, Nb, V, Cr, .

Next, as shown in FIG. 1C, the metal 150 is adsorbed on the organic material layer 120 to fill the pattern of the substrate 100. For example, the adsorption method of the metal 150 may be performed by a chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), electroplating deposition, electroless plating deposition, or a combination of adsorption methods. The adsorption of the metal may be performed using, for example, an atomic layer deposition (ALD) method, but may not be limited thereto. The ALD method is a nano thin film deposition technique that utilizes the phenomenon of chemically sticking mono-atomic layers, which enables the superfine layer deposition of atomic layer thickness to proceed by adsorption and substitution of molecules alternately on the wafer surface, And the film quality can be formed at a low temperature of 500 DEG C or less. For example, the adsorption of the metal 150 is continued for about 20 minutes, the metal precursor is injected for about 10 seconds, the Ar purge is performed for 20 seconds, the iodine ions are injected for about 5 seconds, The metal 150 may be filled in the pattern of the substrate 100, but the present invention is not limited thereto.

The metal 150 may be filled in the pattern of the substrate 100 and then heat treatment for enhancing the electrical characteristics of the metal 150 may be added. The stabilization temperature of the organic material layer 120 may be higher than the heat treatment temperature of the subsequent metal 150, but may not be limited thereto. When the heat treatment process is performed, as shown in FIG. 1D, the metal 150 thermally expands, and the organic layer 120 shrinks due to the thermal expansion. The thickness of the organic material layer 120 may be thicker than the thickness of the expanded metal 150 after the heat treatment, but may not be limited thereto. The organic material layer 120 is formed on the substrate 100 because the thickness of the organic material layer 120 is thicker than the thermal expansion thickness of the metal material 150 even when the organic material layer 120 is contracted during thermal expansion of the metal material 150. [ And the organic material layer 120 can offset the impact of the substrate 100 due to the thermal expansion of the diffusion barrier film of the metal 150 and the metal 150 at the interconnections of the metals 150. [ It is possible to perform the function of the expansion absorbing film. In addition, a metal wiring of a semiconductor device having a good electromigration performance and a reduced risk of stress-inducing voids in the copper interconnections can be manufactured through a simple process of adsorbing metal in the organic material layer and filling the pattern into the pattern.

Figures 2A-2E are schematic diagrams of a multi-layer processing (LbL) method according to one embodiment of the present invention.

First, as shown in FIG. 2A, a cleaned substrate 100 is prepared. The cleaning method of the cleaned substrate 100 may be performed through, for example, piranha cleaning (H ₂ SO ₄ : H ₂ O ₂ = 4: 1), but may not be limited thereto. The substrate 100 may be charged with, for example, (-) electric charge, but may not be limited thereto.

Next, as shown in FIG. 2B, the charged organic material layer is laminated on the cleaned substrate 100 in the nature opposite to that of the substrate 100. For example, when the substrate is charged with a negative (-) charge, the organic layer 123 charged with (+) electric charge, which is opposite to that of the substrate 100, can be stacked. For example, the organic layer 123 charged with the (+) electric charge may be selected from the group consisting of PAH [poly (allylaminehydrochloride)], PEI [poly (ethyleneimine)], PDAC [poly (diallyldimethylammonium chloride)], PVTAC [poly (4-vinylbenzyltrimethylammoniumchloride)], , And combinations thereof. However, the present invention is not limited thereto.

Next, as shown in FIG. 2C, an organic layer 125 charged with (-) electric charge having the opposite property is laminated on the substrate 100 on which the organic layer 123 charged with (+) electric charge is formed Or alternatively, the surface of the organic material layer 123 charged with the (+) electric charge may be replaced to laminate the organic material layers having different properties. For example, the organic layer 125 charged with (-) electric charge may be selected from the group consisting of PSS [poly (styrenesulfonate)], PAA [poly (acrylic acid)], polyvinylsulfonic acid (PVS), sulfonated polystyrene But are not limited to, those selected from the group consisting of < RTI ID = 0.0 > For example, the organic material layer of another nature in which the surface of the organic material layer 123 is substituted is formed of PEDOT [poly (3,4-ethylenedioxythiophene)], ferritin (ferrihydritephosphate), poly (melamine- , HMF (5-hydroxymethylfurfural), PGMEA (propyleneglycolmethyletheracetate), PVP [poly (4-vinylphenol)], and combinations thereof.

The organic layer having positive and / or negative charges may be formed by spin coating, dipping coating, roll-to-roll coating, or flow coating, but the present invention is not limited thereto.

2B and 2C, the organic material layer 120 may be formed in a plurality of layers using a multi-layer process (LbL) process, but not limited thereto, as shown in FIGS. 2D and 2E .

Hereinafter, embodiments of the present invention will be described in detail. However, the present invention is not limited thereto.

< Example >

The substrate was immersed in a piranha solution (H ₂ SO ₄ : H ₂ O ₂ = 4: 1) for 15 minutes to clean the substrate. The cleaned substrate was irradiated with ultraviolet rays having a wavelength of 184.9 nm and 53.7 nm for 30 minutes to decompose organic substances and form OH groups on the surface of the substrate.

On the other hand, as the organic material layer, a PAH layer charged with (+) electric charge and a PSS layer charged with (-) electric charge were used. The PAH layer was prepared by diluting 0.05 g of PAH in 50 mL of deionized water to a concentration of 1 mg / mL Respectively. Thereafter, 0.1M NH ₄ OH was added to prepare a PAH solution having a pH of 9 adjusted to pH 9.

The Si substrate was immersed in the PAH solution for 30 minutes to form a PAH layer on the Si substrate, and then the substrate was rinsed with deionized water for 1 minute.

Subsequently, a PSS layer was formed on the substrate on which the PAH layer was formed. The PSS layer was prepared by diluting 0.05 g of the PSS solution with 50 mL of deionized water to a concentration of 1 mg / mL. Thereafter, 0.2M NaCl was added to adjust the pH of the PSS solution to pH 9. After forming a PSS layer on the substrate, the substrate was rinsed with deionized water for 1 minute.

The formation of the PAH and PSS solution and the washing process of the substrate were judged to be one cycle, and the cycle proceeded several times to a desired thickness.

Cu was used as the metal to be adsorbed through the ALD process on the substrate having the organic layer formed to a desired thickness through the multi-layer process (LbL) process. The adsorption time was 10 minutes. The initial Cu precursor injection was performed for 10 seconds, Ar purging for 20 seconds, iodine injection for 5 seconds, and Ar purging for 20 seconds to fill Cu into the pattern of the substrate .

As shown in FIG. 3B, the LbL layer was able to maintain the characteristics of the diffusion barrier layer when the specimen having the Cu filled therein was heat-treated to observe its cross-section.

FIG. 3A is a view showing completion of pattern internal filling of the substrate when copper is deposited on a patterned substrate using the LbL method according to an embodiment of the present invention. FIG. 3B is a graph showing the expansion And Fig.

This makes it possible to form an expansion absorbing film capable of offsetting the impact of the substrate 100 due to the thermal expansion of the diffusion barrier film of the metal 150 and the metal 150 at the interconnections of the metals 150 . In addition, a metal wiring of a semiconductor device having a good electromigration performance and a reduced risk of stress-inducing voids in the copper interconnections is manufactured through a simple process of adsorbing the metal 150 to the organic material layer 120 and filling the pattern into the pattern .

It will be understood by those of ordinary skill in the art that the foregoing description of the embodiments is for illustrative purposes and that those skilled in the art can easily modify the invention without departing from the spirit or essential characteristics thereof. It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive. For example, each component described as a single entity may be distributed and implemented, and components described as being distributed may also be implemented in a combined form.

The scope of the present invention is defined by the appended claims rather than the detailed description, and all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included within the scope of the present invention.

100: substrate
120: organic layer
123: (+) Charged organic material layer
125: (-) Charged organic material layer
150: metal

Claims (18)

Preparing a patterned substrate;
Laminating one or more organic layers on the patterned substrate; And
Adsorbing metal on the organic material layer to fill the pattern of the substrate;
Wherein the expansion absorbing film is formed by a multilayer thin film.
The method according to claim 1,
Wherein the substrate comprises a material selected from the group consisting of silicon wafers, glass, sapphire, polymers, and combinations thereof.
The method according to claim 1,
The pattern formed on the substrate may be a via hole having a size of several nm to several hundreds of nm, a trench width having a size of several nm to several hundreds nm, or a trough (TSV) having a size of several hundred nm to several hundreds of μm silicon via hole. &lt; RTI ID = 0.0 &gt; 11. &lt; / RTI &gt;
The method according to claim 1,
And further comprising a surface treatment of the base material for improving adhesion between the substrate and the organic material layer.
5. The method of claim 4,
Wherein the surface treatment comprises UV irradiation, plasma, catalytic treatment, or self-assembled monolayer treatment.
The method according to claim 1,
Wherein the organic material layer is formed by spin coating, dipping coating, roll-to-roll coating, or flow coating.
The method according to claim 1,
Wherein the one or more organic layers include an organic material layer having an electric charge of a nature opposite to that of the substrate and an organic material layer having a charge of the same nature as the substrate, Production method.
The method according to claim 1,
The organic layer may be selected from the group consisting of PAH [poly (allylamine hydrochloride)], PEI [poly (ethyleneimine)], PDAC [poly (diallyldimethylammoniumchloride)], PVTAC [poly (4-vinylbenzyltrimethylammoniumchloride)], PSS [poly acrylic acid, PVS [poly (vinylsulfonicacid)], SPS (sulfonated polystyrene), PEDOT [poly (3,4-ethylenedioxythiophene)], Ferritin (ferrihydritephosphate), MMF [ hydroxymethylfurfural, propylene glycol methyl ether acetate (PGMEA), poly (4-vinylphenol) PVP, and combinations thereof.
The method according to claim 1,
Wherein a barrier layer for preventing diffusion of the adsorbed metal is further added between the base material and the organic material layer.
10. The method of claim 9,
Wherein the barrier layer comprises a metal film, a metal nitride film, or a metal oxide film.
The method according to claim 1,
Wherein the organic material layer further comprises a surface treatment for improving adhesion between the organic material layer and the adsorbed metal.
12. The method of claim 11,
Wherein the surface treatment is performed by formation of a bonding layer, UV irradiation, plasma, catalytic treatment, or formation of a self-assembled monolayer film.
13. The method of claim 12,
Wherein the bonding layer comprises a metal film, a metal nitride film, or a metal oxide film.
The method according to claim 1,
Wherein the stabilization temperature of the organic material layer is higher than the heat treatment temperature of the metal.
The method according to claim 1,
Wherein the thickness of the organic material layer is thicker than the expanded thickness of the metal after the heat treatment.
The method according to claim 1,
Wherein the organic material layer comprises selectively controlling a material to be deposited in accordance with the surface properties of the organic material layer.
The method according to claim 1,
The adsorption of the metal may be performed by chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), electroplating deposition, electroless plating deposition, Wherein the thin film is formed by using an absorptive method.
The method according to claim 1,
Wherein the metal wiring further comprises a heat treatment for enhancing electrical characteristics of the metal wiring.

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