KR20140094186A - Request processing method of host - Google Patents

Request processing method of host Download PDF

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Publication number
KR20140094186A
KR20140094186A KR1020130006608A KR20130006608A KR20140094186A KR 20140094186 A KR20140094186 A KR 20140094186A KR 1020130006608 A KR1020130006608 A KR 1020130006608A KR 20130006608 A KR20130006608 A KR 20130006608A KR 20140094186 A KR20140094186 A KR 20140094186A
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KR
South Korea
Prior art keywords
request
ways
planes
host
data
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Application number
KR1020130006608A
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Korean (ko)
Inventor
박종순
양우영
이한덕
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삼성전자주식회사
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Priority to KR1020130006608A priority Critical patent/KR20140094186A/en
Publication of KR20140094186A publication Critical patent/KR20140094186A/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605—Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629—Configuration or reconfiguration of storage systems
    • G06F3/0631—Configuration or reconfiguration of storage systems by allocating resources to storage systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/50—Allocation of resources, e.g. of the central processing unit [CPU]
    • G06F9/5005—Allocation of resources, e.g. of the central processing unit [CPU] to service a request

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Human Computer Interaction (AREA)
  • Information Retrieval, Db Structures And Fs Structures Therefor (AREA)

Abstract

A method of processing a request for a host according to an embodiment of the present invention is a method for processing a request for a host to transfer a request to a storage device having a multi-way structure in which a plurality of ways each include a plurality of planes, The method comprising the steps of: fetching initial requests to a pending queue, dividing the initial requests to generate sub-requests, recombining the sub-requests to generate at least one composite request, Device, wherein the sub-request is defined to write data to or read data from one of the plurality of planes, and the composite request is defined to read data from one of the plurality of planes, To write or is defined so as to read data from the plurality of ways.

Description

{REQUEST PROCESSING METHOD OF HOST}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a request processing method, and more particularly, to a request processing method of a host for improving the performance of a storage having a multi-way structure.

Semiconductor memory devices are classified into volatile semiconductor memory devices and non-volatile semiconductor memory devices. The volatile semiconductor memory device has a drawback that the read and write speed is fast but the stored contents are lost when the external power supply is cut off. On the other hand, the nonvolatile semiconductor memory device preserves its contents even if the external power supply is interrupted. Therefore, a nonvolatile semiconductor memory device is used to store contents to be stored regardless of whether power is supplied or not.

Among the nonvolatile memories, the flash memory is widely used for computers, memory cards and the like because it has a function of electrically erasing cell data collectively. This is due to features such as fast processing speed, nonvolatility, low power and durability of flash memory.

Accordingly, a storage device composed of a plurality of NAND flash chips and a control device has been attracting attention as a next generation storage device, and a storage having a multi-way structure including a plurality of flash memory chips is being developed. Therefore, performance improvement of a storage having a multi-way structure becomes an issue.

An object of the present invention is to provide a method of processing a request for a host to improve the performance of a storage having a multi-way structure.

A method of processing a request for a host according to an embodiment of the present invention is a method for processing a request for a host to transfer a request to a storage device having a multi-way structure in which a plurality of ways each include a plurality of planes, The method comprising the steps of: fetching initial requests to a pending queue, dividing the initial requests to generate sub-requests, recombining the sub-requests to generate at least one composite request, Device, wherein the sub-request is defined to write data to or read data from one of the plurality of planes, and the composite request is defined to read data from one of the plurality of planes, To write or is defined so as to read data from the plurality of ways.

In one embodiment, the sub-requests may be defined to read or write data on a page unit constituting the plane.

In one embodiment, the composite request may be defined to operate the plurality of ways in parallel.

In one embodiment, the composite request can be defined to write data to the planes included in different ways among the plurality of ways or to read data from the planes included in different ways.

In one embodiment, the composite request may be defined to operate the plurality of planes in parallel.

In one embodiment, the composite request may be defined to write data to the planes included in the same way among the plurality of ways, or to read data from the planes included in the same way.

In one embodiment, the composite request may be defined to write to or read from the storage device a positive amount of data defined as a product of a page size, a number of ways, and a number of planes that make up the plane .

In one embodiment, step (d) may concurrently deliver the composite request to the plurality of ways.

In one embodiment, the storage device may be an eMMC.

In one embodiment, the storage device may be a solid state drive (SSD).

The host's request processing method according to embodiments of the present invention can improve the performance of a storage having a multi-way structure.

1 is a block diagram illustrating a storage system in accordance with an embodiment of the present invention.
2 is a flowchart illustrating a method of processing a request of a host of a storage system according to an embodiment of the present invention.
3 is a schematic diagram for explaining the step S110 of FIG.
4 is a schematic view for explaining steps S120 and S130 of FIG.
FIG. 5 is a block diagram illustrating the storage system of FIG. 1 in more detail.
6 is a block diagram illustrating a computing system in accordance with an embodiment of the present invention.

It is to be understood that the specific structural or functional descriptions of embodiments of the present invention disclosed herein are only for the purpose of illustrating embodiments of the inventive concept, But may be embodied in many different forms and is not limited to the embodiments set forth herein.

Embodiments in accordance with the concepts of the present invention are capable of various modifications and may take various forms, so that the embodiments are illustrated in the drawings and described in detail herein. It should be understood, however, that it is not intended to limit the embodiments according to the concepts of the present invention to the particular forms disclosed, but includes all modifications, equivalents, or alternatives falling within the spirit and scope of the invention.

 BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a request processing method, and more particularly, to a request processing method of a host for improving the performance of a storage having a multi-way structure. Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings, so that those skilled in the art can easily carry out the technical idea of the present invention. .

1 is a block diagram illustrating a storage system in accordance with an embodiment of the present invention.

Referring to FIG. 1, a storage system 100 according to an embodiment of the present invention may include a host 110 and a storage device 120.

The host 110 controls the operation of the storage device 120. To this end, the host 110 transmits a request to the storage device 120. [ The request may originate from various applications executed by the host 110. The request may be, for example, a data read request or a data write request. That is, the host 110 writes data to the storage device 120 or reads data from the storage device 120 based on an internally generated request.

The storage device 120 operates based on a request transmitted from the host 110. [ The storage device 120 may be, for example, a NAND flash memory. The storage device 120 may have a multi-way structure. The multi-way structure can be understood as a structure in which each way includes a plurality of planes. The storage device 120 in FIG. 1 illustratively includes two ways 121 and 122 and the ways 121 and 122 are shown to include two planes 121a, 121b, 122a, and 122b, respectively . Thus, the storage device 120 can process data corresponding to four pages at a time. It should be understood, however, that the number of ways 121, 122 and the planes 121a, 121b, 122a, 122b are not limited thereto.

According to one embodiment of the present invention, the host 110 may operate a plurality of ways 121 and 122 in parallel. That is, the host 110 may process requests generated from applications to write data to the plurality of ways 121 and 122 of the storage device 120 or to read data from the plurality of ways 121 and 122 . The operation of writing data to the plurality of ways 121 and 122 or reading data from the plurality of ways 121 and 122 can be performed simultaneously. Thus, the performance of the storage device 120 can be improved. This will be described in more detail with reference to Figs. 2 to 4 below.

2 is a flowchart illustrating a method of processing a request of a host of a storage system according to an embodiment of the present invention. 3 is a schematic diagram for explaining the step S110 of FIG. 4 is a schematic view for explaining steps S120 and S130 of FIG.

Referring to FIG. 2, a method of processing a request of a host 110 of a storage system 100 according to an embodiment of the present invention includes initializing requests generated from applications to a pending queue (S110) of generating sub-requests, generating sub-requests by dividing initial requests (S120), and generating at least one complex-request by reassembling the sub-requests S130), and transferring at least one composite request to the storage device (S140).

In the following, step S110 will be described in detail with reference to Fig.

Referring to FIG. 3, in step S110, the host 110 may store initial requests generated from applications in a dispatch queue (A). In the dispatch queue A, initial requests to be generated will be sequentially stored.

The initial request can mean a small size request. In addition, the initial request may have a random address pattern. For example, a small size request may refer to a request having a size smaller than a request that can be processed at one time using a multi-plane operation or a way interleaving. The multiple plane operation and the way interleaving are well known in the art, so a detailed description will be omitted.

For example, Write (2, 3) may mean a data write request for pages 2 and 3 of logical addresses (Logical Address). Write (0, 1) may mean a data write request to the logical address 0, page 1. Read (5) may refer to a data read request for page 5 of logical address.

The host 110 may fetch the initial requests stored in the dispatch queue A into the pending queue B. [ For example, the host 110 may fetch a plurality of initial requests (e.g. Write (2, 3), Read (5), Write (0, 1) .

Hereinafter, steps S120 to S140 will be described in detail with reference to Fig.

4, the host 110 may transmit write requests (Write (0, 1), Write (2, 3)) among the initial requests stored in the pending queue B to the unit list C . However, the order in which the host 110 transfers the initial request to the unit list C is exemplary only, and the host 110 can forward the read request (Read (5)) to the unit list C first . Hereinafter, it is assumed that the initial requests (Write (0, 1), Write (2, 3)) are transmitted to the unit list C first.

The unit list C can generate sub-requests by dividing initial requests (Write (0, 1), Write (2, 3)).

A sub-request can be understood as a request which is defined to write data to one of a plurality of planes or to read data from one of the planes. In one aspect, a sub-request can be defined as a request in which data is read / written on a page-by-page basis.

For example, the unit 1 may divide the initial request (Write (0, 1)) into a sub-request for the logical address 0-th page and a sub-request for the logical address 1-th page, respectively. For example, unit 2 may split the initial request (Write (2, 3)) into a sub-request for the logical address second page and a sub-request for the logical address third page, respectively.

The unit list C may recombine sub-requests to generate at least one composite request. Specifically, the sub-requests generated from the unit 1 and the unit 2 can be integrated into the unit node of the unit 0 to generate one combined request.

The composite request can be understood as a request defined to write data to the plurality of ways 121 and 122 or to read data from the plurality of ways 121 and 122. In one aspect, the composite request can be understood as a request defined to operate a plurality of ways 121, 122 in parallel. In one aspect, a composite request can be understood as a request defined to operate a plurality of planes 121a, 121b, 122a, 122b in parallel. For example, the generated composite request may include a data write request for logical address 0, 1, 2, and 3 pages.

In addition, for example, a multiple request can be defined to simultaneously write data to planes included in different ways among a plurality of ways, or simultaneously read data from planes included in different ways. In another aspect, a composite request may be defined to write data to the planes included in the same way among the plurality of ways, or to read data from the planes included in the same way.

On the other hand, the composite request generated in unit 0 is illustrated as being generated to simultaneously process data corresponding to four logical pages, for example. However, the composite request is not limited to this, and it is also possible to write the positive data defined as the product of the page size, the number of ways, and the number of planes included in the way simultaneously to the storage device 120, It should be understood that it is defined to be readable. That is, in this embodiment, 32 Kbytes of data defined by the product of the page size (8 Kbytes), the number of ways (2), and the number of planes (2) can be processed at the same time.

In step S140, the host 110 may transmit the generated at least one composite request to the storage device 120. [ The host 110 can simultaneously deliver the generated composite request to the storage device 120. [

Each of the planes 121a, 121b, 122a, and 122b included in the way 121 and 122 of the storage device 120 can perform a programming operation concurrently or sequentially based on the transferred composite request.

As described above, in the request processing method of a host according to an embodiment of the present invention, sub-requests can be recombined to generate at least one combined request. Therefore, in the request processing method of the host according to the embodiment of the present invention, the plurality of ways 121 and 122 can be operated in parallel through the generated combined request. Thus, the performance of the storage device 120 can be improved.

FIG. 5 is a block diagram illustrating the storage system of FIG. 1 in more detail.

5, a storage system 1000 according to the present invention may include a host 1100, a nonvolatile memory device 1300, and a memory controller 1200 on which a file system (FS) is mounted. The memory controller 1200 will be configured to control the non-volatile memory device 1300. [ That is, it will be understood that the non-volatile memory device 1300 and the memory controller 1200 constitute the storage device 120 shown in FIG. For example, a combination of the nonvolatile memory device 1300 and the memory controller 1200 may be provided as a memory card (eMMC) or a solid state disk (SSD).

The initial request of the host 1100 may occur according to the user's command through the user interface or upon the request of the application. The host 1100 may be configured as described with reference to Figs. 1 to 4, and thus a detailed description thereof will be omitted.

The memory controller 1200 programs the data to be transferred in the nonvolatile memory device 1300 in response to a composite request (for example, a write request) transmitted from the host 1100. [ SRAM 1210 is used as the operating memory of the processing unit 1220. The host interface 1230 includes a data exchange protocol of the host 110. The error correction block 1240 detects and corrects errors contained in data read from the non-volatile memory device 1300. The memory interface 1250, Volatile memory device 1300. The processing unit 1220 performs all control operations for data exchange of the memory controller 1200. Although not shown in the figure, the storage system 1000 includes a host It will be apparent to those skilled in the art that a ROM (not shown) for storing code data for interfacing with a host (not shown) may be further provided. As described with reference to FIG.

The storage system 1000 can write data to the nonvolatile memory device 1300 at a high speed when a request (for example, a write request) of the host 1100 occurs. Accordingly, the storage system 1000 can be provided as a storage medium having a high capacity and high reliability. A file system and a flash conversion layer (FTL) can be mounted in a storage system such as a solid state disk (SSD) that has been actively studied recently. In this case, the memory controller 1200 is configured to communicate with an external (e.g., host) through one of a variety of interface protocols such as USB, MMC, PCI-E, SATA, PATA, SCSI, ESDI, will be. Also, the host 1100 and the memory controller 1200 are described as devices in which the file system FS and the flash translation layer FTL are driven, respectively, but the present invention is not limited thereto. For advancement and efficiency of the technology, the driving area of the file system (FS) and the flash conversion layer (FTL) may not be limited to any one.

A non-volatile memory device, in particular a flash memory device, can maintain stored data even when power is turned off. With the increasing use of mobile devices such as cellular phones, PDA digital cameras, portable game consoles, and MP3Ps, flash memory devices are widely used as code storage as well as data storage. Flash memory devices can also be used in home applications such as HDTV, DVD, routers, and GPS.

6 is a block diagram illustrating a computing system in accordance with an embodiment of the present invention.

6, a computing system 2000 includes a microprocessor 2200, a RAM 2300, a user interface 2400, a modem 2500 such as a baseband chipset, And a memory system 2100. The memory system 710 may be configured (including the memory controller 1200 and the non-volatile memory device 1300 of FIG. 5) substantially the same as that shown in FIG.

If the computing system 2000 is a mobile device, a battery (not shown) for supplying the operating voltage of the computing system will additionally be provided. Although it is not shown in the drawing, it is possible to provide an application chipset, a camera image processor (CIS), a mobile DRAM, and the like in the computing system 2000 according to the present invention. It is obvious to those who have acquired knowledge. The memory system 2100 can constitute, for example, a solid state drive / disk (SSD) using nonvolatile memory for storing data.

The flash memory device and / or memory controller according to the present invention may be implemented using various types of packages. For example, the flash memory device and / or the memory controller according to the present invention can be implemented as a package on package (PoP), ball grid arrays (BGAs), chip scale packages (CSPs), plastic leaded chip carriers (PLCC) Linear Package (PDIP), Die in Waffle Pack, Die in Wafer Form, Chip On Board (COB), Ceramic Dual In-Line Package (CERDIP), Plastic Metric Quad Flat Pack (MQFP), Thin Quad Flatpack (SOIC), Shrink Small Outline Package (SSOP), Thin Small Outline (TSOP), Thin Quad Flatpack (TQFP), System In Package (SIP), Multi Chip Package (MCP), Wafer-level Fabricated Package Wafer-Level Processed Stack Package (WSP), and the like.

While the invention has been shown and described with reference to certain preferred embodiments thereof, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention. Therefore, the scope of the present invention should not be limited to the above-described embodiments, but should be determined by the equivalents of the claims of the present invention as well as the claims of the following.

100, 1000: storage system 2000: computer system
110, 1100: host 2100: memory system
120: storage device 2200: CPU
121, 122: Way 2300: RAM
121a, 121b, 122a, 122b: plane 2400: user interface
1200: Memory Controller 2500: Modem
1210: SRAM
1220: CPU
1230: Host interface
1240: ECC
1250: Memory interface
1300: Nonvolatile memory device

Claims (10)

A method of processing a request for a host to transfer a request to a storage device having a multi-way structure in which a plurality of ways each include a plurality of planes, the method comprising:
Fetching initial requests generated from applications into a pending queue;
Dividing the initial requests into sub-requests;
Reassembling the sub-requests to generate at least one composite request; And
And forwarding the at least one composite request to the storage device,
Wherein the sub-request is defined to write data to one of the plurality of planes or to read data from the one of the plurality of planes,
Wherein the composite request is defined to write data to the plurality of ways or to read data from the plurality of ways. The method according to claim 1,
Wherein the sub-requests are defined to read or write data in units of pages constituting the plane. The method according to claim 1,
Wherein the combined request is defined to operate the plurality of ways in parallel. The method of claim 3,
Wherein the composite request is defined to write data to planes included in different ways among the plurality of ways or to read data from planes included in different ways. The method according to claim 1,
Wherein the combined request is defined to operate the plurality of planes in parallel. 6. The method of claim 5,
Wherein the composite request is defined to write data to the planes included in the same way among the plurality of ways or to read data from the planes included in the same way. The method according to claim 1,
Wherein the composite request is defined to write to or read from the storage device positive data defined by a product of a page size, a number of ways, and a number of planes constituting the plane. The method according to claim 1,
Wherein the step of transferring the at least one composite request to the storage device simultaneously delivers the composite request to the plurality of ways. The method according to claim 1,
Wherein the storage device is an eMMC. The method according to claim 1,
Wherein the storage device is a solid state drive (SSD).
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11029893B2 (en) 2017-09-08 2021-06-08 Samsung Electronics Co., Ltd. Storage device including nonvolatile memory device and controller, controller and operating method of nonvolatile memory device
US11842076B2 (en) 2021-03-29 2023-12-12 Samsung Electronics Co., Ltd. Storage system and operating method for same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11029893B2 (en) 2017-09-08 2021-06-08 Samsung Electronics Co., Ltd. Storage device including nonvolatile memory device and controller, controller and operating method of nonvolatile memory device
US11693605B2 (en) 2017-09-08 2023-07-04 Samsung Electronics Co., Ltd. Storage device including nonvolatile memory device and controller, controller and operating method of nonvolatile memory device
US11842076B2 (en) 2021-03-29 2023-12-12 Samsung Electronics Co., Ltd. Storage system and operating method for same

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