KR20140080283A - Semiconductor Memory Apparatus - Google Patents

Semiconductor Memory Apparatus Download PDF

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Publication number
KR20140080283A
KR20140080283A KR1020120149909A KR20120149909A KR20140080283A KR 20140080283 A KR20140080283 A KR 20140080283A KR 1020120149909 A KR1020120149909 A KR 1020120149909A KR 20120149909 A KR20120149909 A KR 20120149909A KR 20140080283 A KR20140080283 A KR 20140080283A
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KR
South Korea
Prior art keywords
pumping
bank
signal
oscillator signal
standby
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KR1020120149909A
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Korean (ko)
Inventor
임희준
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에스케이하이닉스 주식회사
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Priority to KR1020120149909A priority Critical patent/KR20140080283A/en
Publication of KR20140080283A publication Critical patent/KR20140080283A/en

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4074—Power supply or voltage generation circuits, e.g. bias voltage generators, substrate voltage generators, back-up power, power control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Dram (AREA)

Abstract

A semiconductor memory device comprises a pumping control unit for generating a refresh signal, a stand-by oscillator signal in response to a plurality of bank enable signals, and an active oscillator signal; and a pumping unit for generating a pumping voltage in response to the stand-by oscillator signal and the active signal.

Description

[0001] Semiconductor Memory Apparatus [0002]

The present invention relates to a semiconductor integrated circuit, and more particularly, to a semiconductor memory device.

The semiconductor device is configured to store the input data and output the stored data. A semiconductor device includes a memory cell composed of a transistor and a capacitor for storing data. At this time, the semiconductor device includes a plurality of banks each including a plurality of memory cells.

A general semiconductor device thus configured is configured to charge the capacitor and store data. When a capacitor is charged, that is, when data is stored, charge is applied to the capacitor through the transistor connected to the capacitor. At this time, the pumping voltage is used to turn on the transistor to reduce the loss of charge through the transistor.

A typical semiconductor device includes first to eighth banks 11 to 18, a pumping control section 21, and first and second pumping sections 22 and 23 as shown in Fig.

The first to fourth banks 11 to 14 are activated by receiving the first pumping voltage VPP_1. At this time, the activation of the bank means that the word line included in the bank is enabled, and the enabled word line turns on the transistor included in the memory cell. The word line is enabled to a pumping voltage level.

The fifth to eighth banks 15 to 18 are activated by receiving the second pumping voltage VPP_2.

The pumping control unit 21 outputs an oscillator signal OSC and an active pump enable signal EN_actpump when one bank enable signal of the first to eighth bank enable signals Bank_en <0: 7> is enabled, . At this time, the first to eighth bank enable signals (Bank_en <0: 7>) are signals input to enable one of the first to eighth banks.

The first pumping unit 22 generates the first pumping voltage VPP_ 1 in response to the oscillator signal OSC and the ACTIVE pump enable signal EN_actpump.

The second pumping unit 23 generates the second pumping voltage VPP_2 in response to the oscillator signal OSC and the active pump enable signal EN_actpump.

The first pumping portion 22 includes a standby pump 22_1 and an active pump 22_2, as shown in FIG.

The standby pump 22_1 generates the first pumping voltage VPP_1 in response to the oscillator signal OSC.

The active pump 22_2 generates the first pumping voltage VPP_1 in response to the oscillator signal OSC when the active pump enable signal EN_actpump is enabled.

The second pumping portion 23 is also configured the same as the first pumping portion 22.

In the general semiconductor device thus configured, first and second pumping voltages VPP_1 and VPP_2 applied to all eight banks are generated even if only one of the eight banks 11 to 18 is active.

A semiconductor device consumes a large amount of power because a pumping voltage applied to all the banks is generated even if one bank of the plurality of banks provided in the semiconductor device is activated.

The present invention provides a semiconductor device that divides a plurality of banks into groups and provides a pumping voltage only to a group to which an activated bank belongs.

A semiconductor device according to an embodiment of the present invention includes a pumping control unit for generating a refresh signal, a standby oscillator signal and an active oscillator signal in response to a plurality of bank enable signals, and a pumping control unit for, in response to the standby oscillator signal and the active signal, And a pumping section for generating a pumping section.

A semiconductor device according to another embodiment of the present invention includes a first bank group including a first bank, a second bank, a third bank, and a fourth bank, a fifth bank, a sixth bank, a seventh bank, A first pumping voltage generator for generating a first pumping voltage and applying the generated first pumping voltage to the first bank group if one of the banks of the first bank group is enabled, A second pumping voltage generator for generating a second pumping voltage and applying the second pumping voltage to the second bank group.

The semiconductor device according to the present invention can reduce the power consumption by dividing the plurality of banks into groups and providing the pumping voltage only to the group to which the activated bank belongs.

1 is a schematic view of a general semiconductor device,
Fig. 2 is a configuration diagram of the first pumping unit of Fig. 1,
3 is a configuration diagram of a semiconductor device according to an embodiment of the present invention,
4 is a configuration diagram of the first pumping control unit of FIG. 3,
5 is a configuration diagram of the active oscillator signal generator of FIG. 4,
FIG. 6 is a configuration diagram of the first pumping portion in FIG. 3; FIG.

3, the semiconductor device according to the embodiment of the present invention includes first through eighth banks 11, 12, 13, 14, 15, 16, 17, 18, a first pumping voltage generator 100 And a second pumping voltage generator 200. At this time, the first to fourth banks 11 to 14 receiving the output of the first pumping voltage generator 100, that is, the first pumping voltage VPP_1 are referred to as a first bank group 300, The output of the pumping voltage generator 200, that is, the second pumping voltage VPP_2 is divided into a second bank group 400 to which the second pumping voltage VPP_2 is applied.

The first pumping voltage generator 100 generates the first pumping voltage VPP_1 when one of the banks 11 to 14 of the first bank group 300 is enabled, To the group (300). The first pumping voltage generator 100 provides the first pumping voltage VPP_1 to the first bank group 300 during a refresh operation. For example, the first pumping voltage generator 100 may enable either one of the banks 11 to 14 of the first bank group 300 or the first pumping voltage VPP_1 during a refresh operation, And generates the first pumping voltage VPP_1 in response to the first active oscillator signal OSC_act1 and the first standby oscillator signal OSC_sb1 when the voltage level is lower than the set voltage level. The first pumping voltage generator 100 may be configured such that when the banks 11 through 14 of the first bank group 300 are neither disabled nor are refresh operations, And generates the first pumping voltage VPP_1 in response to the first standby oscillator signal OSC_sb1.

The first pumping voltage generator 100 includes a first pumping controller 110, and a first pumping unit 120.

The first pumping controller 110 outputs the refresh signal Ref_signal and the first to fourth bank enable signals Bank_en <0: 3> when the voltage level of the first pumping voltage VPP_1 becomes lower than the set voltage level, Generates both the first active oscillator signal OSC_act1 and the first standby oscillator signal OSC_sb1 in response to the first standby oscillator signal OSC_sb1 or generates only the first standby oscillator signal OSC_sb1. In this case, the first bank enable signal Bank_en <0> is a signal for activating the first bank 11, and the second bank enable signal Bank_en <1> The third bank enable signal Bank_en <2> is a signal for activating the third bank 13 and the fourth bank enable signal Bank_en <3> And activates the bank 14. For example, when the voltage level of the first pumping voltage VPP_1 becomes lower than the set voltage level, the first pumping control unit 110 outputs the refresh signal Ref_signal and the first to fourth bank enable signals Bank_en <0: 3>), all of the first active oscillator signal OSC_act1 and the first standby oscillator signal OSC_sb1 are generated. When the voltage level of the first pumping voltage VPP_1 is equal to or lower than a preset voltage level, the first pumping unit 110 outputs the refresh signal Ref_signal and the first to fourth bank enable signals Bank_en <0: 3 > Are all disabled, it generates only the first standby oscillator signal OSC_sb1.

When the first pumping controller 110 generates the first active oscillator signal OSC_act1 and the first standby oscillator signal OSC_sb1, the voltage level of the first pumping voltage VPP_1 becomes a set voltage level And generates the first active oscillator signal OSC_act1 and the first standby oscillator signal OSC_sb1 that transition periodically if the voltage level of the first pumping voltage VPP_1 is equal to or higher than a set voltage level, The active oscillator signal OSC_act1, and the first standby oscillator signal OSC_sb1 to a certain level.

The first pumping controller 110 includes a voltage level detector 111, an oscillator 112, and an active oscillator signal generator 113, as shown in FIG.

The voltage level sensing unit 111 enables the oscillator enable signal OSC_en when the voltage level of the first pumping voltage VPP_1 becomes equal to or lower than the set voltage level. For example, the voltage level sensing unit 111 compares the voltage level of the first pumping voltage VPP_1 with the voltage level of the reference voltage Vref to determine whether the first pumping voltage VPP_1 is higher than the reference voltage Vref Vref, the oscillator enable signal OSC_en is enabled.

The oscillator 112 generates the first standby oscillator signal OSC_sb1 that periodically transitions when the oscillator enable signal OSC_en is enabled and when the oscillator enable signal OSC_en is disabled, And fixes the standby oscillator signal OSC_sb1 to a certain level.

The active oscillator signal generator 113 generates the first standby oscillator signal (Bank_en <0: 3>) and the refresh signal (Ref_signal) when the first to fourth bank enable signals Bank_en < OSC_sb1 as the first active oscillator signal OSC_act1.

The active oscillator signal generator 113 includes a control signal generator 113-1 and an output controller 113-2 as shown in FIG.

The control signal generator 113-1 generates a control signal ctrl when one of the first to fourth bank enable signals Bank_en <0: 3> and the refresh signal Ref_signal is enabled . The control signal generator 113-1 generates the control signal ctrl when the first to fourth bank enable signals Bank_en <0: 3> and the refresh signal Ref_signal are both disabled Disable.

The control signal generator 113-1 includes a NOR gate NOR11 and a first inverter IV11. The first NOR gate NOR11 receives the first through fourth bank enable signals Bank_en <0: 4> and the refresh signal Ref_signal. The first inverter IV11 receives the output signal of the first NOR gate NOR11 and outputs the control signal ctrl.

The output control unit 113-2 outputs the first standby oscillator signal OSC_sb1 as the first active oscillator signal OSC_act1 when the control signal ctrl is enabled and the control signal ctrl is set to And fixes the first active oscillator signal (OSC_act1) to a certain level when it is enabled.

The output control section 113-2 includes a NAND gate ND11 and a second inverter IV12. The NAND gate ND11 receives the first standby oscillator signal OSC_sb1 and the control signal ctrl. The second inverter IV12 receives the output of the NAND gate ND11 and outputs the first active oscillator signal OSC_act1.

The first pumping unit 120 of the first pumping voltage generator 100 shown in FIG. 3 includes a standby pump 121 and an active pump 122, as shown in FIG.

The standby pump 121 performs a pumping operation in response to the first standby oscillator signal OSC_sb1 and generates the first pumping voltage VPP_1 through a pumping operation. For example, the standby pump 121 performs a pumping operation when the first standby oscillator signal OSC_sb1 periodically transitions, and when the first standby oscillator signal OSC_sb1 is a signal fixed to a specific level The pumping operation is not performed.

The active pump 122 performs a pumping operation in response to the first active oscillator signal OSC_act1 and generates the first pumping voltage VPP_1 through a pumping operation. For example, the active pump 122 performs a pumping operation when the first active oscillator signal OSC_act1 periodically transitions, and when the first active oscillator signal OSC_act1 is a fixed-level signal The pumping operation is not performed.

The second pumping voltage generator 200 generates the second pumping voltage VPP_2 when one of the banks 15-18 of the second bank group 400 is enabled, To the group (400). The second pumping voltage generator 200 provides the second pumping voltage VPP_2 to the second bank group 400 during a refresh operation. For example, the second pumping voltage generator 200 may enable either a bank of the banks 15-18 of the second bank group 400 or the second pumping voltage VPP_2 during a refresh operation, And generates the second pumping voltage VPP_2 in response to the second active oscillator signal OSC_act2 and the second standby oscillator signal OSC_sb2 when the voltage level is lower than the set voltage level. When the banks 15 to 18 of the second bank group 400 are neither disabled nor refreshed, the second pumping voltage generator 200 generates the second pumping voltage VPP_2 at a set voltage level And generates the second pumping voltage VPP_2 in response to the second standby oscillator signal OSC_sb2.

The second pumping voltage generator 200 includes a second pumping controller 210 and a second pumping unit 220.

The second pumping control unit 210 outputs the refresh signal Ref_signal and the fifth to eighth bank enable signals Bank_en <4: 7> when the voltage level of the second pumping voltage VPP_2 becomes lower than the set voltage level, Generates both the second active oscillator signal OSC_act2 and the second standby oscillator signal OSC_sb2 in response to the first standby oscillator signal OSC_sb2 or generates only the second standby oscillator signal OSC_sb2. The fifth bank enable signal Bank_en <4> is a signal for activating the fifth bank 15 and the sixth bank enable signal Bank_en <5> is a signal for activating the sixth bank 16, The seventh bank enable signal Bank_en <6> is a signal for activating the seventh bank 17 and the eighth bank enable signal Bank_en <7> And activates the bank 18. For example, when the voltage level of the second pumping voltage VPP_2 becomes lower than the set voltage level, the second pumping control unit 210 outputs the refresh signal Ref_signal and the fifth to eighth bank enable signals Bank_en <4: 7>), it generates both the second active oscillator signal OSC_act2 and the second standby oscillator signal OSC_sb2 when enabled. When the voltage level of the second pumping voltage VPP_2 is equal to or lower than the set voltage level, the second pumping unit 210 outputs the refresh signal Ref_signal and the fifth to eighth bank enable signals Bank_en <4: 7 > Are all disabled, it generates only the second standby oscillator signal OSC_sb2.

Meanwhile, when the second pumping control unit 210 generates the second active oscillator signal OSC_act2 and the second standby oscillator signal OSC_sb2, the voltage level of the second pumping voltage VPP_2 becomes a set voltage level And generates the second active oscillator signal OSC_act2 and the second standby oscillator signal OSC_sb2 that periodically transition if the voltage level of the second pumping voltage VPP_2 is equal to or greater than a set voltage level, The active oscillator signal OSC_act2, and the second standby oscillator signal OSC_sb2 to a certain level.

The second pumping control unit 210 includes a voltage level sensing unit 111, an oscillator 112, and an active oscillator signal generating unit 113, as in the first pumping control unit 110 shown in FIG. . However, only the input signal and the output signal are different. The configuration of the second pumping controller 210 is replaced with a description of the configuration of the first pumping controller 110.

The second pumping unit 220 of the second pumping voltage generator 200 shown in FIG. 3 has the same configuration as that of the first pumping unit 220 shown in FIG. However, only the input signal and the output signal are different.

6), and an active pump (not shown, for example, the active pump 122 of FIG. 6) and a second pump (not shown, for example) ).

The standby pump of the second pumping unit 220 performs a pumping operation in response to the second standby oscillator signal OSC_sb2 and generates the second pumping voltage VPP_2 through a pumping operation. For example, the standby pump performs a pumping operation when the second standby oscillator signal OSC_sb2 periodically transitions, and performs a pumping operation if the second standby oscillator signal OSC_sb2 is a fixed level signal. Do not perform.

The active pump of the second pumping unit 220 performs a pumping operation in response to the second active oscillator signal OSC_act2 and generates the second pumping voltage VPP_2 through a pumping operation. For example, the active pump performs a pumping operation when the second active oscillator signal OSC_act2 periodically transitions, and performs a pumping operation if the second active oscillator signal OSC_act2 is a fixed-level signal. Do not perform.

The operation of the semiconductor device according to the embodiment of the present invention will now be described.

Referring to FIG. 3, the first pumping voltage generator 100 performs a pumping operation when the voltage level of the first pumping voltage VPP_1 is lower than the set voltage level, VPP_1) to the first bank group (300). Here, the first bank group 300 includes first to fourth banks 11 to 14, and the first pumping voltage VPP_1 is provided to the first to fourth banks 11 to 14 .

Also, the first pumping voltage generator 100 does not perform a pumping operation when the first pumping voltage VPP_1 is equal to or higher than a set voltage level.

More specifically, when the first to fourth banks 11 to 14 are not activated and the refresh operation is not performed, that is, when the first to fourth banks 11 to 14 are not activated, The first active oscillator signal OSC_act1 and the first standby oscillator signal OSC_act1 are turned off when the first pumping voltage VPP_1 is equal to or higher than the set level when all the enable signals Bank_en <0: 3> are disabled and the refresh signal Ref_signal is disabled, And fixes the oscillator signal OSC_sb1 to a certain level. Therefore, the first pumping voltage generator 100 does not perform the pumping operation.

When the first to fourth banks 11 to 14 are not activated and the refresh operation is not performed, the first pumping voltage generator 100 generates the first to fourth bank enable signals < RTI ID = 0.0 > Bank_en <0: 3> are all disabled and the refresh signal Ref_signal is disabled, the first active oscillator signal OSC_act1 is set to a certain level when the first pumping voltage VPP_1 is below the set voltage level And generates the signal that periodically transitions the first standby oscillator OSC_sb1. The standby pump 121 of the first pumping unit 120 performs a pumping operation to generate the first pumping voltage VPP_1 and the active pump 122 of the first pumping unit 120 performs a pumping operation . That is, when the first to fourth bank enable signals Bank_en <0: 3> are all disabled and the refresh signal Ref_signal is disabled, the first pumping voltage generator 100 generates the first pumping voltage The first pumping voltage VPP_1 is lower than the set voltage level in response to the first standby oscillator signal OSC_sb1 of the first active oscillator signal OSC_act1 and the first standby oscillator signal OSC_sb1, ).

Also, the first pumping voltage generator 100 may enable either one of the bank enable signals (Bank_en <0: 3>) of the first to fourth bank enable signals or the refresh signal Ref_signal OSC_act1 and the first standby oscillator signal OSC_sb1 when the voltage level of the first pumping voltage VPP_1 is lower than the set voltage level. Therefore, both the standby pump 121 and the active pump 122 of the first pumping unit 120 perform the pumping operation to generate the first pumping voltage VPP_1.

On the other hand, the first pumping voltage generator 100 may enable either one of the bank enable signals (Bank_en <0: 3>) of the first to fourth bank enable signals or the refresh signal Ref_signal The first active oscillator signal OSC_act1 and the first standby oscillator signal OSC_sb1 are all fixed to a specific level when the voltage level of the first pumping voltage VPP_1 is equal to or higher than the set voltage level. Accordingly, the first pumping unit 120 does not perform the pumping operation.

The second pumping voltage generator 200 performs a pumping operation when the voltage level of the second pumping voltage VPP_2 is equal to or lower than the set voltage level to cause the second pumping voltage VPP_2, To the group (400). At this time, the second bank group 400 includes the fifth to eighth banks 15 to 18, and the second pumping voltage VPP_2 is provided to the fifth to eighth banks 15 to 18 .

Also, the second pumping voltage generator 200 does not perform the pumping operation when the second pumping voltage VPP_2 is equal to or higher than the set voltage level.

More specifically, when the fifth to eighth banks 15 to 18 are not activated and the refresh operation is not performed, that is, the fifth to eighth banks 15 to 18 are not activated, The second active oscillator signal OSC_act2 and the second active oscillator signal OSC_act2 when the second pumping voltage VPP_2 is equal to or higher than the set level when all the enable signals Bank_en <4: 7> are disabled and the refresh signal Ref_signal is disabled, Thereby fixing the standby oscillator signal OSC_sb2 to a certain level. Therefore, the second pumping voltage generator 200 does not perform the pumping operation.

Meanwhile, when the fifth to eighth banks 15 to 18 are not activated and the refresh operation is not performed, that is, the fifth to eighth bank enable signals Bank_en <4: 7> are all disabled and the refresh signal Ref_signal is disabled, if the second pumping voltage VPP_2 is below the set voltage level, the second active oscillator signal OSC_act2 is set to a certain level And generates a signal that periodically transitions the second standby oscillator OSC_sb2. Accordingly, the standby pump (not shown) of the second pumping unit 220 performs the pumping operation to generate the second pumping voltage VPP_2, and the active pump (not shown) of the second pumping unit 220 The pumping operation is not performed. That is, when the fifth to eighth bank enable signals Bank_en <4: 7> are all disabled and the refresh signal Ref_signal is disabled, the second pumping voltage generator 200 generates the second pumping voltage If the pumping voltage VPP_2 is less than the set voltage level, the second pumping voltage VPP_2 in response to the second standby oscillator signal OSC_sb2 of the second active oscillator signal OSC_act2 and the second standby oscillator signal OSC_sb2, ).

Also, the second pumping voltage generator 200 may enable either the bank enable signal of the fifth to eighth bank enable signals Bank_en <4: 7> or the refresh signal Ref_signal of the fifth to eighth bank enable signals Bank_en < OSC_act2 and the second standby oscillator signal OSC_sb2 when the voltage level of the second pumping voltage VPP_2 is equal to or lower than the set voltage level. Accordingly, the standby pump (not shown) and the active pump (not shown) of the second pumping unit 220 both perform a pumping operation to generate the second pumping voltage VPP_2. That is, the first pumping unit 220 generates the second pumping voltage VPP_2 in response to both the second active oscillator signal OSC_act2 and the second standby oscillator signal OSC_sb2.

Meanwhile, the second pumping voltage generator 200 may enable either one of the bank enable signals (Bank_en <4: 7>) and the refresh signal Ref_signal The second active oscillator signal OSC_act2 and the second standby oscillator signal OSC_sb2 are all fixed to a certain level when the voltage level of the second pumping voltage VPP_2 is equal to or higher than the set voltage level. The second pumping unit 220 does not perform the pumping operation.

The semiconductor device according to the embodiment of the present invention does not perform the pumping operation when the voltage level of the pumping voltage is equal to or higher than the set voltage level. Meanwhile, the operation of the semiconductor device according to the embodiment of the present invention will be summarized as follows, assuming that the voltage level of the pumping voltage is equal to or lower than the set voltage level.

When the bank of the first bank group 300 among the first bank group 300 and the second bank group 400 is enabled, the first pumping voltage generator 100 generates the first active oscillator signal OSC_act1 and the first standby oscillator signal OSC_sb1 to generate the first pumping voltage VPP_1. In response to the second standby oscillator signal OSC_sb2 of the second active oscillator signal OSC_act2 and the second standby oscillator signal OSC_sb2, the second pumping voltage generator 200 generates the second pumping voltage (VPP_2).

Meanwhile, when the banks of the second bank group 400 among the first bank group 300 and the second bank group 400 are enabled, the second pumping voltage generator 200 generates the second pumping voltage And generates the second pumping voltage VPP_2 in response to both the signal OSC_act2 and the second standby oscillator signal OSC_sb2. The first pumping voltage generator 100 generates the first pumping voltage OSC_act1 in response to the first active oscillator signal OSC_act1 and the first standby oscillator signal OSC_sb1 of the first standby oscillator signal OSC_sb1, (VPP_1).

When the refresh signal Ref_signal is enabled in the refresh operation, the first and second pumping voltage generators 100 and 200 generate the first and second active oscillator signals OSC_act1 and OSC_act2, And generates the first and second pumping voltages VPP_1 and VPP_2 in response to the second standby oscillator signal OSC_sb1 and OSC_sb2.

Thus, the semiconductor device according to the present invention provides the pumping voltage generated in response to both the active oscillator signal and the standby oscillator signal to only the bank group including the enabled bank, and the bank group including the non- Providing a generated pumping voltage in response to only the standby oscillator signal.

Compared to the semiconductor device and the general semiconductor device according to the present invention, a general semiconductor device (see FIG. 1) has first and second pumping portions 22 and 23 (see FIG. 1) when one of the eight banks 11 to 18 is enabled. (See Fig. 3) according to the present invention are provided with the first to fourth banks 11 to 14 and the fifth to eleventh banks 11 to 14, respectively, while the two active pumps and the two standby pumps included in the first to fourth banks 11 to 14 perform the pumping operation, When the first bank 11 of the eight banks 15 to 18 is enabled, the first to fourth banks 11 to 14 are supplied with the first pumping voltage VPP_1 generated by the active pump and the standby pump, 5 to eighth banks 15 to 18 provide the second pumping voltage VPP_2 generated in the standby pump. Therefore, according to the present invention, it is possible to provide a stable voltage to each bank even when one pump does not perform a pumping operation in comparison with a general semiconductor device under the same conditions. Therefore, the semiconductor device of the present invention can reduce the power consumed in generating the pumping voltage as compared with a general semiconductor device.

It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present invention as defined by the following claims and their equivalents. Only. The scope of the present invention is defined by the appended claims rather than the detailed description and all changes or modifications derived from the meaning and scope of the claims and their equivalents are to be construed as being included within the scope of the present invention do.

Claims (13)

A pumping control unit for generating a standby oscillator signal and an active oscillator signal in response to a refresh signal, a plurality of bank enable signals; And
And a pumping unit for generating a pumping voltage in response to the standby oscillator signal and the active signal. The method according to claim 1,
The pumping control unit
Sensing the voltage level of the pumping voltage to generate an oscillator enable signal,
An oscillator for generating the standby oscillator signal in response to the oscillator enable signal, and
And an active oscillator signal generator for outputting the standby oscillator signal as the active oscillator signal if one of the refresh signal and the plurality of bank enable signals is enabled. 3. The method of claim 2,
The pumping unit
A standby pump for performing a pumping operation in response to the standby oscillator signal and for outputting a voltage generated through a pumping operation to an output stage,
And an active pump that performs a pumping operation in response to the active oscillator signal and outputs a voltage generated through a pumping operation to an output stage,
Wherein the pumping voltage is generated at a node to which the output terminals of the standby oscillator and the active oscillator are connected in common. A first bank group including a first bank, a second bank, a third bank, and a fourth bank;
A second bank group including a fifth bank, a sixth bank, a seventh bank, and an eighth bank;
A first pumping voltage generator configured to generate and apply a first pumping voltage to the first bank group if one bank of the first bank group is enabled; And
And a second pumping voltage generator for generating a second pumping voltage and applying the second pumping voltage to the second bank group when one bank of the second bank group is enabled. 5. The method of claim 4,
The first and second pumping voltage generators
And generates the first and second pumping voltages during a refresh operation to apply the first and second pumping voltages to the first and second bank groups. 6. The method of claim 5,
The first pumping voltage generator
A first bank enable signal, a third bank enable signal, and a fourth bank enable signal when the voltage level of the first pumping voltage becomes lower than the set voltage level, and in response to the refresh signal, the first bank enable signal, the second bank enable signal, A pumping control section for generating both the oscillator signal and the standby oscillator signal or generating only the standby oscillator signal, and
And a pumping unit that performs a pumping operation in response to the standby oscillator signal and the active oscillator signal and generates the first pumping voltage by a pumping operation. The method according to claim 6,
The pumping control unit
Wherein when the voltage level of the first pumping voltage is lower than the set voltage level and the refresh signal and the first to fourth bank enable signals are enabled, the active oscillator signal and the standby oscillator signal And when the refresh signal, the first bank enable signal, the second bank enable signal, the third bank enable signal, and the fourth bank enable signal are both disabled, only the standby oscillator signal And the semiconductor device. 8. The method of claim 7,
The pumping unit
A standby pump for performing a pumping operation in response to the standby oscillator signal and generating the first pumping voltage through a pumping operation,
And an active pump for performing a pumping operation in response to the active oscillator signal and generating the first pumping voltage through a pumping operation. 9. The method of claim 8,
The standby pump
Wherein the pumping operation is performed when the standby oscillator signal periodically transitions, and the pumping operation is not performed when the first standby oscillator signal is fixed to a specific level. 9. The method of claim 8,
The active pump
Wherein the pumping operation is performed when the first active oscillator signal periodically transitions and the pumping operation is not performed when the first active oscillator signal is fixed to a certain level. 6. The method of claim 5,
The second pumping voltage generator
A fifth bank enable signal, a seventh bank enable signal, and an eighth bank enable signal when the voltage level of the second pumping voltage becomes lower than the set voltage level. A pumping controller for generating an active oscillator signal and a standby oscillator signal that transition to the standby oscillator signal, or to generate a signal that periodically transitions only the standby oscillator signal while fixing the active oscillator signal to a certain level, and
And a pumping unit that performs a pumping operation in response to the standby oscillator signal and the active oscillator signal and generates the second pumping voltage by a pumping operation. 12. The method of claim 11,
The pumping control unit
If the voltage level of the second pumping voltage is higher than a set voltage level, both the active oscillator signal and the standby oscillator signal are fixed to a certain level,
When the voltage level of the second pumping voltage is lower than the set voltage level, the refresh signal and the fifth to eighth bank enable signals are enabled, the active oscillator signal that periodically transitions, Generates a standby oscillator signal,
And the refresh signal and the fifth to eighth bank enable signals are disabled, the active oscillator signal is fixed to a specific level and only the standby oscillator signal is periodically transited. 13. The method of claim 12,
The pumping unit
A standby pump that performs a pumping operation if the standby oscillator signal periodically transitions and generates the second pumping voltage through a pumping operation and, if the standby oscillator signal is a fixed level signal, , And
An active oscillator circuit that performs a pumping operation if the active oscillator signal periodically transitions, generates the second pumping voltage through a pumping operation, and, if the active oscillator signal is a fixed level signal, The semiconductor device comprising: a semiconductor substrate;
KR1020120149909A 2012-12-20 2012-12-20 Semiconductor Memory Apparatus KR20140080283A (en)

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