KR20140075396A - Nonvolatile memory device and method for managing data thereof - Google Patents

Abstract

According to the present invention, provided are a non-volatile memory device in which an erasing operation due to read migration is reduced and a data management method thereof. The data management method of the non-volatile memory device according to the present invention comprises the steps of receiving a read command for a first block; determining attributes of at least one logic page among logic pages included in the first block, in accordance with a block read count representing the number of readings of the first block; programming at least one logic page selectively to a second block according to the determined attributes; and updating a mapping table which indicates a physical address corresponding to at least one logic page after programming.

Description

[0001] NONVOLATILE MEMORY DEVICE AND METHOD FOR MANAGING DATA THEREOF [0002]

The present invention relates to a semiconductor device, and more particularly, to a nonvolatile memory device and a data management method thereof.

Semiconductor memory devices are divided into volatile memory devices and non-volatile memory devices. Volatile memory devices have a fast read / write speed, but their contents are lost when the external power supply is interrupted. On the other hand, the nonvolatile memory device preserves its contents even if the external power supply is interrupted. Therefore, a nonvolatile memory device is used to store contents that should be preserved regardless of whether power is supplied or not. Particularly, among nonvolatile memories, flash memory has a higher degree of integration than conventional EEPROMs, and thus is very advantageous for application as a large capacity auxiliary memory device.

On the other hand, the memory block of the flash memory is degraded in data reliability as the read operation is repeatedly performed. For example, a memory block that has been read 100K times is more likely to have errors in stored data than a memory block that has been read 10K times. In order to prevent degradation of data reliability (or read disturbance) due to repetition of the read operation, the flash memory performs an erase operation on the memory block in which the read operation has been performed more than a predetermined number of times, thereby initializing the read state of the memory block do. Such an operation is referred to as read migration (RM).

However, when the erase operation is frequently performed for the RM, the erase operation takes a long time, so that the operation speed of the flash memory may be reduced. In addition, frequent erase operations increase the program / erase cycle (P / E cycle), thus shortening the life of the flash memory. Therefore, a flash memory device which minimizes the performance of the RM is required.

It is an object of the present invention to provide a nonvolatile memory device and its data management method that minimizes the performance of an RM operation.

It is another object of the present invention to provide a nonvolatile memory device in which the number of erase operations is reduced and a method of managing data thereof.

It is still another object of the present invention to provide a flash memory device with improved operation speed and a method of managing data thereof.

A method of managing data in a non-volatile memory device including a plurality of blocks according to the present invention includes: receiving a read command for a first block; Determining an attribute of at least one logical page of logical pages included in the first block according to a block read count indicating a read count of the first block; Selectively programming the at least one logical page in a second block according to the determined attribute; And after the program, updating a mapping table representing a corresponding physical address of the at least one logical page.

In an embodiment, receiving a read command for the first block includes increasing the block read count in response to a read command for the first block.

In an embodiment, determining the attribute of the at least one logical page comprises comparing the block read count to a reference value; Updating page read information of the at least one logical page according to the comparison result; And determining an attribute of the at least one logical page with reference to the updated page read information.

In an embodiment, the page read information includes a page read count that indicates the number of reads of the at least one logical page.

In an embodiment, updating the page read information includes increasing the page read count in response to a read command for the first block if the block read count exceeds the reference value.

In an embodiment, the read command for the first block includes a read command for the at least one logical page.

In an embodiment, determining an attribute of the at least one logical page includes determining an attribute of the at least one logical page as a hot page if the page read count is greater than a threshold value.

In an embodiment, the page read information includes a read pace indicating a relative read frequency of the at least one logical page, and the step of updating the page read information comprises: Wherein the read phase is defined by a formula [read pace = page read count ÷ (current logical read time of the first block) - initial logical read time of the first block]) .

In an embodiment, determining the attribute of the at least one logical page includes determining an attribute of the at least one logical page as a hot page if the calculated read face is greater than a threshold value .

As an embodiment, the step of determining an attribute of the at least one logical page may include: calculating a corrected read phase of the at least one logical page with reference to the calculated read phase; And determining a property of the at least one logical page as a hot page if the corrected read face is greater than a threshold value, wherein the corrected read face is a corrected read face The average reading phase is an average of the reading paces of each of the logical pages included in the first block, and? Is a real number greater than zero.

In one embodiment, the logical pages of the first block are divided into a first group or a second group according to the magnitude of the page read count of each of the logical pages, and the nonvolatile memory device reads the block of the first block A count and a read count table storing the first group of page read counts.

As an embodiment, the step of updating the page read information may include: determining whether a read command for the first block includes a read command for a logical page (hereinafter referred to as a target page) included in the second group; Determining an average page read count of logical pages included in the first block as a read count of the target page according to a result of the determination; Comparing a read count of the target page with a minimum page read count of the first group; And determining the target page as the first group according to a comparison result with the minimum page read count.

As an embodiment, programming the at least one logical page into a second block includes: determining read priority of the at least one logical page with reference to read information of the at least one logical page; Assigning the second block of the plurality of blocks for the program according to the read priority; And programming the at least one logical page into the allocated second block.

In an embodiment, the at least one logical page is programmed in a spare page of the allocated second block.

As an embodiment, updating the mapping table may include updating the mapping table so that the corresponding physical address of the at least one logical page points to a physical page of the second block in which the at least one logical page is programmed .

In an embodiment, updating the mapping table further comprises invalidating the physical page of the first block in which the at least one logical page is stored.

According to the embodiment of the present invention, the number of times the RM is executed can be reduced.

Further, since the number of times of performing the erase operation is reduced, the life of the nonvolatile memory device can be increased and the operation speed can be improved.

1 is a block diagram showing a nonvolatile memory device according to the present invention.
2 is a diagram for explaining a basic concept of a data management method of a nonvolatile memory device according to the present invention.
3 is a diagram showing a first embodiment of a data management method according to the present invention.
4 is a diagram showing a second embodiment of a data management method according to the present invention.
5 is a diagram illustrating a data management method according to a third embodiment of the present invention.
6 is a flowchart illustrating a data management method according to embodiments of the present invention.
7 and 8 are views showing a fourth embodiment of a data management method according to the present invention.
9 is a flowchart specifically illustrating a data management method according to a fourth embodiment of the present invention.
10 is a block diagram illustrating an exemplary solid state drive according to embodiments of the present invention.
11 is a block diagram illustrating an exemplary data storage device in accordance with embodiments of the present invention.
12 is a block diagram exemplarily showing a memory card according to the embodiments of the present invention.
13 is a diagram showing a schematic configuration of a nonvolatile memory device and a computing system including the nonvolatile memory device according to embodiments of the present invention.

The foregoing general description and the following detailed description are exemplary and are intended to provide further explanation of the claimed invention. Therefore, the present invention is not limited to the embodiments described herein but may be embodied in other forms. The embodiments disclosed herein are provided so that the disclosure can be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

In this specification, when it is mentioned that a certain element includes an element, it means that it may further include other elements. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram showing a nonvolatile memory device according to the present invention. 1, a non-volatile memory device 100 includes a memory cell array 110, an address decoder 120, a data input / output circuit 130, and a control logic 140 and a voltage generator 150 .

The memory cell array 110 is connected to the address decoder 120 via word lines WLs. The memory cell array 110 is connected to the data input / output circuit 130 via the bit lines BLs. The memory cell array 110 includes a plurality of memory blocks BLK1 to BLKz. Each of the memory blocks includes a plurality of NAND cell strings.

Each channel of cell strings may be formed in a vertical direction. In the memory cell array 110, a plurality of word lines may be stacked in the vertical direction, and each channel of the cell strings may be formed in the vertical direction. The memory device in which the memory cell array 110 is formed by the cell string structure may be referred to as a vertical structure nonvolatile memory device or a three-dimensional structure nonvolatile memory device. Each of the cell strings includes at least one ground selection transistor, a plurality of memory cells, and at least one string selection transistor stacked in a direction perpendicular to the substrate. Each of the memory cells of the memory cell array 110 can be used as a single level cell (SLC) or a multilevel cell (MLC).

The voltage generator 150 generates voltages to be provided to the address decoder 120 in response to control of the control logic 140. [ For example, in a program operation, the voltage generator 150 generates a word line voltage such as a program voltage Vpgm, a pass voltage Vpass, a program verify voltage Vfy in response to control of the control logic 140 , And provides the generated word line voltage to the address decoder 120. As another example, in a read operation, the voltage generator 150 generates a word line voltage, such as a selected read voltage Vr, an unselected read voltage Vread, etc., in response to control of the control logic 140, And provides the address to the address decoder 120. In each example, the address decoder 120 will selectively apply the word line voltages provided to the word lines WLs under the control of the control logic 140.

The address decoder 120 selects at least one page of the plurality of pages of the memory cell array 110 in response to an externally received address ADDR and control of the control logic 140. [ The address decoder 120 receives the word line voltage from the voltage generator 150 and delivers the received word line voltage to the selected page.

For example, the address decoder 120 may select any one of the plurality of memory blocks of the memory cell array 110 in response to the address ADDR. The address decoder 120 may select any one of the plurality of word lines in response to the address ADDR.

In a program operation, the address decoder 120 may select one page and deliver the program voltage Vpgm and the program verify voltage Vfy to the selected word line (Selected WL) to which the selected page belongs. The address decoder 120 may pass the pass voltage (Vpass) to the unselected word line (Unselected WL).

In a read operation, the address decoder 120 may select one page and deliver the selected read voltage Vr to the selected word line to which the selected page belongs. The address decoder 120 may deliver the unselected read voltage Vread to the unselected word line.

The data input / output circuit 130 receives data (DATA) from the outside and stores the received data in the memory cell array 110. Also, the data input / output circuit 130 reads the data (DATA) stored in the memory cell array 110 and transfers the read data to the outside. By way of example, data input / output circuit 130 may include well known components such as column select gates, page buffers, data buffers, and the like. As another example, the data input / output circuit 140 may include well known components such as a column select gate, a write driver, a sense amplifier, a data buffer, and the like.

The control logic 140 receives the command CMD and the control signal CTRL from the outside and controls the overall operation of the nonvolatile memory device 100. [ For example, the control logic 140 receives program instructions from the outside and controls the overall program operation of the non-volatile memory device 100. As another example, it receives a read command from the outside and controls the overall read operation of the nonvolatile memory device 100.

In an embodiment according to the present invention, the non-volatile memory device 100 reads hot pages of a memory block in which a lot of read operations are performed according to the number of read operations of the memory blocks, ). Then, when a read command for the hot pages is received thereafter, hot pages are read out from the target block. At this time, the hot page means a logical page that is relatively frequently read from the nonvolatile memory device.

According to such a configuration, when the logical page (or hot page) frequently read out is read out repeatedly, the reading operation for such logical page can be performed dispersedly in at least two blocks. Thus, in order to read a specific hot page, an excessive read operation can be prevented from being performed for one block. Thus, the number of times the read migration is performed on the block storing the hot page can be reduced.

On the other hand, when the memory block is erased, the number of reads is initialized in terms of read disturbance. For example, if a block is read more than 100K times, a read disturbance is likely to occur due to an increase in the number of reads. However, when an erase operation is performed on a block in which reading is performed 100K times or more, the number of readings of the block is initialized, and the probability of occurrence of the read disturbance is also lowered.

In the present invention, it is possible to assign a block to be erased soon by another internal operation of the nonvolatile memory device to a target block to which hot pages are newly programmed. For example, hot pages can be programmed into a block that will soon be erased by wear leveling, merge, garbage collection, and the like. In this way, it is possible to induce the target block in which hot pages are stored to be naturally erased by internal operations (wear leveling, merge or garbage collection) without a separate erasing operation. Thus, before the number of reads of the target block by the hot pages is accumulated excessively, the target block will be erased. Therefore, the data reliability of the target block can be ensured even if a separate read migration is not performed on the target block.

According to the above configuration, in the nonvolatile memory device 100, the number of times the erase operation is performed can be totally reduced. Thus, the lifetime of the nonvolatile memory device 100 can be increased. In addition, since the erase count is reduced, the operation speed of the nonvolatile memory device 100 can be improved.

Hereinafter, a detailed description of the nonvolatile memory device 100 and its data management method according to the present invention is provided with various embodiments.

2 is a diagram for explaining a basic concept of a data management method of a nonvolatile memory device according to the present invention. Referring to FIG. 2, a non-volatile memory device 100 (see FIG. 1) includes a first block 111 in which hot pages are stored and a second block 112 (or a target block) in which hot pages are to be newly programmed.

According to the data management method of the present invention, the first block 111 includes a plurality of logical pages (page0, page1, page2, page3, page4) including hot pages (page1, page3). As described above, a hot page means a page having a relatively high read frequency as compared with other pages. The criteria for determining any logical page as a hot page may vary.

For example, a read count that indicates the number of times a logical page has been read may serve as a basis for determining a hot page. That is, a page whose read count exceeds a reference value can be determined as a hot page.

As another example, a read pace indicating the relative frequency with which a logical page is read may be a reference for determining a hot page. The read phase refers to a value indicating a degree of relatively frequent reading within a logical read time (LRT) interval in which the first block 111 is read.

Here, the logical read time (LRT) period means a logical time period in which a read operation is performed on the first block 111. [ That is, the logical read time of the first block may correspond to the number of logical operations or the read count of the first block 111 at a specific point in time. Alternatively, the logical read time of the first block may correspond to the number of logical operations or the total read count of the non-volatile memory device 100 at a particular point in time. For example, if the read count of the first block at the initial time is zero, the initial logical read time of the first block may correspond to zero. Also, if the read count of the first block at the current time is 100, then the current logical read time of the first block may correspond to 100. At this time, the logical read time interval will be the current logical read time (100) - the initial logical read time (0) = 100. The reading phase of any logical page can be defined as follows.

Read phase = page read count ÷ (current logical read time of the first block - initial logical read time of the first block)

According to the above equation, the reading phase can indicate how frequently a specific page is read during a predetermined logical read time interval. That is, the reading phase represents the relative frequency of the number of reads.

The data management method according to the present invention can determine a logical page as a hot page if the calculated read face exceeds a threshold value.

Alternatively, the corrected read phase can be computed by processing the calculated read phase to further refine the relative read frequency. At this time, the corrected reading phase is defined as follows.

Calibrated Reading Face = Calculated Reading Face - α × Average Reading Face

According to this, the corrected reading phase is determined by subtracting the average reading phase of the logical pages of the first block 111 in the calculated reading phase. Thus, the difference in read frequency relative to other logical pages can be reflected in greater detail. Here, the weight α is a real number larger than 0 and can be freely determined depending on whether or not the relative difference in the read frequency is reflected to some extent.

As described above, the data management method according to the present invention can determine the logical page as a hot page if the corrected read face exceeds a threshold value.

However, the method for determining a hot page according to the present invention is not limited to the above-described method. In the present invention, a hot page refers to a page having a higher reading frequency or a higher reading frequency than the other pages, or a higher contribution to an increase in the reading count of the first block 111. [ Thus, in addition to the methods described herein, the criteria for determining hot pages may vary.

Referring again to FIG. 2, the read count of the first block 111 is increased each time reading is performed on the pages included in the first block 111. When the read count of the first block 111 exceeds a predetermined reference value, the hot pages (page1, page3) of the first block 111 are read and programmed into the second block 112. [ Then, when a read command for the hot pages (page1, page3) is received, the hot pages (page1, page3) are read from the second block 112 instead of the first block 111. [ According to the above configuration, after the hot pages (page1, page3) are programmed in the second block 112, the burden of reading the hot pages (page1, page3) is imposed on the second block 112. [ Thus, the read count of the first block 111 is prevented from increasing by the hot pages (page1, page3). As a result, read migration can be prevented from being frequently performed on the first block 111 having a high read count.

On the other hand, as described above, a block to be erased can be allocated to the second block 112 by an internal operation (wear leveling, merge or garbage collection). In this case, the second block 112 may be erased before the number of reads of the second block 112 is accumulated excessively, without a separate read migration to the second block 112. Thus, in the non-volatile memory device 100, the number of times the erase operation is performed can be totally reduced.

3 is a diagram showing a first embodiment of a data management method according to the present invention. Referring to FIG. 3, the non-volatile memory device 100 (see FIG. 1) includes a first block 111 in which hot pages are stored, a second block 112 in which hot pages are newly programmed, And a mapping table 118a in which physical addresses are stored.

In this embodiment, when the read count of the first block 111 exceeds the reference value, in order to suppress the increase in the read count of the first block 111, the hot pages included in the first block 111 , page3) to the second block 112, as shown in FIG. Here, copy means to read hot pages (page1, page3) from the first block 111 and to program the read hot pages (page1, page3) in the second block 112. [

Then, the mapping table 118a indicating the corresponding physical address of the hot pages (page1, page3) is updated (or updated). Specifically, the mapping table 118a is updated so that the physical addresses of the hot pages (page1, page3) point to the physical pages of the second block 112 in which the hot pages (page1, page3) are copied. According to the above configuration, when a read command of the hot pages (page1, page3) is received, the corresponding physical address of the hot pages (page1, page3) indicates the second block 112 and the second block 112 (Page1, page3) are read out from the hot pages (page1, page3). Thus, the read count of the first block 111 is prevented from being increased by the hot pages (page1, page3).

As an example, updating the mapping table 118a may include invalidating the physical pages of the first block 111. [ That is, after the hot pages (page1, page3) are copied to the second block 112, in order not to read the physical pages of the first block 111 where the hot pages (page1, page3) are stored, Invalidates physical pages. Here, invalidation means an internal operation in which data stored in a corresponding physical page is processed as invalid. By invalidating the physical pages of the first block 111, the mapping table 118a no longer points to the invalidated pages. That is, the hot pages (page1, page3) are migrated from the first block (111) to the second block (112).

Here, the case where the hot pages (page1, page3) are copied into one block 112 has been described, but the present invention is not limited thereto. For example, the hot pages (page1, page3) can be copied and divided into two or more different blocks.

On the other hand, another detailed description of the data management method not described here is the same as that described in Fig.

4 is a diagram showing a second embodiment of a data management method according to the present invention. Referring to FIG. 4, a non-volatile memory device 100 (see FIG. 1) includes a first block 111 in which hot pages are stored, a second block 112 in which hot pages are newly programmed, And a replica table 118b indicating a physical address where a replica page of hot pages is stored.

In the present embodiment, a series of processes for copying the hot pages (page1, page3) to the second block 112 in correspondence with the read count of the first block 111 and a description thereof are the same as those described in FIG. 3 Do.

However, in the present embodiment, the hot pages programmed in the second block 112 are programmed as replicas (or replicas) of the hot pages (page1, page3) stored in the first block 111. [

The difference between this embodiment and the first embodiment in Fig. 3 lies in the validity of the original data. That is, in the first embodiment, the hot pages (page1, page3) are transferred from the first block 111 to the second block 112, and the hot pages (page1, page3) Is invalidated. On the other hand, in this embodiment, the replica page of the hot pages (page1, page3) is programmed in the second block 112 and the hot pages (page1, page3) stored in the first block 111 are left in a valid state Loses. That is, the same logic data is stored in the first block 111 and the second block 112 in a redundant manner.

In this embodiment, in addition to the mapping table 118a for referring to the physical addresses of the hot pages (page1, page3), a separate replica table 118b for referring to the position where the replica page is stored is provided. Then, after the replica pages are programmed in the second block 112, the mapping table 118a or the replica table 118b is updated (or updated).

Specifically, the replica information is inserted in the mapping table 118a. Here, the replica information is information indicating whether there is a replica page of a hot page to be referred to. In the replica table 118b, the physical address of the second block 112 in which the replica page is programmed is stored. First, when a read command for a hot page is received, the replica information of the hot page is referred to. If the replica page of the hot page does not exist, the non-volatile memory device 100 (see FIG. 1) reads the hot page from the first block 111 by referring to the physical address of the hot page stored in the mapping table 118a do.

On the other hand, if there is a replica page of the hot page, the non-volatile memory device 100 refers to the replica table 118b to find the physical page of the hot page. Then, the replica page of the hot page is searched for from the replica table 118b to the physical address to which the replica page is programmed. Then, referring to the found physical address, the replica page is read from the second block 112.

According to the above configuration, since the replica page stored in the second block 112 is read instead of the hot page stored in the first block 111, an increase in the read count of the first block 111 can be suppressed.

On the other hand, other specific details not described herein for the data management method are the same as those described in Figs.

5 is a diagram illustrating a data management method according to a third embodiment of the present invention. 5 illustrates a method of programming hot pages included in a plurality of blocks into a plurality of blocks. 5, a plurality of blocks 114, 112 and 113 each including at least one hot page, a plurality of target blocks 114 to which hot pages hot1, hot2, hot3, hot4 are programmed, A read information table 118c for assigning hot pages (hot1, hot2, hot3, hot4) to the plurality of target blocks 114, 115, 116 and 117 is displayed.

In this embodiment, a method of collecting information about hot pages from a plurality of blocks and dividing hot pages into a plurality of target blocks based on collected information is described.

First, the non-volatile memory device 100 (see FIG. 1) determines hot pages among the pages included in the plurality of blocks 111, 112, and 113. As an embodiment, each of the plurality of blocks 111, 112, and 113 may be blocks whose read count of the block exceeds a reference value.

The page read information of the determined hot pages (hot1, hot2, hot3, hot4) is stored in the read information table. As an example, the page read information may include a read count of a hot page, a read face, or a corrected read face. The details of the read count, read phase, or corrected read phase are the same as described above.

The nonvolatile memory device 100 refers to the read information table and allocates hot pages (hot1, hot2, hot3, hot4) to the plurality of target blocks 114, 115, 116, and 117 do. As an example, the priority may be determined by how often or hotly the hot pages (hot1, hot2, hot3, hot4) are read. For example, the priority may be higher for larger read count sizes, read pace sizes, or corrected read pace sizes for hot pages (hot1, hot2, hot3, hot4). Higher priority hot pages can be programmed into the target block faster.

Then, the nonvolatile memory device 100 divides hot pages (hot1, hot2, hot3, hot4) into the allocated target blocks 114, 115, 116,

As an embodiment, hot pages (hot1, hot2, hot3, hot4) may be programmed into empty spare pages of assigned target blocks 114, 115, 116,

As an embodiment, there may be a difference in erase order between the target blocks 114, 115, 116, and 117 indicating the order of erasing soon due to the internal operation of the non-volatile memory device 100. For example, if the internal operation is a garbage collection, the target block containing a lot of invalid pages will be subject to garbage collection earlier. That is, a target block including a lot of invalid pages is relatively erased in the garbage collection.

At this time, the higher the priority of the hot page, the more the target block having a high erase order is allocated and programmed. For example, the priority of hot pages (hot1, hot2, hot3, hot4) is higher in order of page (hot1, highest), page (hot2), page (hot3), page (hot4, lowest) It is assumed that the erase orders of the target blocks 114, 115, 116 and 117 are sequentially higher in order of block 114 (highest), block 115, block 116, and block 117 (lowest). Then, the page (hot1) is allocated and programmed in block 114 and the page (hot4) is allocated and programmed in block 117, depending on the priority of the hot page and the erase order of the target block. Similarly, page (hot2) and page (hot3) are allocated and programmed to block 115 and block 116, respectively.

According to the above configuration, a page with a high read frequency or a high frequency among hot pages is programmed in a target block having a high erase order. Thus, the read count of the target block is increased by the hot page, and the possibility of performing the read migration to the target block by the increased read count can be lowered. That is, the possibility of a read migration can be minimized by allocating a high priority hot page to a target block to be erased by an internal operation (for example, garbage collection) before a read migration is performed.

6 is a flowchart illustrating a data management method according to embodiments of the present invention. Referring to FIG. 6, the data management method includes steps S110 to S150.

In step S110, the nonvolatile memory device 100 (see FIG. 1) receives a read command for the first block. At this time, the read command for the first block includes a read command for at least one logical page included in the first block.

As an example, in step S110, the non-volatile memory device 100 may increase the block read count of the first block in response to a read command for the first block. Here, the block read count represents the number of times the read operation has been performed for the first block.

In step S120, the non-volatile memory device 100 determines a hot page among the logical pages included in the first block according to the block read count of the first block and the page read information of the logical pages. The page read information may include a page read count of the logical pages, a read face, or a corrected read face. The details of the read count, read phase, or corrected read phase are the same as described above.

Specifically, in step S120, the nonvolatile memory device 100 compares the block read count of the first block with a reference value. As a result of the comparison, if the block read count of the first block exceeds the reference value, a hot page among the logical pages is determined in order to copy some of the logical pages included in the first block to another block.

As an embodiment, the read command for the first block includes a read command for at least one logical page included in the first block. At this time, the nonvolatile memory device 100 will update (or re-calculate) the read information of the logical page in response to the read command for at least one logical page.

Then, the nonvolatile memory device 100 determines a hot page among the logical pages in accordance with the read information of the logical pages of the first block. For example, if the read information on which the hot page determination is based is the read count, the logical pages whose read count exceeds the threshold value will be determined as hot pages. Alternatively, when the read information on which the hot page determination is based is the read phase or the corrected read phase, logical pages whose read phase or corrected read phase exceeds the threshold value will be determined as hot pages.

In step S130, the nonvolatile memory device 100 allocates the determined hot page to the second block (or the target block). In this case, when a plurality of hot pages are programmed into a plurality of target blocks, a plurality of hot pages may be allocated to a plurality of target blocks according to the priority of hot pages and the erase order of target blocks. The specific method of allocating the hot pages to the target blocks according to the priority order or the erase order is the same as that described in FIG.

In step S140, the nonvolatile memory device 100 programs the hot page in the allocated second block.

In step S150, the non-volatile memory device 100 updates the mapping table indicating the corresponding physical address of the programmed hot page. At this time, the updated mapping table may be a mapping table indicating a corresponding physical address of the logical page or a replica table indicating a corresponding physical address of the replica (or replica). The details of how to update the mapping table, the replica table or the mapping table and the replica table are the same as those described in Figs. 3 and 4.

According to the above configuration, the nonvolatile memory device 100 reads the hot page among the logical pages of the first block and programs it in the second block (or the target block) according to the read count of the first block. Then, when a read command for the hot page is received thereafter, the nonvolatile memory device 100 reads the hot page from the second block instead of the first block. Thus, when a read command for a hot page is repeatedly received, the read operation for the hot page may be performed in at least two blocks (first and second blocks) in a dispersed manner. Thus, in order to read the hot page, the excessive read operation can be prevented from concentrating on the first block, and the possibility of performing the read migration on the first block can be reduced.

7 and 8 are views showing a fourth embodiment of a data management method according to the present invention. 7 and 8 provide a data management method for minimizing the memory space required for storing read information of logical pages.

7 shows a data management method of storing read information only for logical pages of a part of a plurality of blocks. 7, the non-volatile memory device 200 includes a block table 210 for managing a read count (RC) of a block and page tables 220 and 230 for managing a read count (RC) .

The block table 210 stores a block read count (BLK RC) of a plurality of blocks (BLK1, BLK2, ..., BLKn). The block read count (BLK RC) stored in the block table 210 is updated when a read command for the block is received. For example, the stored read count of block BLK2 is 40, but if two read commands are received for block BLK2 and two read operations are thus performed, the stored read count of block BLK2 is 42 Will be updated.

The non-volatile memory device 200 refers to the block table 210 and determines whether the block read count BLK RC exceeds a threshold value (e.g., 100). If the block read count (BLK RC) exceeds the threshold value, the read count of the logical pages included in the block is stored in the page tables 220 and 230. That is, the read count of the logical pages is selectively stored only for the block whose read count is relatively large (that is, the hot page needs to be determined).

For example, in block BLK1, the block read count BLK RC exceeds the threshold (150 > 100). Accordingly, the page read counts 30, 40, and 22 are stored in the page table 220 for the logical pages (page 1a, page 1b, page 1c) included in the block BLK1. On the other hand, in order to minimize the memory space required for storing the page read count, the number of logical pages in which the page read count per block is stored may be limited. For example, only a maximum of three logical pages among the logical pages included in one block may be stored in the page table 220 as a page read count. The details of this will be described later with reference to FIG.

Similarly, the other block BLK3 exceeding the threshold value also stores the page read count value of the logical page in the page table 230. [ Here, it has been described that the page tables 220 and 230 correspond to the blocks BLK1 and BLK3, respectively. However, by way of illustration, page read counts of a plurality of blocks may be stored by one page table.

On the other hand, the block BLK2 has a block read count BLK RC less than the threshold (40 < 100). Therefore, for the block BLK2, only the block read count BLK RC is stored in the block table 210, and the read count of the logical pages included in the block BLK2 is not separately stored.

According to the above configuration, the page read count of the logical page is stored for only some of the blocks BLK1 and BLK3. Thus, the memory space required to manage the page read count can be reduced.

8 shows a data management method for storing read information for only some of the logical pages included in one block. Referring to FIG. 8, the non-volatile memory device 200 includes a page table 220 for managing page read counts of logical pages.

In Fig. 8, in order to minimize the memory space required for storing the page read count, the number of logical pages in which the page read count per block is stored is limited. For example, a page read count may be stored in the page table 220 for up to three logical pages among the logical pages included in one block.

The page table 220 stores a page read count of up to three logical pages among the logical pages included in the block BLK1. It is assumed that the page table 220 stores page read counts of three logical pages (page 1a, page 1b, page 1c). At this time, the logical pages (page 1a, page 1b, page 1c) in which the page read count is stored in the page table 220 are referred to as a first group. On the other hand, the logical pages in which the page read count is not stored in the page table 220 are referred to as a second group.

When a read command for block BLK1 is received, the block read count of block BLK1 will increase. For example, the block read count of block BLK1 may increase from 150 to 151. And, if the read command for block BLK1 includes a read command for a logical page belonging to the first group, the page read count stored in the page table 220 will increase. For example, if the read command for block BLK1 includes a read command for page 1a, the page read count of page 1a increases from 30 to 31, 220).

On the other hand, when the read command for the block BLK1 includes a read command for a logical page belonging to the second group (for example, page 1d), the page read count value of the logical page (page 1d) Is not stored in the page table 220. Thus, at this time, the average page read count (mean RC) of the logical pages is determined as the read count of the logical page (page 1d). For example, if the block read count of block BLK1 is 150 and block BLK1 comprises five logical pages, the block read count is equal to the sum of the page read counts of the five logical pages. Therefore, the average page read count (mean RC) of the logical pages included in the block BLK1 is 30 (150/5 = 30), and the page read count of the logical page (page 1d)

Then, the determined page read count of the logical page (page 1d) is compared with the value of the page read counts stored in the page table (220). Specifically, it is determined whether the determined page read count of the logical page (page 1d) exceeds the minimum page read count stored in the page table 220. [

If the determined page read count exceeds the minimum page read count, the logical page on which the read is performed (page 1d) is considered to be a page that is read more frequently than the logical page (page 1c) corresponding to the minimum page read count. Thus, the page read count of the logical page (page 1c) from the page table 220 is deleted. Then, the page read count of the logical page (page 1d) is stored in the page table 220 in place of the deleted page read count.

According to the above configuration, referring to the read count of the plurality of logical pages included in the block BLK1, only the page read count of logical pages having a high read frequency or a high frequency is stored in the page table 220. [ Thus, the memory space required to store the page read count can be reduced.

9 is a flowchart specifically illustrating a data management method according to a fourth embodiment of the present invention. Referring to FIG. 9, the data management method according to the present embodiment includes steps S210 to S280.

In step S210, a read command for the block is received. At this time, the read command for the block includes a read command for the logical page included in the block.

In step S220, the block read count of the block in which the read command is received is incremented. As an example, each time a read command for a block is received, the block read count may be incremented by one.

In step S230, it is determined whether the block read count of the block in which the read command is received exceeds a threshold value. In the data management method according to the present embodiment, the page read count of the logical page is separately stored only for the block whose block read count exceeds the threshold value.

If the threshold value is exceeded, the data management method proceeds to step S240. If the threshold value is not exceeded, the data management method ends.

In step S240, it is determined whether a logical page (hereinafter referred to as a target page) to be read belongs to a logical page group (hereinafter referred to as a first group) in which page read counts are stored in the page table (or RC table). If the target page belongs to the first group, the data management method proceeds to step S260. Otherwise, the data management method proceeds to step S250.

In step S250, the average page read count (mean RC) of the block is determined as the page read count of the target page. Here, the details of the method for determining the average page read count (mean RC) and the page read count of the target page are the same as those described above.

In step S270, the page read count of the target page is compared with the minimum page read count of the page table. As a result of the comparison, if the page read count of the target page exceeds the minimum page read count, the data management method proceeds to step S280. Otherwise, the data management method ends.

In step S280, the minimum page read count from the page table is deleted. Then, the page read count of the target page is stored in the page table in place of the deleted page read count. When the step S280 is finished, the data management method ends.

On the other hand, when the process returns to step S260,

After step S240 ends, in step S250, the page read count of the target page is increased and the increased page read count is stored in the page table (or RC table). When step S260 is completed, the data management method ends.

According to the above arrangement, the page read count of the logical page is stored only for some blocks. In addition, the number of logical pages in which the page read count is stored among the logical pages included in one block may be limited. Thus, the memory space required to manage the page read count can be reduced.

12 is a block diagram illustrating a solid state drive (SSD) according to embodiments of the present invention. Referring to FIG. 12, a user device 1000 includes a host 1100 and an SSD 1200. The SSD 1200 includes an SSD controller 1210, a buffer memory 1220, and a non-volatile memory device 1230.

The SSD controller 1210 provides a physical connection between the host 1100 and the SSD 1200. That is, the SSD controller 1210 provides interfacing with the SSD 1200 in response to the bus format of the host 1100. In particular, the SSD controller 1210 decodes the instruction provided from the host 1100. [ Depending on the decoded result, the SSD controller 1210 accesses the non-volatile memory device 1230. (PCI) express, ATA, PATA (Parallel ATA), SATA (Serial ATA), SAS (Serial Attached SCSI), and the like are used as the bus format of the host 1100. [ And the like.

In the buffer memory 1220, write data provided from the host 1100 or data read from the nonvolatile memory device 1230 are temporarily stored. When data existing in the nonvolatile memory device 1230 is cached at the time of the read request of the host 1100, the buffer memory 1220 supports the cache function of providing the cached data directly to the host 1100 . Generally, the data transfer rate by the host 1100 in the bus format (e.g., SATA or SAS) is much faster than the transfer rate of the memory channel of the SSD 1200. That is, when the interface speed of the host 1100 is much higher, performance degradation caused by speed difference can be minimized by providing a buffer memory 1220 of a large capacity.

The buffer memory 1220 may be provided to a synchronous DRAM (DRAM) to provide sufficient buffering in the SSD 1200 used as a large capacity auxiliary storage device. However, it will be apparent to those skilled in the art that the buffer memory 1220 is not limited to the disclosure herein.

The nonvolatile memory device 1230 is provided as a storage medium of the SSD 1200. For example, the non-volatile memory device 1230 may be provided as a NAND-type Flash memory having a large storage capacity. The non-volatile memory device 1230 may be comprised of a plurality of memory devices. In this case, each memory device is connected to the SSD controller 1210 on a channel-by-channel basis. Although the nonvolatile memory device 1230 has been described as a storage medium by way of example of a NAND flash memory, it may be composed of other nonvolatile memory devices. For example, PRAM, MRAM, ReRAM, FRAM, NOR flash memory, or the like may be used as a storage medium, and a memory system in which heterogeneous memory devices are mixed can be applied. The non-volatile memory device 1230 may be configured substantially the same as the non-volatile memory device described in FIG.

In the SSD 1200 described above, the non-volatile memory device 1230 reads hot pages of a memory block in which a lot of read operations have been performed, and programs the hot pages in another block (hereinafter, referred to as a target block) . Then, when a read command for the hot pages is received thereafter, hot pages are read out from the target block.

According to such a configuration, when the hot page is repeatedly read from the non-volatile memory device 1230, the read operation for the hot page can be performed dispersedly in at least two blocks. Therefore, it is possible to prevent the read operation according to the hot page from being performed excessively in one block. As a result, it is possible to prevent read migration from being frequently performed on a specific block.

13 is a block diagram illustrating an exemplary data storage device in accordance with embodiments of the present invention. Referring to FIG. 13, a memory system 2000 according to the present invention may include a memory controller 2200 and a nonvolatile memory 2100.

The non-volatile memory device 2100 may be configured substantially the same as the non-volatile memory device described in FIG.

The memory controller 2200 may be configured to control the non-volatile memory 2100. The SRAM 2230 can be used as a working memory of the CPU 2210. The host interface 2220 may have a data exchange protocol of the host connected to the memory system 2000. The error correction circuit 2240 provided in the memory controller 2200 can detect and correct an error included in the read data read from the nonvolatile memory 2100. The memory interface 2260 may interface with the nonvolatile memory 2100 of the present invention. The CPU 2210 can perform all control operations for data exchange of the memory controller 2200. [ Although not shown in the figure, the memory system 2000 according to the present invention may further be provided with a ROM (not shown) for storing code data for interfacing with a host.

The memory controller 2100 may be configured to communicate with an external (e.g., host) through one of a variety of interface protocols such as USB, MMC, PCI-E, SAS, SATA, PATA, SCSI, ESDI, .

In the above-described memory system 2000, the non-volatile memory device 2100 reads hot pages of a memory block in which a lot of read operations have been performed according to the number of read operations of the memory blocks, do. Then, when a read command for the hot pages is received thereafter, hot pages are read out from the target block.

According to such a configuration, when the hot page is repeatedly read from the non-volatile memory device 2100, the read operation for the hot page can be performed dispersedly in at least two blocks. Therefore, it is possible to prevent the read operation according to the hot page from being performed excessively in one block. As a result, it is possible to prevent read migration from being frequently performed on a specific block.

The memory system 2000 according to the present invention may be implemented as a computer, a portable computer, a UMPC (Ultra Mobile PC), a workstation, a netbook, a PDA, a portable computer, a web tablet, a wireless phone, a mobile phone, a smart phone, a digital camera, a digital audio recorder, a digital audio player, a digital picture recorder, a digital picture player, a digital video recorder, a digital video player, a device capable of transmitting and receiving information in a wireless environment, various user devices constituting a home network, ≪ / RTI >

14 is a block diagram exemplarily showing a memory card according to embodiments of the present invention. Referring to FIG. 14, a data storage device 3000 according to the present invention may include a nonvolatile memory 3100 and a memory controller 3200. The memory controller 3200 can control the nonvolatile memory 3100 based on control signals received from outside the data storage device 3000. [

In the data storage device 3000 described above, the nonvolatile memory 3100 can operate substantially the same as the nonvolatile memory device of FIG. The nonvolatile memory 3100 reads hot pages of a memory block in which a lot of read operations have been performed according to the number of read operations of the memory blocks, and programs the hot pages in another block (hereinafter, referred to as a target block). Then, when a read command for the hot pages is received thereafter, hot pages are read out from the target block. According to the above configuration, when hot pages are repeatedly read from the nonvolatile memory 3100, the read operation for the hot pages can be performed in at least two blocks in a dispersed manner. Therefore, it is possible to prevent the read operation according to the hot page from being performed excessively in one block. As a result, it is possible to prevent read migration from being frequently performed on a specific block.

The data storage device 3000 of the present invention can constitute a memory card device, an SSD device, a multimedia card device, an SD card, a memory stick device, a hard disk drive device, a hybrid drive device, or a universal serial bus flash device. For example, the data storage device 3000 of the present invention can configure a card that meets industry standards for using a user device such as a digital camera, a personal computer, and the like.

15 is a diagram showing a schematic configuration of a nonvolatile memory device and a computing system including the nonvolatile memory device according to embodiments of the present invention. 15, a computing system 4000 in accordance with the present invention includes a non-volatile memory device 4100 electrically coupled to a bus 4400, a memory controller 4200, a modem 4300, such as a baseband chipset, ), A microprocessor 4500, and a user interface 4600.

The configuration of the nonvolatile memory device 4100 and the memory controller 4200 shown in FIG. 15 can be configured substantially the same as the nonvolatile memory device shown in FIG. The memory controller 4200 controls the non-volatile memory device 4100 such that the hot pages of the memory block subjected to a lot of read operations are programmed in another block (hereinafter, referred to as a target block) (4100). Then, when a read command for the hot pages is received thereafter, the non-volatile memory device 4100 is controlled to read hot pages from the target block.

According to such a configuration, when the hot pages are repeatedly read from the nonvolatile memory device 4100, the read operation for the hot pages can be performed dispersedly in at least two blocks. Therefore, it is possible to prevent the read operation according to the hot page from being performed excessively in one block. As a result, it is possible to prevent read migration from being frequently performed on a specific block.

When the computing system according to the present invention is a mobile device, a battery 4700 for supplying the operating voltage of the computing system may additionally be provided. Although not shown in the drawing, an application chipset, a camera image processor (CIS), a mobile DRAM, and the like may be further provided in the computing system according to the present invention. The memory controller 4200 and the nonvolatile memory device 4100 can constitute, for example, a solid state drive / disk (SSD) using nonvolatile memory for storing data.

The nonvolatile memory device and / or memory controller according to the present invention may be implemented using various types of packages. For example, the nonvolatile memory device and / or the memory controller according to the present invention may be implemented as a package on package (PoP), ball grid arrays (BGAs), chip scale packages (CSPs), plastic leaded chip carriers -Line Package (PDIP), Die in Waffle Pack, Die in Wafer Form, COB, Ceramic Dual In-Line Package, Plastic Metric Quad Flat Pack (MQFP), Thin Quad Flatpack (TQFP) (SSOP), Thin Small Outline (TSOP), System In Package (SIP), Multi Chip Package (MCP), Wafer-level Fabricated Package (WFP), Wafer-Level Processed Stack Package (WSP), and the like.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. In addition, although specific terms are used herein, they are used for the purpose of describing the present invention only and are not used to limit the scope of the present invention described in the claims or the claims. Therefore, the scope of the present invention should not be limited to the above-described embodiments, but should be determined by the equivalents of the claims of the present invention as well as the claims of the following.

100: nonvolatile memory device 110: memory cell array
120: Row decoder 130: Data input / output circuit
140: control logic 150: voltage generator
1100: Host 1200: SSD
1210: SSD controller 1220: buffer memory
1230: Nonvolatile memory device
2100: nonvolatile memory 2200: memory controller
2210: CPU 2220: Host interface
2230: SRAM 2240: ECC
2260: Memory interface
3100: nonvolatile memory 3200: memory controller
4100: nonvolatile memory 4200: memory controller
4300: modem 4400: system bus
4500: Microprocessor 4600: User Interface
4700: Battery

Claims (16)

A data management method for a nonvolatile memory device including a plurality of blocks,
Receiving a read command for a first block;
Determining an attribute of at least one logical page of the logical pages of the first block according to a block read count indicating a read count of the first block;
Selectively programming the at least one logical page in a second block according to the determined attribute; And
And after the program, updating a mapping table indicating a corresponding physical address of the at least one logical page. The method according to claim 1,
Wherein the step of receiving a read command for the first block comprises:
And increasing the block read count in response to a read command for the first block. The method according to claim 1,
Wherein determining the attributes of the at least one logical page comprises:
Comparing the block read count with a reference value;
Updating page read information of the at least one logical page according to the comparison result; And
And determining an attribute of the at least one logical page with reference to the updated page read information. The method of claim 3,
Wherein the page read information comprises a page read count that indicates the number of reads of the at least one logical page. 5. The method of claim 4,
Wherein updating the page read information comprises:
And incrementing the page read count in response to a read command for the first block if the block read count exceeds the reference value. 6. The method of claim 5,
Wherein the read command for the first block includes a read command for the at least one logical page. 6. The method of claim 5,
Wherein determining the attributes of the at least one logical page comprises:
Determining an attribute of the at least one logical page as a hot page if the page read count is greater than a threshold value. 6. The method of claim 5,
Wherein the page read information includes a read pace representing a relative read frequency of the at least one logical page,
Wherein updating the page read information comprises:
And calculating the read phase according to the page read count,
Wherein the read phase is defined by a formula [read pace = page read count ÷ (current logical read time of the first block) - initial logical read time of the first block)]. 9. The method of claim 8,
Wherein determining the attributes of the at least one logical page comprises:
And determining the attribute of the at least one logical page as a hot page if the calculated read phase is greater than a threshold value. 10. The method of claim 9,
Wherein determining the attributes of the at least one logical page comprises:
Calculating a corrected read phase of the at least one logical page with reference to the calculated read phase; And
Determining a property of the at least one logical page as a hot page if the corrected read phase is greater than a threshold value,
The corrected read phase is defined by [corrected read phase = calculated read phase -? Average read phase)],
Wherein the average read phase means an average of the read paces of each of the logical pages included in the first block,
And? Is a real number equal to or larger than zero. 5. The method of claim 4,
Wherein the logical pages of the first block are divided into a first group or a second group according to a size order of page read counts of the logical pages,
The nonvolatile memory device comprising:
And a read count table storing a block read count of the first block and page read counts of logical pages belonging to the first group. 12. The method of claim 11,
Wherein updating the page read information comprises:
Determining whether a page to be read (hereinafter referred to as a target page) is included in the second group according to a read command for the first block;
Determining an average page read count of the logical pages of the first block as a read count of the target page according to the determination result;
Comparing a read count of the target page with a minimum page read count of the first group; And
And determining the target page as the first group according to the comparison result with the minimum page read count. The method of claim 3,
Wherein programming the at least one logical page into a second block comprises:
Determining read priority of the at least one logical page with reference to read information of the at least one logical page;
Assigning the second block of the plurality of blocks for the program according to the read priority; And
And programming the at least one logical page into the allocated second block. 14. The method of claim 13,
Wherein the at least one logical page is programmed in a spare page of the allocated second block. The method according to claim 1,
Wherein updating the mapping table comprises:
Updating the mapping table such that the corresponding physical address of the at least one logical page points to a physical page of the second block in which the at least one logical page is programmed. 16. The method of claim 15,
Wherein updating the mapping table comprises:
Further comprising invalidating a physical page of the first block in which the at least one logical page is stored.

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