KR20140073018A - An input line selector system for battery chargers - Google Patents

Abstract

An input terminal selector system, which is provided to selectively connect one of two input power terminals, is configured with a single switch provided in series with each of the input power terminals, and the connection between the switches is designed to prevent a reverse current in an event that the switches are OFF, or that at least one switch is OFF. A smart, simple and precisely operating automatic line selector is provided to control the operation of the two switches. The line selector system of the present invention simply comprises only two switches, wherein the two switches can be respectively applied to a linear charger or a switching charger application which has one or two switches, thereby providing a simple, efficient and cost effective system.

Description

AN INPUT LINE SELECTOR SYSTEM FOR BATTERY CHARGERS FOR CHARGER

The present invention relates to an input stage selector. More particularly, the present invention relates to an input selector for a dual input charger.

As used herein, 'current flow' refers to the flow of current from one of two input power sources to one output.

The term " node " as used herein refers to a connection point or redistribution point at which at least two members meet in a circuit, but is not limited thereto.

The term " switch " as used herein refers to a transistor having at least three terminals, but is not limited thereto.

The term ' load ' as used herein refers to a battery and / or other connected member, but is not limited thereto.

The term "first / fourth / seventh / tenth / thirteenth terminals", "second / fifth / eighth / eleventh / twelfth" terminals used in connection with NPN bipolar junction transistors (BJT) 14 terminal 'and the' third / sixth / ninth / twelfth / fifteenth terminals' refer to an emitter, a collector, and a base, respectively.

The term "first / fourth / seventh / tenth / thirteenth terminals", "second / fifth / eighth / eleventh / twelfth" terminals used in connection with PNP bipolar junction transistors (BJT) 14 terminal 'and the' third / sixth / ninth / twelfth / fifteenth terminals' refer to collectors, emitters, and bases, respectively.

The term " first / fourth / seventh / tenth / thirteenth terminals " used in connection with N type metal oxide semiconductor field-effect transistors (MOSFETs) 5th / 8th / 11th / 14th terminals' and the '3rd / 6th / 9th / 12th / 15th terminals' respectively denote a source, a drain and a gate.

The term "first / fourth / seventh / tenth / thirteenth terminals" used in connection with a P-type metal oxide semiconductor field-effect transistor (MOSFET) 5 / eighth / eleventh / fourteenth terminals' and 'third / sixth / ninth / twelfth / fifteenth terminals' means drains, sources and gates, respectively.

The term " under voltage lockout level " as used herein means a predetermined operating voltage level, but is not limited thereto.

The term " source-drain-drain-source configuration " used in the present invention means that two nMOSFETs connected in series to each other to allow the drain of the first nMOSFET to be connected to the drain of the second nMOSFET .

The above definition of the term is used in the art.

Due to the increasing use of laptops, mobile phones, and handheld terminals, the demand for power supplies used in these devices is also increasing. To meet the demand for these power supplies, the devices can be powered by either a single input plug-in power adapter or a wall adapter and a USB interface, Supplied with a dual input charger. Generally, the charger charges the battery and generates regulated power for use in the system. In recent years, battery chargers of various specifications have been developed. Generally, a charger system is a step-down converter that uses a higher input supply to power a lower output load, such as a battery.

A dual input charger known in the art includes a load switch that implements a transistor (typically a MOSFET). A MOSFET always includes an inherent parasitic diode (i.e., a body diode), and a parasitic diode is formed between the drain and the source of the MOSFET. To accommodate power from two input sources, the dual input charger uses two load switches, each of which is connected to a respective input power terminal. Each load switch consists of a series combination of two nMOSFETs in a source-drain-drain-source configuration. The load switch is provided with an 'enable' signal to turn on the desired load switch. As previously described, the load switch used in combination with a switching / linear charger is applied to a dual input single output charger. In addition, the switching / linear charger further includes a series combination of two nMOSFETs in a source-drain-drain-source configuration.

Thus, a typical dual-input charger that provides a single output requires at least six or seven nMOSFETs to function normally, which requires additional electrical circuitry to drive a large number of connected switches in the best way, And the system becomes complicated.

Texas Instruments Inc.'s BQ24160 (dual input switching charger) implements the previously described architecture to accommodate inputs from two sources and provide a single output. The system includes a pair of load switches, one load switch connected to each input supply. Further, each load switch further includes a pair of nMOSFET switches interconnected in a source-drain-drain-source configuration. The load switch is connected to a linear / switching charger that also performs a series combination of two nMOSFETs in a source-drain-drain-source configuration. As a single-input linear charger for performing dual-input single-output functions, the Texas Instruments BQ25040 configuration uses six nMOSFET switches (four switches operating in the charging mode) and is a single-input switching charger, The BQ24150 uses seven nMOSFET switches (five switches operating in charge mode). The circuit becomes more complicated due to the increased number of switches and additional control signals to select a particular load switch. In addition, the series connection of the increased nMOSFET increases the conduction loss, thereby reducing the efficiency and increasing the cost.

The dual input single output charger described in U.S. Patent No. 7759907B2 provides a source selector circuit together with a system that receives power from two input sources so that one of the two supplies can be selected by a logic circuit. The source discrimination circuit further comprises two circuits for performing a combination of an isolation diode and a bypass transistor, each circuit being associated with one input power supply. The bypass transistor used is a p-type transistor, which selects input power and connects the selected input power to the output. The source selection circuit mentioned previously uses four bypass transistors, a blocking diode and a pull-up resistor. When used in a charging application, the circuit requires additional components in conduction losses, which increases system cost.

Therefore, there is a need for a charging circuit design that improves efficiency and enables relatively less complex and cost-effective systems.

Some of the objects of the present invention which improve the problems of the prior art and provide useful substitutes are described below.

It is an object of the present invention to provide an efficient input stage selector associated with a dual input battery charger.

It is a further object of the present invention to allow for simple adjustment of members within an input selector associated with a dual input battery charger.

It is yet another object of the present invention to provide an input stage selector associated with a dual input battery charger having a configuration requiring a relatively small number of members.

Another embodiment of the present invention is to reduce conduction losses in a dual input battery charger.

One or more objects of the present invention are to provide a cost effective dual input battery charger.

It is a further object of the present invention to provide a compact dual input battery charger.

Other objects and advantages of the present invention will be more clearly understood by reading the following description with reference to the accompanying drawings, which do not limit the scope of the present invention.

The present invention provides an input selector system suitable for selectively connecting one of a first input power stage and a second input power stage to a common node,

A first switch adapted to selectively provide a current flowing in a direction from the first input power supply stage to the node;

A second switch adapted to selectively provide a current flowing in a direction from the second input power supply stage to the node; And

When selecting at least one of the first and second input power stages, which is greater than the low voltage operation cut-off voltage, either the first switch or the second switch is turned on and off according to the selection logic, An automatic line selector coupled to the first switch and the second switch,

And a control unit.

In general, the first and second switches of the present invention are a metal oxide semiconductor field effect transistor (MOSFET) and a bipolar junction transistor (BJT). Preferably, the first switch includes at least one first terminal, a second terminal and a third terminal, the first terminal being connected to the first input power terminal; The second switch includes at least one fourth terminal, a fifth terminal and a sixth terminal, the fourth terminal is connected to the second input power terminal, and the second terminal and the fifth terminal are connected to the node.

In the present invention, when the first switch and the second switch are NPN bipolar junction transistors (BJT), the first terminal and the fourth terminal are emitters, the second terminal and the fifth terminal are collectors, and the third terminal and the sixth terminal The terminal is the base of the transistor constituting the first switch and the second switch.

In the present invention, when the first switch and the second switch are PNP bipolar junction transistors (BJTs), the first terminal and the fourth terminal are collectors, the second terminal and the fifth terminal are emitters, And the sixth terminal is the base of the transistor constituting the first switch and the second switch.

In the present invention, when the first switch and the second switch are N-type metal oxide semiconductor field effect transistors (MOSFETs), the first terminal and the fourth terminal are sources, the second terminal and the fifth terminal are drains, And the third terminal and the sixth terminal are the gates of the transistors constituting the first switch and the second switch.

In the present invention, when the first switch and the second switch are P-type metal oxide semiconductor field effect transistors (MOSFETs), the first terminal and the fourth terminal are drains, the second terminal and the fifth terminal are sources, And the third terminal and the sixth terminal are the gates of the transistors constituting the first switch and the second switch.

The automatic input selector described above generally includes the following configuration:

A first voltage divider coupled to the first input power supply and comprising a pair of first resistors adapted to generate a first sensed voltage;

A second voltage divider coupled to the second input power supply and comprising a pair of second resistors adapted to generate a second sense voltage;

A comparator adapted to receive the first sense voltage and the second sense voltage and generate an output signal; And

A driver adapted to receive an output signal and supply a predetermined voltage to a third terminal or a sixth terminal.

Also, the input selector described herein applies to the linear charger application presented herein, wherein the linear charger includes a third switch coupled to operate between the node and the load, and the third switch An eighth terminal, and a ninth terminal, wherein the seventh terminal is connected to the load, the eighth terminal is connected to the node, and the ninth terminal is coupled to the driver.

In addition, the input stage selector described above is applied in the switching charger application presented herein, wherein the switching charger further comprises a fourth switch and a fifth switch coupled to operate between the node and the load, A fourth terminal, a seventh terminal and a twelfth terminal, the fifth terminal includes a thirteenth terminal, the fourteenth terminal and the fifteenth terminal, the tenth terminal and the fourteenth terminal are connected to the load, And the twelfth terminal and the fifteenth terminal are coupled to a pulse width modulation (PWM) driver.

The system described in the present invention may be implemented using at least one of discrete components, integrated circuits, and hybrid integrated circuits.

The present invention relates to a method for selectively connecting and providing a current that flows constantly in at least one of a first input power terminal or a second input power terminal in a common node direction, the method comprising the steps of:

Providing a first switch having a first terminal, a second terminal and a third terminal between the first input power supply stage and the node;

Connecting a first terminal to a first input power supply terminal and a second terminal to a node;

Providing a second switch having a fourth terminal, a fifth terminal and a sixth terminal between the second input power supply stage and the node;

Connecting a fourth terminal to the second input power supply terminal and a fifth terminal to the node;

A first switch or a second switch depending on a voltage level applied at each input terminal for selecting at least one input terminal among a first input power supply terminal and a second input power supply terminal based on predetermined selection logic and larger than a low- Turning on and off one of the second switches;

Generating a first sense voltage corresponding to a first input power stage;

Generating a second sense voltage corresponding to a second input power supply stage;

Comparing the first sense voltage and the second sense voltage and generating an output signal; And

Driving a third terminal or a sixth terminal based on the output signal to connect a first input power supply terminal or a second input power supply terminal having a higher sensing voltage.

The method of the present invention as described above further comprises the following steps:

Providing a seventh terminal, an eighth terminal and a ninth terminal between the first input power supply stage and the coupled load;

Connecting a seventh terminal to the load;

Connecting an eighth terminal to the node; And

When applied to a linear charger, driving the ninth terminal to properly regulate the charge current and charge current with the load.

As described above, the method of the present invention further includes the following steps:

A fourth switch having a tenth terminal, an eleventh terminal and a twelfth terminal between the node and the switching node, and a fifth switch having a thirteenth terminal, a fourteenth terminal and a fifteenth terminal;

Connecting an eleventh terminal to the node;

Connecting a tenth terminal and a fourteenth terminal to the rod; And

When applied to a switching charger, driving the twelfth terminal and the fifteenth terminal to properly adjust the charging current and the charging voltage to the switching node.

The predetermined selection logic mentioned in the above described invention comprises the following steps:

Determining a hysteresis voltage and an offset voltage such that an offset voltage comprising a hysteresis voltage is lower than a forward voltage of a parasitic body diode of the first switch and the second switch; And

A high priority input line setting having a higher priority among the first sensing voltage and the second sensing voltage is determined by a voltage obtained by subtracting the hysteresis voltage from the offset voltage applied to at least one of the first sensing voltage and the second sensing voltage Step.

The input selector of the present invention and its associated battery charger are described in conjunction with the accompanying drawings:
Figure 1 shows a typical input selector system and its associated battery charger.
FIG. 1A shows a linear charger associated with the typical battery charger shown in FIG.
1B shows a switching charger associated with the typical battery charger shown in FIG.
Figure 2a shows a replaceable linear charger known in the art.
Figure 2B shows a replaceable switching charger known in the art.
Figure 3 shows an input selector and associated battery charger associated with embodiments of the present invention.
Figure 4 shows a linear charger for a battery of an embodiment of the present invention.
5 shows a switching charger for a battery of an embodiment of the present invention.
Figure 6 shows an automatic input stage selector and gate of an embodiment of the present invention.
Figure 7 shows the output waveform of the automatic input stage selector of Figure 6;
The number / marking refers to the corresponding member in some of the accompanying drawings.

The terminology used herein is for the purpose of describing particular embodiments only, and is not intended to be limiting. The singular forms " a " and " above ", as used herein, may include a plurality of meanings, unless otherwise stated. As used herein, the terms "comprises," "comprising," and "having" are used in the inclusive sense to describe features, integers, steps, functions, elements, and / Does not limit the presence or addition of other features, integers, steps, features, elements, components, and / or groups thereof. The steps, procedures, and functions of the methods described herein are not necessarily intended to be performed in the specific order discussed or illustrated herein, unless otherwise indicated. In addition, additional or alternative steps may be applied.

When an element or layer is referred to as being "on," "connected to," or "coupled to" another element or layer, the element or layer may be placed directly on another element or layer Present, linked directly, linked, or combined. Also, when a member is referred to as being "directly on top of," "directly in engagement with," "directly connected to," or "directly coupled to" another member or layer, It may not exist. Other terms used to describe the relationship between members (eg, between "between" and "directly between", "adjacent" and "directly adjacent") should be interpreted in an equivalent fashion. As used herein, the term " and / or " includes any and all combinations of one or more of the listed lists.

The terms first, second, third, etc. may be used to describe various elements, parts, regions, layers and / or sections, but such elements, parts, regions, layers, and / . These terms may be used to distinguish one element, component, region, layer or section from another region, layer or section. As used herein, the terms " first ", " second ", and other numerical terms are not intended to imply continuity or order unless otherwise indicated. Therefore, the first member, the first part, the first region, the first layer, or the first division described below can be applied to the second member, the second component, the second region, the second region, and the second region without departing from the scope of the embodiments of the present invention. Layer or a second sector.

The term " at least " or " at least one " as used herein refers to the use of one or more members, materials or quantities, and such use may be made in embodiments of the invention to achieve one or more desired objects or results.

Numerical values referred to in terms of various physical parameters, diameters, or quantities are merely approximate, and numerical values higher or lower than the parameters, diameters, or numerical values set forth herein are also included within the scope of the present invention, unless otherwise specified.

Figure 1 shows a typical input selector system and its associated battery charger. As shown in FIG. 1, the system 100 illustrates a dual input single output charger application comprising a combination of two load switches and a battery charger associated therewith. System 100 receives power from two input power stages: VBUS 1 connected to first load switch 102 and VBUS 2 connected to second load switch 104. The first load switch 102 includes a series connection of two transistors, 1M1 and 1M2, which are typically nMOSFETs in a source-drain-drain-source configuration. Similarly, the second load switch 104 includes a series connection of two transistors, i.e., 1M3 and 1M4 in a source-drain-drain-source configuration. Load switches 102 and 104 are each coupled in series with nMOSFETs 1M5 and 1M6 of charger 106 and switches 1M5 and 1M6 are coupled to a source-drain-drain-source configuration. The nMOSFET 1M7 together with the nMOSFET 1M6 serves as a regulator and regulates the charging current and the charging voltage passing through the inductor L1 and the capacitor 112 and the output is connected to the battery 108 Or other member (110) connected to the system (100).

When the system 100 is connected to two input power supplies, VBUS1 and VBUS2, the enable signals EN1 and EN2 are coupled to load switches 102 and < RTI ID = 0.0 > 104, as appropriate. When appropriate load switches 102 and 104 are enabled, the input power is accommodated by the series connection of the nMOSFETs of the selected load switch 102 and 104. Generally, when the gate voltage of the nMOSFET of the load switch is higher than the voltage threshold voltage of the gate of the nMOSFET, a conducting channel is formed between the source and the drain, and the enabled nMOSFET starts conduction. The two load switches 102 and 104 connect the input power supplies VBUS1 and VBUS2 to the common node Vin, thereby supplying power to the charger 160. [ As soon as the input power stage is selected, load switch nMOSFETs 1M5 and 1M6 begin to conduct in a manner similar to the nMOSFETs of load switches 102 and 104. The nMOSFET 1M7 functions as a filter and regulates the output voltage and current with the aid of the inductor L1 and the capacitor 112 which rectify the flow of the alternating current (AC). The regulated voltage available at node Vbat is then supplied to battery 108 and / or other connected member 110 of system 100.

When the nMOSFET is in the OFF state, there may be a reverse current from the battery 108. The source-drain-drain-source configuration of a series-connected nMOSFET isolates the reverse current and isolates the input power (VBUS1 and VBUS2) from the node Vin, respectively, and also provides isolation between nodes Vin and Vbat. However, repeated use of the series configuration of nMOSFETs tends to increase conduction losses, which reduces the efficiency of the charger system.

Figure 1a shows a linear charger associated with the general battery charger of Figure 1; Figure 1a shows a linear charger 106a comprising a first switch 1M5 and a second switch 1M6 connected in series in a source-drain-drain-source configuration between node Vin and node Vbat. During normal operation, the first switch 1M5 is turned on and the second switch 1M6 assists bidirectionally adjusting the battery voltage at node Vbat. When the input voltage at node Vin drops below the battery voltage at node Vbat, first switch 1M5 blocks unwanted reverse current.

1B illustrates a switching charger associated with the conventional battery charger of FIG. Switching charger 106b includes three switches connected to operate between node Vin and node Vbat. Switch 1M5 is always ON during normal operation. Switch 1M5 also cuts off the current flowing from node Vbat to node Vin when the voltage at node Vin is lower than the battery voltage at node Vbat. The switches 1M6 and 1M7 change ON / OFF accordingly, and the output voltage at node Vbat is determined when switches 1M6 and 1M7 are ON. When switch 1M6 is ON and switch 1M7 is OFF, energy is stored by inductor L1, and when switch 1M7 is ON and switch 1M6 is OFF, power is transferred to node Vbat by inductor L1. The inductor L1 and the capacitor 112 function as a low pass filter and provide a stable DC voltage. The charger functions as a buck converter that regulates the voltage.

Thus, a typical charger application, designed as shown in FIGS. 1, 1a and 1b, requires at least four switches to provide isolation between the dual input power supply and the output, and requires at least two more switches for the charger function .

Figure 2a shows a replaceable linear charger known in the art. A charger 200a having two input power stages VBUS1 and VBUS2 has switches 2M1 and 2M2 connected in a source-drain-drain-source configuration to an input power stage VBUS1 and source-drain-drain - Includes a series connection of switches (2M3 and 2M4) connected in series in a source configuration. The input power supply stage VBUS1 or VBUS2 is selected based on the 'enable' signal 202 controlled by the external controller. Switches 2M1 and 2M2 conduct when VBUS1 is selected. Switches 2M3 and 2M4 conduct when VBUS2 is selected. The charger 200 regulates the charging current and the charging voltage supplied to the battery 204 or the member 206 of the system 200a. The charger isolates the battery voltage at node Vbat from the input voltage.

Figure 2B shows a replaceable switching charger known in the art. The charger 200b having two input power stages VBUS1 and VBUS2 is connected to the input power terminal VBUS1 through switches 2M1 and 2M2 connected in a source-drain-drain-source configuration and source- And a series connection of switches 2M3 and 2M4 serially connected in a drain-source configuration. The input power supply stage VBUS1 or VBUS2 is selected based on the 'enable' signal 202 controlled by the external controller. Switches 2M1 and 2M2 conduct when VBUS1 is selected. Switches 2M3 and 2M4 conduct when VBUS2 is selected. The switch 2M5 regulates the output voltage supplied to the battery 204 or the member 206 of the system 200b. The bypass capacitors (Cpm1 and Cpm2) are provided with a combination of the respective switches to enhance the stable function of the charger.

Thus, a typical charger application, designed as shown in FIGS. 2A and 2B, requires at least 4-5 switches to provide isolation between the dual input power supply and the output and to provide the charger function.

In addition, a typical charger application, designed as shown in Figures 1, 1a, 1b, 2a and 2b, has additional circuitry (mechanical or electronic control circuitry) to sense the voltage at the input power stage and select the appropriate input power stage It is essential. Therefore, a large number of switches are added to the electric circuit, which makes the system complicated, inefficient, and costly.

3 shows an input selector and an associated battery charger according to embodiments of the present invention. System 300 includes two switches 3M1 and 3M2, wherein switch 3M1 is connected to input power supply terminal VBUS1 and switch 3M2 is connected to input power supply terminal VBUS2, respectively. Switches 3M1 and 3M2 are typically BJT or MOSFET transistors. A description of embodiments of the present invention will be given below with reference to an nMOSFET. However, this embodiment is also applicable to other transistors such as NPN bipolar junction transistors (BJTs), PNP bipolar junction transistors (BJTs), N-type metal oxide semiconductor field effect transistors (MOSFETs), P-type metal oxide semiconductor field effect transistors Applicable.

The switches 3M1 and 3M2 are connected to each other in a source-drain-drain-source configuration so as to provide insulation between the input power supplies VBUS1 and VBUS2 and to flow current in the direction of the node Vbat when the switch is turned off (turn OFF) When the switch is off, it prevents reverse current from node Vbat to input power stages (VBUS1 and VBUS2).

The automatic input selector and the gate driver are provided for controlling the functions of the switches 3M1 and 3M2 based on predetermined logic. The automatic input stage selector and the gate driver appropriately drive the gate of the corresponding switch 3M1 or 3M2 by selecting one of the input power stages VBUS1 and VBUS2 and providing it for a voltage greater than the threshold voltage of the gate for this purpose, The resulting switch is in the ON state. The drain terminals of the switches 3M1 and 3M2 are connected to the common node Vin, and the common node Vin is further connected to a common charger 106 including three switches 1M5, 1M6 and 1M7. A typical charger 106a has been described above with respect to the linear charger 106a associated with FIG. 1A and the switching charger 106b associated with FIG. 1B.

Thus, the system 300 devised in the present invention does not require the four switches needed to isolate the input power stage from the output as shown and described in the general system 100 of FIG. Thus, the system 100 has been efficiently adapted to the system 300 of the present invention by providing an input selector system using half the number of switches used in the prior art and an efficiently designed automatic input selector and gate drive, This has led to the invention of a simple, efficient and cost effective system 300.

4 shows a linear charger for a battery according to an embodiment of the present invention. Linear charger 400 includes an automatic input stage selector and a gate driver that connect one of two input power supplies VBUS1 and VBUS2 to node Vbat via a corresponding switch 3M1 or 3M2. The automatic input stage selector and gate drivers select and drive the gates of the corresponding switches 3M1 or 3M2 to allow current to flow through the switch 4M3 operating in both directions, such as a rectifier or low dropout rectifier, Or the charging voltage and the charging current of the other member 402. [ For example, when the input power supply terminal VBUS1 is selected by the automatic input terminal selector and the gate driver, the switch 3M1 is turned ON and the switch 3M2 is turned OFF. The switch 4M3 regulates the output at node Vbat, thereby controlling the charge current and charging voltage of the battery 404 or other member 402.

The switch 4M3 is controlled by the gate driver 406. [ Switch 4M3 provides isolation between input power supplies (VBUS1 and VBUS2) and node Vbat in a source-drain-drain-source configuration provided between switches 3M1 and 3M2 coupled to switch 4M3. For example, when the switch, 3M1, is turned on, the source-drain-drain-source configuration of the switches 4M3 and 3M2 prevents all reverse current flow from the battery 404 by the switch 3M2, which is in the OFF state. The reverse current that may flow from the battery 404 to the input power supply end is blocked when all the switches are in the OFF state.

5 shows a switching charger for a battery according to an embodiment of the present invention. The charger 500 includes switches 3M1 and 3M2 arranged in the configuration as shown in Fig. 4, an automatic input stage selector, and a gate driver. Switch 5M3 provides isolation between input power stages VBUS1 and VBUS2 and node Vbat in a source-drain-drain-source configuration provided between switches 3M1 and 3M2 coupled to switch 5M3. The switch 5M4 is additionally provided for operation with the switch 5M3 for the function of the switching charger. The switches 5M4 and 5M3 are controlled by the pulse width modulation driver 502 to adjust the output power through the switching operation. For example, when VBUS1 is selected by the automatic input stage selector and the gate driver, the switch 3M1 is turned ON and the switch 3M2 is turned OFF. Each conduction time of the switches 5M3 and 5M4 is controlled by a pulse width modulation driver 502 and the switches 5M3 and 5M4 are used to charge the battery 504 which is an energy storage component or to power the other member 506 of the system, Together with inductor L1, an energy storage component, to regulate the charge current and charge voltage along with a capacitor at node Vbat. In general, a bypass capacitor, Cpm, is provided to enhance the stable operation of the system 500.

Figure 6 shows an automatic input stage selector and gate drive according to embodiments of the present invention. The arrangement 600 is designed to automatically select one of the two input power supplies VBUS1 and VBUS2. The automatic input stage selector and the gate driver are based on predetermined selection logic and are associated with the input power stage between the operational and inactive configurations that are determined according to at least one voltage level among the two input power stages that are greater than the low- Turn on and off one of the switches. The voltage levels of each of the input power stages (VBUS1 and VBUS2) are sensed by an associated voltage divider comprising a pair of resistors. A high voltage of each of the input power stages VBUS1 and VBUS2 is applied to a resistive voltage divider including resistors R1 and R2 for input power supply stage VBUS1 and resistors R1, R2 and R3 for input power supply stage VBUS2 As shown in FIG. Each of the sense voltages at node Vb associated with input power stage VBUS1 and at node Vb associated with input power stage VBUS2 is compared to a non-inverting input (non) for comparator 602 that compares two input voltages and generates one output voltage Vcom -inverting input and an inverting input. Comparator 602 is provided with a hysteresis voltage (Vhys) to prevent flickering at the output terminal due to noise between the two input power supplies for stable operation. The hysteresis voltage (Vhys) is supplied by the resistor (R3) and the switch (606). When the switch 606 is in the OFF state, the voltage at the node Vc is set by the ratio of R1 + R2 and R3. When switch 606 is in the ON state, node Vc is connected to ground. The change in voltage at node Vc results in a change in voltage at node Vb, a change in the inverted input voltage of comparator 602, and a required hysteresis voltage (Vhys). The comparator 602 compares the input voltages at nodes Va and Vb and the generated output voltage Vcom is provided to the gate driver 604 to properly drive one of the two nMOSFETs 3M1 and 3M2 . For example, the gate drive 604 turns the nMOSFET 3M1 to the ON state and the nMOSFET 3M2 to the OFF state for the high Vcom voltage. Similarly, for the low Vcom voltage, the nMOSFET 3M2 is turned on and the nMOSFET 3M1 is turned off so that only one of the two nMOSFETs is turned on or off according to the input voltages VBUS1 and VBUS2. Thus, the selected power stage is connected to a linear charger / switching charger by an applicable switch.

Figure 7 shows the output waveform of the automatic input stage selector of Figure 6; VBUS1 and VBUS2 represent the voltage waveform of the corresponding input power supply, Vcom represents the output voltage of the comparator of FIG. 6, and Vin represents the voltage supplied to the linear charger / switching charger application. VTH_r represents the threshold voltage when VBUS1 rises, and VTH_f represents the threshold voltage when VBUS1 falls. Vcom is turned on and off at a low level at VTH_r and turned on and off at VTH_f.

It is essential that one of the two input power stages be predetermined to have a higher priority. For example, when two input power stages are secured by an AC main adapter and a USB interface, the same input voltage level can be sensed at two inputs. Although there is some hysteresis in the threshold voltage of the comparator, the output of the comparator may be unstable (unknown) by a similar input voltage level at the input of the comparator. In addition, even though the two inputs are at the same voltage level, their current driving capability may be different. For example, an adapter has a higher current driving capability than a USB input. Therefore, in a situation where the input terminal of the adapter has the same voltage level as that of the USB input terminal, the input terminal of the adapter is required to have priority.

To select one of the two input power stages, the offset voltage Voff is added to the sense voltage of either of the two input power stages. To illustrate this, we assume that Voff is added to the sense voltage of the input power supply stage VBUS2 of FIG. Voff represents the added offset voltage (in series with the resistive voltage divider) to make the input power stage VBUS1 a high priority input power stage in the situation where the input stage has the same sensed voltage level.

Due to the Voff addition, VBUS1 has a priority order indicated by the following condition.

The above condition is supported by the following mathematical formula, in which Vcom is assumed to be a high level at VBUS1 = VBUS2.

The comparator 602 of FIG. 6 supplies a hysteresis voltage Vhys for a stable function, which requires a hysteresis voltage to prevent an unstable output state due to the limited voltage gain section of the comparator. The hysteresis voltage Vhys for the rising and falling threshold voltages is given by:

The difference DELTA V between VBUS2 and VTH_f is equal to the offset voltage Voff and the offset voltage Voff must be smaller than the forward voltage VF of the parasitic body diode of each of the nMOSFET switches 3M1 and 3M2 to facilitate selection of an appropriate line. Therefore, as mentioned in the present invention,

For example, if VF = 0.6V,? V = 0.8V, VBUS1 = VBUS2 = 5.4V, the automatic input stage selector selects VBUS1 as the predetermined priority input stage. Thus, the switch 3M1 is turned ON and the switch 3M2 is turned OFF. At this time, when the VBUS1 power supply disappears, the VBUS1 voltage falls to VBUS2-VF = 5.4V-0.6V = 4.8V, but since VBUS1 is not lower than VBUS2-? V, the switch 3M1 is still ON, State. Therefore, the output Vin becomes 4.8 V, and a power loss occurs within 3M2 due to the body diode of 3M2. Assuming the worst case VBUS1 power supply is disconnected and connected to a voltage source of 4.8 V, VBUS2 and VBUS1 will be shorted and a huge short circuit current will flow through the body diode of 3M2 and the drain- (ON) and will flow from VBUS2 to VBUS1. Therefore, δV must be lower than the forward voltage of the body diode of the switch.

The system described in the present invention may be designed using at least one discrete element, integrated circuit, and hybrid integrated circuit.

[Technological progress and economic significance]

Technical advances provided in the present invention include the implementation of:

An input selector associated with a dual input battery charger having a configuration including a relatively small number of members;

An efficient input stage selector associated with a dual input battery charger;

A simple control circuit for a member in an input selector associated with a dual input battery charger;

Reduced conduction losses in dual input battery chargers;

Cost-effective dual-input battery charger; And

Compact dual input battery charger.

Claims (15)

A first switch adapted to selectively provide a current flowing in a direction from the first input power supply stage to the node;
A second switch adapted to selectively provide a current flowing in a direction from the second input power supply stage to the node; And
At least one of the first input power source stage and the second input power source stage, which is connected to the first switch and the second switch and is larger than a predetermined low voltage operation cutoff voltage based on a predetermined logic circuit, An automatic input selector adapted to turn on or off either the first switch or the second switch;
And a second input power supply stage, wherein the first input power supply stage and the second input power supply stage are selectively connected to a common node.
The power supply according to claim 1, wherein the first switch includes at least one first terminal, a second terminal, and a third terminal, the first terminal being connected to the first input power terminal; And the second switch includes at least one fourth terminal, a fifth terminal and a sixth terminal, the fourth terminal is connected to the second input power terminal, and the second terminal and the fifth terminal are connected to the node Wherein the input selector is coupled to the input selector.
The automatic input terminal selector according to claim 1,
A first voltage divider coupled to the first input power supply and comprising a pair of first resistors adapted to generate a first sense voltage;
A second voltage divider coupled to the second input power supply and comprising a pair of second resistors adapted to generate a second sense voltage;
A comparator adapted to receive the first sense voltage and the second sense voltage and generate an output signal; And
A driver adapted to receive the output signal and supply a predetermined voltage to a third terminal or a sixth terminal;
Wherein the input selector system comprises:
2. The input selector system of claim 1, wherein the first switch and the second switch comprise transistors such as a metal oxide semiconductor field effect transistor (MOSFET) and a bipolar junction transistor (BJT).
2. The semiconductor device according to claim 1, wherein the first switch and the second switch have the first terminal and the fourth terminal which are emitters, the second terminal and the fifth terminal which are collectors, And the third terminal and the sixth terminal, which are bases of the transistors constituting the second switch, and the NPN bipolar junction transistor (BJT).
The semiconductor device according to claim 1, wherein the first switch and the second switch constitute the first terminal and the fourth terminal which are collectors, the second terminal and the fifth terminal which are emitters, and the first switch and the second switch And the third terminal and the sixth terminal, which are the base of the transistor, are connected to the PNP bipolar junction transistor (BJT).
The semiconductor memory device according to claim 1, wherein the first switch and the second switch constitute the first terminal and the fourth terminal which are sources, the first terminal and the fifth terminal which are drains, the first switch and the second switch Type metal oxide semiconductor field effect transistor (MOSFET), the third and sixth terminals being the gates of the transistors.
The semiconductor memory device according to claim 1, wherein the first switch and the second switch are the first terminal and the fourth terminal which are drains, the second terminal and the fifth terminal which are the sources, and the first and second terminals constituting the first switch and the second switch The third and sixth terminals being the gates of the transistors and the P-type metal oxide semiconductor field effect transistor (MOSFET).
Wherein the linear charger further comprises a third switch coupled to operate between the node and the load, and wherein the third switch comprises at least one And the seventh terminal is connected to the load and the eighth terminal is connected to the node and the ninth terminal coupled to the driver, characterized in that the seventh terminal, the eighth terminal and the ninth terminal of the linear charger .
Wherein the switching charger further comprises a fourth switch and a fifth switch operatively coupled between the node and the load, the fourth switch and the fifth switch operatively coupled between the node and the load, The switch has a tenth terminal, an eleventh terminal and a twelfth terminal, the fifth switch has a thirteenth terminal, a fourteenth terminal and a fifteenth terminal, and the tenth terminal and the fourteenth terminal are connected to one switching node Wherein the eleventh terminal is coupled to the node and the twelfth terminal and the fifteenth terminal are coupled to a pulse width modulation (PWM) driver. 2. The input selector system of claim 1, comprising at least one of an individual element, an integrated circuit, and a hybrid integrated circuit.
Providing a first switch having a first terminal, a second terminal, and a third terminal between the first input power supply stage and the node;
Connecting the first terminal to the first input power supply terminal and the second terminal to the node;
Providing a second switch having a fourth terminal, a fifth terminal and a sixth terminal between the second input power supply stage and the node;
Connecting the fourth terminal to the second input power supply terminal and the fifth terminal to the node;
Selects either one of the first input power supply stage and the second input power supply stage based on predetermined selection logic and turns on either the first switch or the second switch, Turning off;
Generating a first sense voltage corresponding to the first input power stage;
Generating a second sense voltage corresponding to the second input power supply stage;
Comparing the first sensing voltage and the second sensing voltage and generating an output signal; And
Driving the third terminal or the sixth terminal based on the output signal to connect the first input power terminal or the second input power terminal having a higher sensing voltage;
And a second input power supply terminal connected to the second power supply terminal.
13. The method of claim 12,
A fourth switch having a tenth terminal, an eleventh terminal and a twelfth terminal, and a fifth switch having a thirteenth terminal, a fourteenth terminal and a fifteenth terminal, between the node and the one switching node, ;
Connecting the eleventh terminal to the node;
Connecting the tenth terminal and the fourteenth terminal to the switching node; And
Driving the twelfth terminal and the fifteenth terminal to the load to appropriately adjust the charging current and the charging voltage;
≪ / RTI >
Providing a third switch having a seventh terminal, an eighth terminal and a ninth terminal between the first input power supply terminal and the coupled load;
Connecting the seventh terminal to the rod;
Connecting the eighth terminal to the node; And
Driving the ninth terminal to the load to properly adjust the charge current and the charge voltage;
≪ / RTI >
13. The method of claim 12,
A fourth switch having a tenth terminal, an eleventh terminal and a twelfth terminal, and a fifth switch having a thirteenth terminal, a fourteenth terminal and a fifteenth terminal, between the node and the one switching node, ;
Connecting the eleventh terminal to the node;
Connecting the tenth terminal and the fourteenth terminal to the switching node; And
Driving the twelfth terminal and the fifteenth terminal to the load to appropriately adjust the charging current and the charging voltage;
≪ / RTI >
13. The apparatus of claim 12, wherein the predetermined selection logic comprises:
Determining the hysteresis voltage and the offset voltage such that an offset voltage including a hysteresis voltage is lower than a forward voltage of the parasitic body diode of the first switch and the second switch; And
Adding the hysteresis voltage and the offset voltage to at least one of the first sensing voltage and the second sensing voltage to determine a high priority input terminal selected from the first sensing voltage and the second sensing voltage;
≪ / RTI >

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