KR20140059567A - Semiconductor etching apparatus - Google Patents
Semiconductor etching apparatus Download PDFInfo
- Publication number
- KR20140059567A KR20140059567A KR1020120126147A KR20120126147A KR20140059567A KR 20140059567 A KR20140059567 A KR 20140059567A KR 1020120126147 A KR1020120126147 A KR 1020120126147A KR 20120126147 A KR20120126147 A KR 20120126147A KR 20140059567 A KR20140059567 A KR 20140059567A
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- KR
- South Korea
- Prior art keywords
- ring
- chuck table
- clamp ring
- wafer
- focus ring
- Prior art date
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
- H01L21/67069—Apparatus for fluid treatment for etching for drying etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32623—Mechanical discharge control means
- H01J37/32642—Focus rings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32715—Workpiece holder
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68721—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by edge clamping, e.g. clamping ring
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Plasma & Fusion (AREA)
- Chemical & Material Sciences (AREA)
- Analytical Chemistry (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Drying Of Semiconductors (AREA)
Abstract
A semiconductor etching apparatus according to an embodiment of the present invention includes a process chamber in which a reaction gas is supplied and a reaction region is defined, an upper electrode disposed inside the process chamber and spaced apart from an upper electrode and a lower electrode to which a predetermined power is applied, A chuck table provided on the upper side of the lower electrode for placing the wafer w thereon, a coolant supply line passing through the lower electrode and the chuck table and communicating with the coolant, a periphery of the edge of the chuck table, A ring assembly surrounding the edge of the chuck table and surrounding a side of the wafer w; a focus ring disposed on the focus ring, a clamp ring covering a part of the clamp ring and a distance adjusting means for varying a distance between the clamp ring and the focus ring.
Description
An embodiment relates to a semiconductor etching apparatus.
Light Emitting Diode (LED) is a device that converts electrical signals into light by using the characteristics of compound semiconductors. It is widely used in household appliances, remote control, electric signboard, display, and various automation devices. There is a trend.
When a forward voltage is applied to the light emitting device, electrons in the n-layer and holes in the p-layer are coupled to emit energy corresponding to the energy gap between the conduction band and the valance band. It is mainly emitted in the form of heat or light, and when emitted in the form of light, it becomes an LED.
Nitride semiconductors have attracted great interest in the development of optical devices and high output electronic devices due to their high thermal stability and wide band gap energy. Particularly, blue light emitting devices, green light emitting devices, ultraviolet (UV) light emitting devices, and the like using nitride semiconductors have been commercialized and widely used.
The light emitting device package is manufactured by manufacturing a light emitting device on a substrate, separating the light emitting device chip through dieseparation, which is a sawing process, and then diebonding the light emitting device chip to a package body. Wire bonding and molding can be performed, and the test can proceed.
As the fabrication process of the light emitting device chip and the packaging process are performed separately, various complex processes and various substrates may be required.
The light emitting device package has a structure in which a light emitting element and a lead frame are disposed in a body, and a lens type structure in which a light emitting element is disposed on a lead frame and a lens structure is formed on a lead frame.
Generally, a light emitting device is fabricated through an etching and cutting process in a wafer. A wafer is formed with a semiconductor structure on a substrate, which requires various etching depending on the use of the semiconductor.
In addition, the substrate in the wafer is formed of sapphire or the like, and the semiconductor structure is a semiconductor having a composition formula of In x Al y Ga 1-xy N (0 = x = 1, 0 = y = 1, 0 = x + Materials such as GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, and the like. Since the compositions of the wafers are different, there is a difference in the cooling method at the time of etching and the ambient atmosphere. Therefore, in order to etch the wafer, it is inconvenient to etch the semiconductor structure, to replace the equipment in the chamber, to adjust the fixing position of the wafer or the fixing pressure, and to perform the etching process again.
The embodiment provides a semiconductor etching apparatus capable of proceeding a plurality of processes without performing a separate chamber operation.
A semiconductor etching apparatus according to an embodiment of the present invention includes a process chamber in which a reaction gas is supplied and a reaction region is defined, an upper electrode disposed inside the process chamber and spaced apart from an upper electrode and a lower electrode to which a predetermined power is applied, A chuck table provided on the upper side of the lower electrode for placing the wafer thereon, a coolant supply line passing through the lower electrode and the chuck table and communicating with the coolant, a periphery of the edge of the chuck table, Wherein the ring assembly includes a focus ring surrounding an edge of the chuck table and surrounding a side of the wafer, a clamp ring disposed on the focus ring and covering a portion of the wafer, And distance adjusting means for varying the distance between the ring and the focus ring.
Conventionally, in order to perform the etching process of the semiconductor structure and the substrate, a process of opening and assembling the chamber is required, which is complicated. However, according to the embodiment, there is an advantage that the process can be simplified and the process time can be shortened.
Further, according to the embodiment, it is possible to improve the yield reduction due to the inflow of foreign matter that may occur when the chamber is opened and closed.
Further, there is an advantage of preventing the outflow of the refrigerant gas at the time of etching the substrate.
Further, since the clamp ring can appropriately hold the pressure at which the wafer is pressed, there is an advantage of preventing breakage of the semiconductor structure by the clamp ring.
1 is a cross-sectional view showing a cross section of a semiconductor etching apparatus according to an embodiment,
FIG. 2 is a sectional view showing a cross section of a semiconductor etching apparatus according to another embodiment,
3 is a sectional view showing a cross section of a semiconductor etching apparatus according to still another embodiment,
4 is a sectional view showing a cross section of a semiconductor etching apparatus according to still another embodiment,
5 is a structural view showing a cross section of the chuck table according to the embodiment.
BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention and the manner of achieving them will become apparent with reference to the embodiments described in detail below with reference to the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. To fully disclose the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims. Like reference numerals refer to like elements throughout the specification.
The terms spatially relative, "below", "beneath", "lower", "above", "upper" May be used to readily describe a device or a relationship of components to other devices or components. Spatially relative terms should be understood to include, in addition to the orientation shown in the drawings, terms that include different orientations of the device during use or operation. For example, when inverting an element shown in the figures, an element described as "below" or "beneath" of another element may be placed "above" another element. Thus, the exemplary term "below" can include both downward and upward directions. The elements can also be oriented in different directions, so that spatially relative terms can be interpreted according to orientation.
The terminology used herein is for the purpose of illustrating embodiments and is not intended to be limiting of the present invention. In the present specification, the singular form includes plural forms unless otherwise specified in the specification. It is noted that the terms "comprises" and / or "comprising" used in the specification are intended to be inclusive in a manner similar to the components, steps, operations, and / Or additions.
Unless defined otherwise, all terms (including technical and scientific terms) used herein may be used in a sense commonly understood by one of ordinary skill in the art to which this invention belongs. Also, commonly used predefined terms are not ideally or excessively interpreted unless explicitly defined otherwise.
The thickness and size of each layer in the drawings are exaggerated, omitted, or schematically shown for convenience and clarity of explanation. Also, the size and area of each component do not entirely reflect actual size or area.
Further, the angle and direction mentioned in the description of the structure of the light emitting device in the embodiment are based on those shown in the drawings. In the description of the structure of the light emitting device in the specification, reference points and positional relationship with respect to angles are not explicitly referred to, refer to the related drawings.
Hereinafter, embodiments will be described in detail with reference to the drawings.
1 is a cross-sectional view showing a section of a semiconductor etching apparatus according to an embodiment.
Referring to FIG. 1, a semiconductor etching apparatus according to an embodiment of the present invention includes a
The etching object may be an object to be visualized by the semiconductor etching apparatus, for example, a wafer w. In the following description, the wafers w are used to describe the crucible.
The
The
A reaction gas may be supplied into the
The
A Dome Temp Control Unit (DTCU) (hereinafter, referred to as " DTCU ") functioning as an auxiliary chamber that is connected to the RF power and supplied with RF energy and maintains the temperature inside the
The upper chamber may be formed with a
The
1, the
Above the
The
The
The
In order to perform the plasma etching process, the inside of the
The
The
A chuck table 126 on which the wafer W is seated is formed on the
The chuck table 126 is disposed within the
The chuck table 126 can be lifted and lowered by the lifting means 140 so as to be able to move relative to the ring assembly. For example, the
As another example, the position of the chuck table 126 is fixed, and the ring assembly may be reciprocated up and down by the
Preferably, the chuck table 126 may include an electrostatic chuck (ESC). The electrostatic chuck chucks the wafer w using the dielectric polarization phenomenon generated by the potential difference and the electrostatic principle.
Here, the wafer w is an example of a crucible. Therefore, the crucible is not limited to this, and may include other products.
The
The ring assembly fixes the wafer w that is seated on the chuck table 126 and tightly contacts the wafer w with the chuck table 126 to prevent the refrigerant from flowing out.
The ring assembly may have various shapes, but it may have a shape corresponding to the shape of the wafer w, and has a rough ring shape.
The ring assembly may include a
The
The
The
The distance adjusting means 171 varies the distance between the
In general, a wafer (w) is formed with a semiconductor structure on a substrate, which requires various etching depending on the use of the semiconductor.
In the wafer w, the substrate is formed of sapphire or the like, and the semiconductor structure has a composition formula of In x Al y Ga 1-xy N (0 = x = 1, 0 = y = 1, 0 = x + y = 1) For example, GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, and the like. Since the compositions of the wafers w are different from each other, the cooling method at the time of etching and the ambient atmosphere are different. Therefore, in order to etch the wafer w, it is inconvenient to etch the semiconductor structure, to replace the equipment in the chamber, to adjust the fixing position or the fixing pressure of the wafer w, and to perform the etching process again. In other words, there is a problem that the visual process can not be unified.
Particularly, the semiconductor structure in the wafer w is likely to be damaged by the external pressure. When the semiconductor structure is pressed against the chuck table 126 by applying pressure to the
By varying the distance between the
Therefore, when the
Therefore, conventionally, in order to perform the etching process of the semiconductor structure and the substrate, it is necessary to open and assemble the chamber. However, according to the embodiment, the process can be simplified and the process time can be shortened. Further, according to the embodiment, it is possible to improve the yield reduction due to the inflow of foreign matter that may occur when the chamber is opened and closed.
Further, there is an advantage of preventing the outflow of the refrigerant gas at the time of etching the substrate.
2 is a cross-sectional view of a semiconductor etching apparatus according to another embodiment.
The distance adjusting means 171 may include a
For example, the
As another example, it is also possible to arrange them in reverse to the above.
3 is a cross-sectional view showing a cross section of a semiconductor etching apparatus according to another embodiment.
The distance adjusting means 170 includes a
The
The driving
The driving
4 is a cross-sectional view showing a cross section of a semiconductor etching apparatus according to still another embodiment.
The distance adjusting means 170 is connected to either the
For example, a rod 175 is coupled to the
Here, the
5 is a structural view showing a cross section of the chuck table according to the embodiment.
A
While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, It should be understood that various modifications may be made by those skilled in the art without departing from the spirit and scope of the present invention.
Claims (9)
An upper electrode 102 installed inside the process chamber and to which a predetermined electric power is applied;
A lower electrode 124 spaced apart from the upper electrode 102 and to which a predetermined electric power is applied to convert the reaction gas into a plasma state;
A chuck table 126 mounted on the lower electrode 124 and on which the pedestal is placed;
A refrigerant supply line (150) for supplying a refrigerant for cooling the cooking utensil; And
And a ring assembly that surrounds the edge of the chuck table (126) and fixes the casting object,
The ring assembly includes:
A focus ring 128 surrounding the edge of the chuck table 126 and surrounding a side of the wedge angle 126;
A clamp ring (129) disposed on the focus ring (128) and covering a part of the crucible; And
And distance adjusting means (170) for varying the distance between the clamp ring (129) and the focus ring (128).
Wherein an inner diameter of the clamp ring (129) is smaller than an inner diameter of the focus ring (128).
Wherein an inner diameter of the clamp ring (129) is formed to be smaller than an outer diameter of the projected product.
The distance adjusting means (170)
And a rotary screw (171) rotatably fixed to one of the clamp ring (129) and the focus ring (128) and screwed to the other.
The distance adjusting means (170)
A screw pin 172 rotatably fixed to one of the clamp ring 129 and the focus ring 128 and screwed to the other one;
And a driving unit (173) for rotating the screw pin (172).
The distance adjusting means (170)
A rod 175 coupled to one of the clamp ring 129 and the focus ring 128 and passing through the other of the clamp ring 129 and the focus ring 128;
And a cylinder (174) reciprocating the rod (175) and coupled to the other.
Wherein one of the chuck table (126) and the ring assembly is raised and lowered.
Wherein the refrigerant comprises helium.
The refrigerant supply line (150)
And is formed to penetrate through the lower electrode (124) and the chuck table (126).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020120126147A KR102031666B1 (en) | 2012-11-08 | 2012-11-08 | Semiconductor etching apparatus |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020120126147A KR102031666B1 (en) | 2012-11-08 | 2012-11-08 | Semiconductor etching apparatus |
Publications (2)
Publication Number | Publication Date |
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KR20140059567A true KR20140059567A (en) | 2014-05-16 |
KR102031666B1 KR102031666B1 (en) | 2019-10-14 |
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KR1020120126147A KR102031666B1 (en) | 2012-11-08 | 2012-11-08 | Semiconductor etching apparatus |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102562102B1 (en) | 2023-03-02 | 2023-08-02 | (주)본씨앤아이 | Cooling system for semiconductor facilities using eco-friendly refrigerant |
CN112713075B (en) * | 2019-10-25 | 2024-03-12 | 中微半导体设备(上海)股份有限公司 | Plasma isolation ring, plasma processing device and substrate processing method |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05140771A (en) * | 1991-11-15 | 1993-06-08 | Nissin Electric Co Ltd | Etching apparatus |
JP2000072529A (en) * | 1998-08-26 | 2000-03-07 | Toshiba Ceramics Co Ltd | Plasma-resistant member and plasma-treatment apparatus using the same |
KR20110077575A (en) * | 2009-12-30 | 2011-07-07 | 주식회사 탑 엔지니어링 | Focus ring of plasma processing apparatus and plasma processing apparatus having the same |
-
2012
- 2012-11-08 KR KR1020120126147A patent/KR102031666B1/en active IP Right Grant
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05140771A (en) * | 1991-11-15 | 1993-06-08 | Nissin Electric Co Ltd | Etching apparatus |
JP2000072529A (en) * | 1998-08-26 | 2000-03-07 | Toshiba Ceramics Co Ltd | Plasma-resistant member and plasma-treatment apparatus using the same |
KR20110077575A (en) * | 2009-12-30 | 2011-07-07 | 주식회사 탑 엔지니어링 | Focus ring of plasma processing apparatus and plasma processing apparatus having the same |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112713075B (en) * | 2019-10-25 | 2024-03-12 | 中微半导体设备(上海)股份有限公司 | Plasma isolation ring, plasma processing device and substrate processing method |
KR102562102B1 (en) | 2023-03-02 | 2023-08-02 | (주)본씨앤아이 | Cooling system for semiconductor facilities using eco-friendly refrigerant |
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Publication number | Publication date |
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KR102031666B1 (en) | 2019-10-14 |
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