KR20140022344A - Switch control device, power supply device comprising the same, and driving method of power supply device - Google Patents

Abstract

The present invention relates to a switch control device, a power supply device including the switch control device, and a driving method thereof. AC input of the power supply device is connected to a rectifier circuit. The power supply device comprises a power switch in which input current of the rectifier circuit flows in during an on-period and the switch control device. The switch control device detects a half-on point, generates a modulation waveform by controlling a predetermined reference waveform according to a detected voltage, and controls a switching operation of the power switch according to the modulation waveform. [Reference numerals] (200) Half-on detection unit; (300) Current detector

Description

TECHNICAL FIELD [0001] The present invention relates to a switch control apparatus, a power supply apparatus including the same, and a driving method thereof. BACKGROUND OF THE INVENTION 1. Field of the Invention [0001]

An embodiment of the present invention relates to a switch control apparatus and a power supply apparatus including the switch control apparatus. In addition, an embodiment of the present invention relates to a method of driving a power supply apparatus.

The LED row includes a plurality of LED elements connected in series. Conventionally, the peak of the LED current is sensed to constantly control the LED current supplied to the LED heat (Constant Current control, hereinafter, CC control).

Under conditions where a buck converter is used to supply the LED current, variations in the input voltage, inductor, and output voltage affect the LED current.

For example, when the input voltage of the buck converter is lower than the output voltage, no power is supplied to the output stage. Specifically, when the input voltage follows a sine wave and the output voltage is maintained at a constant level, a section in which the input voltage is smaller than the output voltage occurs. Since no power supply operation is performed during this period, the LED current changes with this period.

In addition, the ripple of the inductor current changes according to the inductance of the inductor. For example, the smaller the inductance, the higher the ripple. Since the LED current is estimated as the average of the inductor current, the LED current decreases as the ripple increases.

As such, errors in the LED current occur due to the influence of the input voltage, output voltage, and inductor.

The present invention provides a switch control device, a switch control method, and a power supply including the same, in which the LED current is generated under CC control by reducing the error of the LED current.

The power supply apparatus according to the embodiment of the present invention includes a rectifier circuit connected to an AC input, a power switch through which the input current flows through the rectifier circuit during an on-period, and a switch control device.

The switch control device detects a half-on time point, which is an intermediate time point of the on-period, detects a sensing voltage corresponding to a current flowing through the power switch during the on-period at the half-on time point, and detects the detected voltage. The modulation waveform is generated by adjusting the reference waveform according to the voltage, and the switching operation of the power switch is controlled according to the modulation waveform.

The switch control device receives the sensing voltage at the half-on time, generates a current sensing voltage, generates a feedback voltage according to a difference between the current sensing voltage and a predetermined reference voltage, and feeds the reference waveform to the feedback. Adjust according to the voltage.

The switch control device may include a current detector configured to receive the sensed voltage according to a half-on pulse generated in synchronization with the half-on time and generate the current sensed voltage, and according to a difference between the current sensed voltage and the reference voltage. A feedback unit for generating an increasing or decreasing feedback voltage, and a sinusoidal control unit for generating the modulation waveform by multiplying the feedback voltage by the reference waveform.

The current detector may include a buffer including an input terminal connected to the sensing voltage, a detection switch connected to an output terminal of the buffer and switching according to the half-on pulse, and a sensing voltage transmitted through the detection switch. A capacitor to be stored.

The feedback unit includes a first terminal to which the reference voltage is input and a second terminal to which the current sensing voltage is input, and amplifies a difference between an input of the first terminal and an input of the second terminal to generate an output. An error amplifier, and a capacitor to which the output of the error amplifier is delivered.

The switch control device is configured to sample a voltage divided by half the voltage charged during the on-period of the immediately preceding switching period by a half-on reference voltage, and the voltage charged during the on-period of the current switching period is half The apparatus further includes a half-on detector configured to detect the time point at which the on-reference reference voltage is reached as the half-on time point.

The half-on detector may include a sampling / reset signal generator configured to generate a sampling signal indicating sampling and a reset signal indicating reset in synchronization with a turn-off time of the power switch, and an ON-period of the power switch. A charging unit for generating a period voltage, a sampling unit for sampling the on-period voltage according to the sampling signal and generating a half-on reference voltage by dividing the sampled voltage in half, and the half-on reference voltage and the on A half-on pulse generator for comparing the period voltages and generating half-on pulses synchronized to the half-on timing according to the comparison result.

Wherein the sampling / reset signal generator comprises: an inverter for outputting a level inverted from a gate voltage for controlling the switching operation of the power switch; a first delay unit delaying the gate voltage by a predetermined first delay period and outputting the delayed signal; An AND gate for generating a sampling signal by performing an AND operation on the output of the first delay unit and the output of the first delay unit, and a second delay unit for delaying and outputting the sampling channel by a predetermined second delay period.

The charging unit includes a capacitor, a current source for generating a charging current, a charging switch connected between the current source and the capacitor and turned on during an on-period of the power switch, and connected in parallel with the capacitor, and the reset It includes a reset switch for switching in accordance with the signal.

Wherein the sampling unit comprises: a sampling switch for switching in accordance with the sampling signal and transmitting the on-period voltage to a first contact; a capacitor connected between the first contact and ground; And a voltage of a second contact to which the first resistor and the second resistor are connected is the half-on reference voltage.

The half-on pulse generator includes a comparator for outputting a result of comparing the on-period voltage and the half-on reference voltage, an inverter for inverting and outputting the output of the comparator, And an AND gate for generating the half-on pulse by performing a logical product of the output of the delay unit and the output of the comparator.

The reference waveform may be a waveform synchronized with the frequency of the AC input. The switch control device detects a zero voltage crossing point of the input voltage, detects one period of the input voltage, and generates the reference waveform having a period equal to one period of the input voltage. Alternatively, the reference waveform may be a DC voltage.

According to an exemplary embodiment of the present disclosure, a method of driving a power supply device may include detecting input of an input current flowing from an AC input through an electric power switch during an on-period of a power switch, and a half-on time, which is an intermediate point of the on-period. Detecting a sensed voltage corresponding to a current flowing through the power switch at the half-on time; generating a modulated waveform by adjusting a reference waveform according to the detected voltage; and generating the modulated waveform and the sensed voltage. And switching the power switch according to a result of comparing.

The detecting of the sensing voltage at the half-on time includes generating the current sensing voltage by storing the sensing voltage in a capacitor at the half-on time.

The generating of the modulation waveform may include generating a feedback voltage according to a difference between the current sensing voltage and a predetermined reference voltage, and adjusting the reference waveform according to the feedback voltage.

Adjusting the reference waveform according to the feedback voltage includes multiplying the reference waveform by the feedback voltage.

The step of detecting the half-on time comprises: sampling the charged voltage during half-on-half half-on voltage reference during the on-period of the immediately preceding switching period of the power switch; On point of time when the voltage that has reached the half-on reference reference pressure reaches the half-on reference reference pressure.

Switching the power switch includes turning off the power switch when the sense voltage reaches the modulation waveform.

Switch control apparatus according to an embodiment of the present invention is applied to a power supply for converting an AC input according to the switching operation of the power switch.

The switch control device is configured to sample a voltage divided by half the voltage charged during the on-period of the immediately preceding switching period by a half-on reference voltage, and the voltage charged during the on-period of the current switching period is half A half-on detector that detects a time point when an on-reference reference voltage is reached as the half-on time point, a current detector that receives the sensed voltage at the half-on time point and generates a current sense voltage, A feedback unit for generating a feedback voltage according to a difference between the reference voltages, and a sine wave controller for adjusting a reference waveform synchronized with the AC input frequency according to the feedback voltage.

The half-on detector may include a sampling / reset signal generator configured to generate a sampling signal indicating sampling and a reset signal indicating reset in synchronization with a turn-off time of the power switch, and an ON-period of the power switch. A charging unit for generating a period voltage, a sampling unit for sampling the on-period voltage according to the sampling signal and generating a half-on reference voltage by dividing the sampled voltage in half, and the half-on reference voltage and the on A half-on pulse generator for comparing the period voltages and generating half-on pulses synchronized to the half-on timing according to the comparison result.

 By reducing the error of the LED current to provide a switch control device, a switch control method, and a power supply including the LED current is generated according to the CC control.

1 is a view showing a switch control device and a buck converter including the same according to an embodiment of the present invention.
2 is a view showing an LED current according to an embodiment of the present invention.
3 is a diagram illustrating a half-on detector according to an exemplary embodiment of the present invention.
4 is a waveform diagram illustrating a gate control signal, a sampling signal, a reset signal, an on-period voltage, and a half-on pulse according to an exemplary embodiment of the present invention.
5 is a view showing the configuration of a current detector according to an embodiment of the present invention.
6 is a diagram illustrating a gate control signal, a half-on pulse, and a sense voltage according to an exemplary embodiment of the present invention.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. In order to clearly illustrate the present invention, parts not related to the description are omitted, and similar parts are denoted by like reference characters throughout the specification.

Throughout the specification, when a part is referred to as being "connected" to another part, it includes not only "directly connected" but also "electrically connected" with another part in between . Also, when an element is referred to as "comprising ", it means that it can include other elements as well, without departing from the other elements unless specifically stated otherwise.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

1 is a view showing a switch control device and a buck converter including the same according to an embodiment of the present invention. The buck converter 10 is connected to the LED string 20. The LED row 20 includes a plurality of LED elements that are connected in series.

The buck converter 10 includes a rectifier circuit 30, an EMI filter 40, a diode FRD, an inductor L, a power switch M, a sense resistor RS and a switch control device 100 .

The rectifier circuit 30 is implemented as a bridge diode, includes four rectifier diodes 31-34, two input terminals 35 and 36 connected to an AC input AC, a first stage 37 connected to ground, And a second stage 38 coupled to the LED column 20.

The rectifying circuit 30 performs full-wave rectification of the AC input AC to generate an input voltage Vin. The input voltage Vin is a full-wave rectified sinusoidal wave. During the ON period of the power switch M, the current generated from the AC input (AC) flows back to the AC input (AC) through the ground. This current is rectified through the rectifier circuit 30 to become the input current Iin.

The EMI filter 40 removes the noise generated in the power supply line connected to the AC input AC through the rectifying circuit 30 to protect the device or circuit located at the next stage. EMI filter 40 includes two inductors L1 and L2 and two capacitors C1 and C2.

The inductor L1 includes one end connected to the second end 38 of the rectifier circuit 30 and the other end connected to the LED column 20, and the inductor L2 includes the first end of the rectifier circuit 30. One end connected to the stage 37 and the other end connected to the ground. The capacitor C1 is connected to one end of the inductor L1 and one end of the inductor L2 and the capacitor C2 is connected to the other end of the inductor L2 and the other end of the inductor L2.

The power switch M is switched according to the gate voltage VG transmitted from the switch control device 100. The power switch M is implemented with an n-channel metal oxide semiconductor filed effect transistor (NMOSFET). The present invention is not limited thereto, and other types of transistor elements may be applied as necessary.

One end of the LED string 20 is connected to the input voltage Vin through the EMI filter 40 and the other end of the LED string 20 is connected to one end of the inductor L. [ The diode FRD is connected to the drain electrode of the power switch M and one end of the LED column 20. During the period in which the power switch M is in the off state, free wheeling current flowing through the LED column 20 and the inductor L flows through the diode FRD.

The drain electrode of the power switch M is connected to the other end of the inductor L, and the source electrode thereof is connected to one end of the sense resistor RS. The gate voltage VG transmitted from the switch control device 100 is input to the gate electrode of the power switch M. The power switch M is switched by the gate voltage VG.

When the power switch M is turned on, the inductor current IL, which increases with the input voltage Vin, flows through the LED column 20 and the power switch M, and the inductor L has an inductor current IL. Energy is stored. At this time, a current flowing through the power switch M (hereinafter referred to as a drain current IDS) flows through the sensing resistor RS to generate a sensing voltage VS.

When the power switch M is turned off, the inductor current IL flows during the period of the energy stored in the inductor L during the turn on period. At this time, the inductor current IL decreases. At this time, the decreasing inductor current flows to the LED column 20 through the diode FRD.

During the turn-on period of the power switch M, the input current Iin flows from the AC input AC through the power switch M and ground again to the AC input AC. At this time, the input current Iin, the LED current ILED, and the drain current IDS are the same. During the turn-off period of the power switch M, the input current Iin and the drain current IDS are not generated, and the LED current ILED freeways through the diode FRD.

Since the LED current ILED and the inductor current IL are the same, they are not distinguished. Input current (Iin) and LED current (ILED) are also the same except for noise components.

The switch control device 100 detects a half-on time point, which is an intermediate point of the power switch M on-period, and uses the sensing voltage VS of the half-on time point for the switching period of the power switch M during the switching period. Calculate the LED current (ILED).

The LED current ILED during the switching cycle of the power switch M is set to the average of the LED current ILED during the switching cycle of the power switch M. FIG. The LED current ILED increases during the on-period of the power switch M and decreases during the off-period. The average of the LED current (ILED) during this period is equal to the value at the half-on time point.

2 is a view showing an LED current according to an embodiment of the present invention. The waveform of the LED current ILED shown in FIG. 2 is a period of one cycle of switching of the power switch M. FIG.

As shown in FIG. 2, the LED current ILED increases during the on-period TO of the power switch M, and the LED current ILED decreases during the off-period T2. At this time, the LED current ILED value of the half-on time point T1, which is the middle time point of the on-period T0, is an average of the switching period T0 + T2 of the power switch M. FIG.

As shown in FIG. 2, since the regions S1 and S2 indicated by the horizontal lines are the same, and the regions S3 and S4 indicated by the vertical lines are the same, the LED current ILED value of the half-on time point T1 is the power switch M. FIG. Is the average over one switching cycle.

In the embodiment of the present invention, the reference sine wave is adjusted according to the LED current (ILED) at the half-on time, so that the LED current (ILED) is not affected by the input voltage, the output voltage, and the inductance of the inductor (L). To follow.

Specifically, the switch control apparatus 100 calculates the LED current ILED for each switching cycle of the power switch M, and adjusts the reference sine wave SREF according to the calculated LED current ILED to modulate the sine wave MREF. Next, the switching operation is controlled according to the result of comparing the modulated sine wave MREF and the sensed voltage VS according to the drain current IDS.

For example, the switch control device 100 turns off the power switch M at the time when the sensing voltage VS reaches the modulation sine wave MREF, and the rising edge of the clock signal CLK that determines the switching frequency. At this point, the power switch M is turned on.

The switch control device 100 includes a sine wave generator 110, an off comparator 120, an oscillator 130, an SR flip-flop 140, a gate driver 150, a half-on detector 200, and a current detector 300. ), A feedback unit 400, and a sinusoidal wave control unit 500.

The sinusoidal wave generating unit 110 detects a zero voltage crossing point of the input voltage Vin and detects one period of the input voltage Vin and generates a sinusoidal wave having a reference sinusoidal wave (SREF). The reference sinusoidal wave SREF is an example of a reference waveform synchronized with an AC input frequency, and the reference waveform of the present invention is not limited to a sine wave. For example, as shown in FIG. 1, the reference waveform may be one of a sine wave SREF1, a triangle wave SREF2, and a square wave SERF3.

Alternatively, a DC voltage not synchronized to the AC input frequency may be used as the reference waveform.

The sine wave controller 500 generates a modulated sine wave MREF by adjusting the reference sine wave SREF according to the feedback voltage FB. The sinusoidal control unit 500 may generate a modulated sinusoidal wave MREF by multiplying the feedback voltage FB by the reference sinusoidal wave SREF. The modulated sine wave MREF is generated only according to the reference sine wave SREF, and the modulated waveform of the present invention is not limited to the modulated sine wave. Since the reference waveform is adjusted according to the feedback voltage to generate a modulated waveform, the modulated waveform is changed according to the reference waveform.

The off comparator 120 compares the modulated sine wave MREF and the sensed voltage VS, so as to turn off the power switch M when the sensed voltage VS reaches the modulated sine wave MREF. Generates an OFF signal (OFF).

The modulated sine wave MREF is input to the inverting terminal (-) of the off comparator 120, the sensing voltage VS is input to the non-inverting terminal + of the off comparator 120, and the off comparator 120 is non-comparable. When the input of the inverting terminal (+) is more than the input of the inverting terminal (-) generates a high level off signal (OFF), and vice versa generates a low level off signal (OFF).

The oscillator 130 generates a clock signal CLK that determines the switching period of the power switch M. [

The SR flip-flop 140 generates a gate control signal VGC that turns on the power switch M in accordance with the clock signal CLK and a gate control signal VGC that turns off the power switch M in response to the off signal And generates the control signal VGC. The SR flip-flop 140 includes a set stage S to which the clock signal CLK is input and a reset stage R to which the OFF signal OFF is input.

The SR flip-flop 140 generates a high level gate control signal VGC when the set S input is at a high level and generates a low level gate control signal VGC when the reset input R is at a high level. .

The gate driver 150 generates the gate voltage VG in accordance with the gate control signal VGC. For example, the gate driver 150 generates a gate voltage VG of a high level (an enable level) in accordance with a gate control signal VGC of a high level, And generates a gate voltage VG of a low level (disable level).

The half-on detector 200 is sampled by dividing the charged voltage in half during the on-period of the previous switching cycle (hereinafter referred to as the half-on reference voltage) (HRV) and the voltage charged during the on-period of the current switching cycle. The half-on time point is detected according to the comparison result.

That is, the time when the voltage charged from the time when the power switch M is turned on reaches the half-on reference voltage HRV set in the immediately preceding switching period is detected as the half-on time of the current switching cycle.

Hereinafter, the half-on detector 200 will be described with reference to FIG. 3.

3 is a diagram illustrating a half-on detector according to an exemplary embodiment of the present invention.

As shown in FIG. 3, the half-on detector 200 includes a sampling / reset signal generator 210, a charging unit 220, a sampling unit 230, and a half-on pulse generator 240. . The half-on detector 200 shown in FIG. 1 receives a gate control signal VGC. However, the exemplary embodiment of the present invention is not limited thereto and may receive the gate voltage VG instead of the gate control signal VGC.

The sampling / reset signal generator 210 generates a sampling signal VSA for indicating sampling and a reset signal VRE for indicating reset in synchronization with the turn-off time of the power switch M. FIG. The sampling / reset signal generator 210 may detect a turn off time using the gate control signal VGC.

The sampling / reset signal generator 210 includes an inverter 211, a delay unit 212, an AND gate 213, and a delay unit 214.

The inverter 211 outputs a level inverting the gate control signal VGC. The inverter 211 outputs a low level inverting the high level gate control signal VGC, and outputs a high level inverting the low level gate control signal VGC.

The delay unit 212 receives the gate control signal VGC and delays the gate control signal VGC by a predetermined first delay period DL1 and outputs the delayed gate control signal VGC.

The AND gate 213 receives the output of the inverter 211 and the output of the delay unit 212 and performs a logical product of the inputs to generate a sampling signal VSA.

The delay unit 214 receives the sampling signal VSA and delays the sampling signal VSA by a predetermined second delay period DL2 and outputs the delayed signal as the reset signal VRE. In the embodiment of the present invention, the first delay period DL1 and the second delay period DL2 are set to be the same.

The charging unit 220 generates the on-period voltage VON in accordance with the on-period. The charging unit 220 generates the on-period voltage VON by charging the capacitor 223 with the charging current ICH1 during the on-period according to the gate control signal VGC, and generates the on-period according to the reset signal VRE. The period voltage VON is reset.

The charging unit 220 includes a current source 221, a charging switch 222, a capacitor 223, and a reset switch 224.

The current source 221 is connected to the voltage VCC and generates the charging current ICH1 using the voltage VCC.

The charge switch 222 includes one end connected to the current source 221 and the other end connected to the capacitor 223 and switches according to the gate control signal VGC. The charge switch 222 is turned on by the enable level (high level in the embodiment of the present invention) of the gate control signal VGC.

During the turn-on period of the charge switch 222, the capacitor 223 is charged by the charge current ICH1, and the on-period voltage VON rises. The other end of the capacitor 223 is connected to the ground.

The reset switch 224 includes one end connected to one end of the capacitor 223 and the other end connected to the ground, and switches according to the reset signal VRE. The reset switch 224 is turned on by the high level reset signal VRE to discharge the capacitor 223. Then, the on-period voltage VON is reset to zero voltage.

The sampling unit 230 samples the on-period voltage VON in accordance with the sampling signal VSA and divides the sampled voltage by half to generate a half-on voltage reference HRV.

The sampling unit 230 includes a sampling switch 231, a capacitor 232, and two resistors 233 and 234.

The sampling switch 231 includes one end connected to the on-period voltage VON and the other end connected to the contact N1 and switches according to the sampling signal VSA. The sampling switch 231 is turned on by the high level sampling signal VSA.

The capacitor 232 includes one end connected to the contact point N1 and the other end connected to the ground. The resistor 233 is connected between the contact N1 and the contact N2 and the resistor 234 is connected between the contact N2 and the ground.

The voltage of the contact point N1 during the on-period of the sampling switch 231 is equal to the on-period voltage VON, the sampling switch 231 is turned off, and the on-period voltage VON by the capacitor 232. ) Is maintained.

The voltage of the contact N1 is distributed by the resistor 233 and the resistor 234 and the divided voltage becomes the voltage of the contact N2, that is, the half-on reference voltage HRV. Since the resistance values of the resistors 233 and 234 are the same, the half-on reference voltage HRV is half of the voltage of the contact N1, that is, the sampled on-period voltage VON.

As such, the sampling unit 230 samples one half of the on-period voltage VON that has increased during the on-period of the power switch M, with the half-on reference voltage HRV.

The half-on pulse generator 240 compares the half-on reference voltage HRV and the on-period voltage VON and generates a half-on pulse HOP synchronized to the half-on time point according to the comparison result. do.

The half-on pulse generator 240 includes a comparator 241, an inverter 242, a delay unit 243, and an AND gate 244.

The comparator 241 includes a non-inverting terminal (+) to which the on-period voltage VON is input and an inverting terminal (-) to which the half-on voltage VH is input, Outputs a high level when the input of the inverted terminal (-) is abnormal, and outputs a low level when the input is opposite.

The inverter 242 receives the output of the comparator 241 and outputs a level inverted from the output of the comparator 241.

The delay unit 243 receives the output of the inverter 242, delays the output of the inverter 242 by the third delay period DL3, and outputs the delayed signal.

The AND gate 244 receives the output of the delay unit 243 and the output of the comparator 241 and generates a half-on pulse HOP by performing a logical multiplication on the two inputs.

Hereinafter, an operation of the half-on detector 200 according to an exemplary embodiment of the present invention will be described with reference to FIG. 4.

4 is a waveform diagram illustrating a gate control signal, a sampling signal, a reset signal, an on-period voltage, and a half-on pulse according to an exemplary embodiment of the present invention.

As shown in FIG. 4, the gate control signal VGC rises to a high level at a time point T11, and the charge switch 222 is turned on and the on-period voltage VON starts to increase.

The increasing on-period voltage VON reaches the half-on reference voltage HRV at time T12, and the output of the comparator 241 becomes high level. The half-on reference voltage HRV at the time point T12 corresponds to half of the voltage charged in the capacitor 223 during the on period in the switching period immediately before the time point T11.

Since the output of the inverter 242 is at the high level at the time point T12 and the output of the comparator 241 is raised to the high level, the half-on pulse HOP of the high level is ANDed during the third delay period DL3 from the time point T12. From gate 244.

Since the low level output of the inverter 242 is input to the AND gate 244 at the time point T13 after the third delay period DL3 has elapsed from the time point T12, the half-on pulse HOP is at a low level.

The gate control signal VGC falls to the low level at the time point T14, and the output of the inverter 211 rises to the high level. Since the output of the delay unit 212 is at a high level at the time point T14, the AND gate 213 generates a high level sampling signal VSA at the time point T14.

The charge switch 222 is turned off at the time point T14, and the on-period voltage VON charged to the capacitor 223 during the turn-on period of the power switch M is kept constant from the time point T14.

Since the output of the delay unit 212 is at the low level at the time T15 after the first delay period DL1 has elapsed from the time T14, the sampling signal VSA is at the low level at the time T15. Therefore, the sampling signal VSA becomes a high level pulse during the period T14-T15.

The sampling switch 231 is turned on for the period T14-T15, and the on-period voltage VON is transmitted to the contact point N1. At a time point T15, the sampling switch 231 is turned off according to the low level sampling signal VSA, and the on-period voltage VON is maintained by the capacitor 232. The on-period voltage VON transmitted to the contact point N1 at the time point T14 has a level according to the on-period T11-T14, and the half-on reference voltage HRV is the value of the on-period voltage VON. Set to half.

The delay unit 214 delays the sampling signal VSA by the second delay period DL2 from the time point T14 and outputs the reset signal VRE at the time point T15. At the time point T15, the reset switch 224 is turned on by the reset signal VRE, and the on-period voltage VON becomes zero voltage.

The gate control signal VGC becomes a high level at the time point T16, and the half-on detector 200 from the time point T16 repeats the operation for the period T11-T15.

The first to third delay periods DL1 to DL3 may be set to a short time such as 300 ns. In FIG. 4, the first to third delay periods DL1 to DL3 are broadly illustrated. However, this is merely for convenience of description, and the first to third delay periods DL1 to DL3 are short periods.

Hereinafter, the current detector 300 and the feedback unit 400 according to an embodiment of the present invention will be described with reference to FIGS. 5 and 6.

5 is a view showing the configuration of a current detector according to an embodiment of the present invention. For convenience of description, the feedback unit 400 is illustrated together with the current detector 300 in FIG. 5.

6 is a diagram illustrating a gate control signal, a half-on pulse, and a sense voltage according to an exemplary embodiment of the present invention.

The current detector 300 generates the current sensing voltage VIL by sampling the sensing voltage VS according to the half-on pulse HOP.

The current detector 300 includes a buffer 310, a detection switch 320, and a capacitor 330.

The buffer 310 receives the sensing voltage VS and transfers the detected voltage VS to the next stage. The input terminal of the buffer 310 is connected to the sensing voltage VS, and the output terminal of the buffer 310 is connected to one end of the detection switch 320.

The detection switch 320 switches according to the half-on pulse HOP. The detection switch 320 is turned on by the high level half-on pulse HOP. The other end of the detection switch 320 is connected to one end of the capacitor 330.

The other end of the capacitor 330 is connected to ground, and the sensing voltage VS transmitted through the detection switch 320 is stored in the capacitor 330. That is, the sensing voltage VS when the detection switch 320 is turned on according to the half-on pulse HOP is stored in the capacitor 330.

Therefore, the sensing voltage VS corresponding to the LED current ILED at an intermediate point in the on-period of the power switch M is stored in the capacitor 330, and the voltage stored in the capacitor 330 is the current sensing voltage VIL. .

As shown in FIG. 6, the detection switch 320 is turned on at the time point T12, and the sensing voltage VS is stored in the capacitor 330. Since the time point T12 is an intermediate point in the on-period T11-T14, the current sense voltage VIL at the time point T12 is equal to the average of the LED current ILED during one switching period T11-T16 of the power switch M. Corresponding voltage.

The half-on pulse HOP is generated at the time point T17, and the detection switch 320 is turned on. Then, the current sense voltage VIL at the time point T17 becomes a voltage corresponding to the average of the LED current ILED during the next switching period of the power switch M. FIG.

The current sensing voltage VIL is transmitted to the feedback unit 400.

The feedback unit 400 generates a feedback voltage FB according to a difference between the current sensing voltage VIL and the reference voltage VR. For example, the feedback voltage FB is generated such that the difference between the current sense voltage VIL and the reference voltage VR decreases.

In detail, the feedback unit 400 includes an error amplifier 410 and a capacitor 420. The error amplifier 410 determines the output by amplifying the difference between the non-inverting terminal (+) and the inverting terminal (-) with a predetermined gain. The current sensing voltage VIL is input to the inverting terminal (−) of the error amplifier 410, and the reference voltage VR is input to the non-inverting terminal (+).

The error amplifier 410 subtracts the current sense voltage VIL from the reference voltage VR, amplifies the result, and transfers the result to the capacitor 420. The capacitance of the capacitor 420 is set sufficiently large, and the difference between the reference voltage VR and the current sense voltage VIL is added to the previous feedback voltage FB.

Then, the feedback voltage FB decreases when the current sensing voltage VIL updated at every switching period of the power switch M (for example, the half-on time point) is greater than the reference voltage VR, and the reference voltage is reduced. When smaller than (VR), the feedback voltage FB increases.

That is, as the LED current ILED increases, the feedback voltage FB decreases, and when the LED current ILED decreases, the feedback voltage FB increases. Since the modulated sine wave MREF is proportional to the feedback voltage FB, as the LED current ILED increases, the modulated sine wave MREF decreases, and when the LED current ILED decreases, the modulated sine wave MREF increases.

The off comparator 120 generates an off signal OFF for turning off the power switch M when the sensing voltage VS reaches the modulation sine wave MREF. Therefore, when the LED current ILED increases, the power comparator The duty of M) decreases, and the duty of the power switch M increases as the LED current ILED decreases. As such, the LED current ILED according to the embodiment of the present invention is controlled to a constant current.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, It belongs to the scope of right.

Buck converter 10, LED column 20, diode (FRD), rectifier circuit 30
EMI filter 40, inductor (L), power switch (M), sense resistor (RS)
Switch control device 100, rectifier diodes 31-34, sinusoidal wave generator 110
Off comparator 120, an oscillator 130, an SR flip-flop 140,
Gate driver 150, half-on detector 200, current detector 300
Sampling / reset signal generation unit 210, charging unit 220, sampling unit 230
Half-on pulse generator 240, inverters 211, 242
Delays 212, 214, 243, AND gates 213, 244, current source 221
Charge switch 222, reset switch 224, capacitors 223, 232, 330, 420
Sampling Switch 231, Resistors 233, 234, Comparator 241
Buffer 310, detection switch 320, error amplifier 410

Claims (22)

A rectifier circuit connected to the AC input,
A power switch through which an input current passed through the rectifying circuit flows during an on-period, and
A half-on time point, which is an intermediate time point of the on-period, is detected, a sensing voltage according to a current flowing through the power switch during the on-period is detected at the half-on time point, and a reference waveform is generated according to the detected voltage. And a switch control device for generating a modulation waveform by controlling the switching waveform and controlling a switching operation of the power switch according to the modulation waveform. The method of claim 1,
The switch control device includes:
A power to generate a current sense voltage by receiving the sense voltage at the half-on time, generate a feedback voltage according to a difference between the current sense voltage and a predetermined reference voltage, and adjust the reference waveform according to the feedback voltage Feeding device. 3. The method of claim 2,
The switch control device includes:
A current detector configured to receive the sensed voltage according to a half-on pulse generated in synchronization with the half-on time to generate the current sensed voltage,
A feedback unit generating a feedback voltage that increases or decreases according to a difference between the current sense voltage and the reference voltage, and
And a sinusoidal control unit configured to generate the modulated waveform by multiplying the feedback voltage by the reference waveform. The method of claim 3,
Wherein the current detector comprises:
A buffer comprising an input coupled to the sense voltage,
A detection switch connected to the output of the buffer and switching according to the half-on pulse, and
And a capacitor configured to store a sense voltage transferred through the detection switch. The method of claim 3,
The feedback unit,
An error amplifier including a first terminal to which the reference voltage is input and a second terminal to which the current sensing voltage is input, and generating an output by amplifying a difference between an input of the first terminal and an input of the second terminal;
And a capacitor to which the output of the error amplifier is delivered. The method of claim 1,
The switch control device includes:
The voltage divided by half during the on-period of the immediately preceding switching period of the power switch is sampled by a half-on reference voltage, and the voltage charged during the on-period of the current switching period reaches the half-on reference voltage. And a half-on detector for detecting one time point as the half-on time point. The method according to claim 6,
The half-on detector,
A sampling / reset signal generator for generating a sampling signal for instructing sampling in synchronization with a turn-off time of the power switch and a reset signal for instructing reset,
A charging unit for generating an on-period voltage in accordance with the on-period of the power switch,
A sampling unit for sampling the on-period voltage according to the sampling signal and dividing the sampled voltage by half to generate a half-on reference voltage;
And a half-on pulse generator for comparing the half-on voltage with the on-period voltage and generating a half-on pulse synchronized with the half-on time according to the comparison result. The method of claim 7, wherein
Wherein the sampling / reset signal generating unit comprises:
An inverter for outputting a level inverting a gate voltage for controlling the switching operation of the power switch,
A first delay unit delaying the gate voltage by a predetermined first delay period and outputting the delayed gate voltage;
An AND gate for performing an AND operation on the output of the inverter and the output of the first delay unit to generate a sampling signal;
And a second delay unit delaying the sampling clock by a predetermined second delay period and outputting the delayed signal. The method of claim 7, wherein
The charging unit includes:
Capacitors,
A current source for generating a charging current,
A charge switch connected between the current source and the capacitor, the charge switch being turned on during an on-period of the power switch,
And a reset switch connected to the capacitor in parallel and switching according to the reset signal. The method of claim 7, wherein
Wherein the sampling unit comprises:
A sampling switch for switching in accordance with the sampling signal and transmitting the on-period voltage to a first contact,
A capacitor connected between the first contact and ground, and
And first and second resistors connected in series between the first contact and the ground,
And a voltage of a second contact to which the first resistor and the second resistor are connected is the half-on reference voltage. The method of claim 7, wherein
Wherein the half-on pulse generating unit comprises:
A comparator for outputting a result of comparing the on-period voltage with the half-on voltage,
An inverter for inverting and outputting the output of the comparator,
A delay unit for delaying and outputting the output of the inverter by a third delay period,
And an AND gate for performing an AND operation on the output of the delay unit and the output of the comparator to generate the half-on pulse. The method of claim 1,
Wherein the reference waveform is a waveform synchronized with a frequency of the AC input. The method of claim 12,
The switch control device includes:
Detecting a zero voltage crossing point of the input voltage, detecting one period of the input voltage, and generating the reference waveform having the same period as one period of the input voltage. The method of claim 1,
Wherein the reference waveform is a DC voltage. Flowing an input current through the power switch from an AC input during an on-period of the power switch,
Detecting a half-on time which is an intermediate point of the on-period,
Detecting a sensing voltage corresponding to a current flowing through the power switch at the half-on time point;
Generating a modulated waveform by adjusting a predetermined reference waveform according to the detected voltage; and
And switching the power switch according to a result of comparing the modulation waveform with the sensed voltage. 16. The method of claim 15,
Detecting a sense voltage at the half-on time,
And storing the sense voltage in a capacitor at the half-on time to generate a current sense voltage. 16. The method of claim 15,
Generating the modulated waveform,
And generating a feedback voltage according to a difference between the current sensing voltage and a predetermined reference voltage, and adjusting the reference waveform according to the feedback voltage. 18. The method of claim 17,
Adjusting the reference waveform according to the feedback voltage,
And multiplying the reference waveform by the feedback voltage. 16. The method of claim 15,
The step of detecting the half-on-
Sampling the charged voltage in half-divided by a half-on reference voltage during the on-period of the immediately preceding switching period of the power switch, and
And detecting, as the half-on time point, when the voltage charged during the on-period of the current switching period reaches the half-on reference quasi-voltage. 16. The method of claim 15,
Switching the power switch,
Turning off the power switch when the sense voltage reaches the modulation waveform. A switch control apparatus of a power supply apparatus which converts an AC input according to a switching operation of a power switch,
The voltage divided by half during the on-period of the immediately preceding switching period of the power switch is sampled by a half-on reference voltage, and the voltage charged during the on-period of the current switching period reaches the half-on reference voltage. Half-on detector for detecting one time point as the half-on time point,
A current detector configured to receive the sense voltage at the half-on time and generate a current sense voltage;
A feedback unit generating a feedback voltage according to a difference between the current sensing voltage and a predetermined reference voltage, and
And a sine wave adjuster for adjusting a predetermined reference waveform according to the feedback voltage. 22. The method of claim 21,
The half-on detector,
A sampling / reset signal generator for generating a sampling signal for instructing sampling in synchronization with a turn-off time of the power switch and a reset signal for instructing reset,
A charging unit for generating an on-period voltage in accordance with the on-period of the power switch,
A sampling unit for sampling the on-period voltage according to the sampling signal and dividing the sampled voltage by half to generate a half-on reference voltage;
And a half-on pulse generator for comparing the half-on voltage with the on-period voltage and generating a half-on pulse synchronized with the half-on time according to the comparison result.

Images