KR20130117477A - Interleaving method for error correction codes and information transmitter-receiver system using thereof - Google Patents

Abstract

PURPOSE: An interleaving method for error correction code and an information transmission and reception system using the same are provided to maximize the diversity of channel information existing within a received code word and level non-uniform performance of each bit which consists of a higher-order modulation symbol, thereby ensuring the maximum performance for error correction. CONSTITUTION: An information transmission and reception system comprises a transmitter (210) and a receiver (220). After an additional interleaving process for a code word comprised of binary bits is completed, the transmitter performs diagonal bit rearrangement for configuration of a higher-order modulation symbol and a multi input multi output (MIMO) frame in an interleaver (212) existing in the outside of a coder for error correction (211) and output the bits. The receiver receives a signal to which fading and noise are added with respect to information transmitted from the transmitter, rearranges detected bit values in an order in which a decoder for error correction (224) uses the received signal, and restores the information with the repetition of the received code word. [Reference numerals] (211) Error correction encoder; (212) Interleaver; (213) Modulator; (214) MIMO frame unit; (221) Symbol detector; (222) Bit information detector; (223) Deinterleaver; (224) Error correction decoder; (AA,BB) Discrete signal; (CC) Fading; (DD) Niose

Description

Interleaving Method for error correction codes and information transmitter-receiver system using

The present invention relates to interleaving for a block turbo code, and more particularly, when bits configured in a block interleaver existing inside a codeword are stored in a temporary memory, a left diagonal direction or a right direction of information stored in a temporary memory. Interleaving method for error correction code that can improve performance of information transmission by interleaving turbo code or general codewords by rearranging bit elements in diagonal direction at least once and information transmission / reception system using the same It is about.

The error correcting code technique used in a digital communication system is an encoding technique that adds additional information to information to be transmitted by applying algebraic principles so as to cope with errors occurring in a channel. This error correction coding technique generally generates a fixed length of encoded information by adding a fixed length of additional information to a fixed length of information. The original information to be transmitted is an "information word", which is an additional information added. Information is referred to as "parity words" and coded information words as "codewords."

The receiver extracts the transmitted information through a task called "decoding" that extracts the original information from the modified signal due to noise and various deterioration conditions in the channel. The error correction code described above is a technique used in a digital communication system, and is generally a task for calculating digitally converted information.

Therefore, in order to receive the signal received from the channel through the various functional blocks and input the decoder to the error correcting code, the signal is again determined as digital information, that is, 0 or 1 information. The process of determining whether the received signal is 0 or 1 is called a hard decision, and since the error may be sufficiently large in the hard decision process, the error already included in the determination step may be improved by the decoder. The degree can be greatly reduced.

In order to make up for such drawbacks, a soft decision method is introduced, and the received information is divided into several steps to convey information about how surely 0 or how surely 1. This allows the decoder to make more detailed calculations, further improving performance compared to hard decision methods.

In addition to using the soft decision input from the decoder, and outputting the value output from the decoder as the soft decision, it is possible to remarkably improve the performance by feeding back the value of the soft decision to the input of the decoder and repeating the calculation in the decoder. have. One error correcting code using this principle is the turbo code, which is the same as the principle of accelerating the performance of the engine by feeding back the output power from the exhaust gas to the input.

As described above, a method of improving performance by repeatedly calculating the soft decision value may be applied to the same principle in the detection stage of various signals as well as the decoder. Recently, as the requirements for large data or high-speed data transmission have increased, one way to solve this problem is to use a high-order modulation scheme that allows transmission of multiple bits in one transmission symbol.

In addition, a wireless antenna system also uses a multiple antenna scheme in which different transmission antennas simultaneously transmit different information. In order to accurately detect a signal transmitted using such a multi-antenna technique, it is very important to know information about a channel state.

For this reason, a signal coming from a transmitting antenna around a channel is regarded as an input, and a signal transmitted to a receiving antenna is regarded as an output, and the entire system is called a multi-input multi-output system. This is the multi-input multi-output in English, abbreviated as MIMO. In the MIMO scheme, a symbol unit transmitted simultaneously through multiple antennas is called a MIMO frame.

Of the many factors that determine the performance of a system that uses error correcting codes, the largest cause of the factors determined by external factors rather than the original ability of the error correcting code is the received codeword. How much channel information is contained within it.

When the high-order modulation method or the MIMO method is used together with the error correction code, the bits constituting one MIMO frame and the high-order modulation symbol should be detected as hard decision or soft decision value and provided to the input of the decoder. In this case, since the MIMO frame and the bits constituting the high-order modulation symbol are correlated with each other, the longer the length of the MIMO frame (i.e., the greater the amount of information transmitted at the same time), There is less diversity of channel information between bits, and the performance of the error correction code is reduced.

1 is a diagram illustrating a process of performing conventional interleaving. As shown, a subblock is input to a specific subblock interleaver [S21]. The subblock may include some or all of a data string output from a channel encoder for performing channel coding such as turbo coding, convolutional coding, or low density parity check (LDPC) coding. For example, when channel coding is performed by a turbo coding scheme, a codeword is composed of an information word part, a first parity part, and a second parity part, each of which is entirely or Some of them may constitute the subblock. Alternatively, the subblock may be configured by adding CRC code bits for error detection to each part. It is assumed that the size L of the subblock, that is, the length of the data string constituting the subblock is variable and its maximum size Lmax is 32. 32 is selected as a relatively small number for convenience of description, and a much larger subblock will be used in a real system. It is assumed that the size of the subblock input to the subblock interleaver is 26.

The subblocks input to the subblock interleaver are sequentially written in a row by row in a memory for interleaving. The memory is configured in the form of a matrix having the number of rows NR and the number of columns NC. The column number NC has an exponential acceptance value of 2 (NC = 2C). The C value is 2 and NC = 4. It is assumed that the number NR of the rows is 8 in consideration of the maximum size Lmax of the subblock. Here, the number of rows NR and the number of columns NC may be selected as values other than the above values.

Therefore, each bit of the input data string is written in the row direction of the memory matrix in the input order. When Nr is the number of rows in which data bits are written in the memory matrix, row permutation is performed through an R bit BRO operation on an index of each row for R satisfying 2R-1 < Nr < After row permutation is performed, pruning is performed for rows that satisfy certain conditions. Next, column permutation is performed using a BRO operation on the column index, and each bit is read and output in the column direction of the memory matrix on which the column permutation is performed.

As described above, the conventional interleaving method improves the performance of the system by reducing the number of pruning based on the BRO operation. However, the BER performance of each bit in the high-dimensional modulation symbols and MIMO frames is degraded. For example, when a codeword is composed of only the same bit components, a BER value is determined due to the least inferior bit component. However, conventional interleaving does not include various bit components in a codeword constituting an error correction code. BER performance degradation occurs.

1. Republic of Korea Patent Publication No. 10-2008-0112088, Publication Date December 24, 2008, Application No. 10-2008-0011202, Application Date February 04, 2008, the name of the invention 'interleaving method.

SUMMARY OF THE INVENTION The present invention has been made to solve such a problem, and an object of the present invention is to interleave bit elements in a block-type interleaver to rearrange bit elements in a left diagonal direction or a right diagonal direction, and to configure them in one row. By performing the above, there is provided an interleaving method for an error correcting code capable of constructing a MIMO frame or a high-dimensional symbol and an information transmission / reception system using the same.

It is still another object of the present invention to provide an interleaving technique for a block turbo code that can effectively utilize an interleaver in a turbo code including an interleaver itself within one codeword, and to perform performance by interleaving turbo codes or general codewords. The present invention provides an interleaving method for an error correcting code capable of improvement and an information transmission / reception system using the same.

Another object of the present invention is to interleave an error correcting code, thereby minimizing the number of correlated channel detection values in one codeword, maximizing the diversity of channel information present in the received codeword, and constructing a high-order modulation symbol. The present invention provides an interleaving method for an error correcting code that can guarantee maximum performance for error correction by averaging non-uniform performance for each bit, and an information transmission / reception system using the same.

In order to achieve the above object, an interleaving method for an error correcting code according to the first aspect of the present invention includes error correction for performing additional interleaving on each block type code word by block interleaving a code word in a column direction and a row direction. A high dimensional interleaving method for code, comprising: a) initializing a number of times for the interleaving (No_of_interleaving); b) storing a codeword bit consisting of n (x) n bits in a temporary memory for performing further interleaving; c) rearranging the diagonal bit elements stored in the temporary memory in a single row; d) if one rearrangement is completed in step c), increasing the number of interleavings once, and determining whether the current number of interleavings has reached a preset threshold; And e) if it is determined in step d) that the threshold is not reached, feeds back to step b) to repeat the process, and when the threshold is reached, terminating the interleaving.

According to the preferred embodiment of the present invention, in the step c), when the bit array in the codeword forms N rows, (i-1) left bits of the i (1 <i <N) rows are set to the corresponding rows. The bit rearrangement is performed by moving to the rightmost direction in the right diagonal direction.

In addition, the step d) according to a preferred embodiment of the present invention, d-1) converting the address value of the column to the address value of the row; And d-2) setting the remainder divided by the length (n) of the codeword for '(row address value) + (column address value)' to be an address value of the column.

On the other hand, the transmission and reception system using the interleaving method for the error correction code according to the second aspect of the present invention for achieving the above object, after the additional interleaving process for the codeword consisting of binary bits is terminated, A transmitter for performing bit rearrangement in diagonal directions for high-order modulation symbols and MIMO frame configuration in the interleaver; And rearranging the detection bit values in an order in which a fading and noise-received signal transmitted from the transmitter can be used in a decoder for an error correction code, and then repeating the received codeword to restore the transmitted information. Characterized in that consisting of a receiving device.

According to an aspect of the present invention, there is provided a transmission apparatus comprising: an error correction encoder for adding parity information to binary information bits for error correction occurring in a channel; An interleaver for reordering the codewords of the binary bits encoded by the error correction encoder by a predetermined number and storing them in an internal memory; A modulator for modulating bits stored in the memory according to an M-ary modulation method; And a MIMO frame part for mapping the modulated bits into one symbol and constituting a MIMO frame and transmitting the same through a channel.

In addition, the reception apparatus according to an embodiment of the present invention, the symbol detector for extracting a symbol for the received signal is applied to the fading and noise in the channel; A bit information detector for outputting a soft decision or a fixed decision bit value of each symbol extracted by the symbol detector; A deinterleaver for rearranging the output information of the bit information detector in an order applied to error correction of the transmitting apparatus and storing the output information in the memory; And an error correction decoder for recovering the transmitted information by repeating the received codeword in the order of the information stored in the memory.

As described above, the interleaving method for an error correcting code proposed in the present invention and a transmission / reception system using the same include: interleaving for a block turbo code that can effectively use an interleaver in a turbo code including an interleaver itself in one codeword. The technique and the turbo code or the general codewords interleave with each other can improve the performance. In addition, the present invention maximizes the diversity of channel information present in the received codeword by minimizing the number of correlated channel detection values in one codeword, and averages the non-uniform performance for each bit constituting the high-order modulation symbol. As a result, maximum performance for error correction can be guaranteed.

1 is a flowchart for explaining a conventional interleaving method.
2 is a block diagram illustrating a transmission and reception system to which an interleaving method for an error correcting code according to the present invention is applied.
3 is a diagram illustrating a configuration of a block turbo code or a product code as an example of an error correction code according to the present invention.
4 is a flowchart for describing a method of performing additional interleaving for the codeword of FIG. 3.
FIG. 5 is a diagram for describing a result of performing the first interleaving of FIG. 4.
6 is a graph showing a performance comparison when the interleaving method according to the present invention is applied.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is a block diagram illustrating a transmission and reception system to which an error correction coding scheme, a high-dimensional modulation scheme, and a MIMO scheme are applied according to the present invention. As shown in the drawing, after the additional interleaving process for the codeword composed of binary bits is completed, a transmitter for performing a bit rearrangement in a diagonal direction for high-order modulation symbols and MIMO frame configuration in an interleaver outside the codeword 210 and rearranges the detection bit values in an order in which error signals with fading and noise for the information transmitted from the transmitting device 210 can be used in the error correction code, and then repeatedly transmits the received codeword. It is composed of a receiving device 220 for recovering the information.

On the other hand, the transmitting device 210 is an error correction encoder 211 for adding parity information to the binary information bits for error correction occurring in the channel, and the code word of the binary bit coded by the error correction encoder 211 An interleaver 212 for rearranging a predetermined number of bits and storing the bits in an internal memory, a modulator 213 for modulating the bits stored in the memory according to an M-ary modulation method, and the modulated bits It consists of a MIMO frame portion 214 that maps to a symbol and forms a MIMO frame and transmits it simultaneously over a channel.

In addition, the receiver 220 is a symbol detector 221 for extracting a symbol for a received signal subjected to fading and noise in the channel, and the soft decision or fixed decision bit of each symbol extracted from the symbol detector 221 A bit information detector 222 for outputting a value, a deinterleaver 223 for rearranging the output information of the bit information detector 222 in an order applied by the error correction encoder 211, and storing the information in the memory; An error correction decoder 224 recovers the transmitted information by repeating the received codeword in the order of the information stored in the memory.

In the transmission and reception system according to the present invention configured as described above, the error correcting encoder 211 in the transmitting device 210 is a codeword composed of binary bits encoded by adding parity information to binary information bits for error correction occurring in a channel. Is stored in the memory in the interleaver 212 for bit rearrangement.

Depending on the type of the error correction encoder 212, there may be a separate interleaver inside the error correction encoder. The output from the interleaver that rearranges the order of the coded bits is sequentially mapped by m = log ₂ M bits into one symbol according to the M-ary modulation scheme in the modulator 213 and simultaneously according to the method of configuring the MIMO frame. A MIMO frame is constructed (214) with NT symbols to be transmitted and transmitted simultaneously on the channel.

On the other hand, the transmitted information is faded in the channel, the noise-received received signal is detected as NT symbols in the symbol detector 221 of the receiver 220, m m each symbol in the bit information detector 222 It is output as a soft decision or hard decision bit value. Depending on the system actually used, the symbol detector 221 and the bit detector 222 may be implemented as one device.

The information on which the bit detection is completed is stored in a memory in the deinterleaver 223 to be rearranged in the order in which the error correction encoder can be used. When the required number of bit detection values are stored in the memory in the deinterleaver 223, the deinterleaver 223 rearranges the detection bit values in the order in which they can be used in the error correction code and sends them to the error correction decoder 224. . The error correction decoder 224 repeats the received codewords configured in the order delivered from the deinterleaver to restore the transmitted information. Here, a separate deinterleaving process may be performed according to the type of the error correction decoder 224.

FIG. 3 is a diagram illustrating a configuration of a block turbo code or a product code, which is an example of the error correction encoder 211 of FIG. 2. Here, an error correcting code designed to perform an iterative decoding process on a product code is called a block turbo code.

Referring to FIG. 3, a process of constructing a multiplication code using a (n, k) block code having a length k of an information word and a length n of a codeword 7 is performed. First, k (n, k) block codes are formed. Is encoded in the row direction, and n times are encoded for k information bits for each column of k codewords thus constructed, and a multiplication code consisting of n columns of n bits and n rows of nxn bits is generated. .

The generated code includes n codewords in the row direction and n codewords in the column direction at the same time. That is, the block interleaving of codewords in the column direction becomes the codeword in the column direction, and the block interleaving of codewords in the row direction becomes the codeword in the row direction.

FIG. 4 is a flowchart illustrating a sequence of performing additional interleaving on a code word having a block-type internal interleaver inside the error correcting encoder 211.

According to the flowchart of FIG. 4, in step S401, the number No_of_interleaving for the interleaving is initialized to zero. In operation S403, a codeword bit C [i] [j] including nxn bits is first stored in a temporary memory buffer [i] [j] to perform additional interleaving. Thereafter, the bit elements in the diagonal direction of the information stored in the temporary memory are rearranged and stored in a single row.

FIG. 5 shows an example of rearranging the bit elements in the diagonal direction into one row, and shifts the leftmost bits from the second row to the right so that the bits in the diagonal direction become one row. Let's do it. That is, the second line sends C21 after the rightmost C2n, and the third line sends C31 and C32 after C3n. In the same way, the last row sends all of Cn1 through Cnn-1 behind Cnn and then rearranges the elements in the diagonal direction.

This means that when the bit array in the codeword forms N rows, for i (1 <i <N) rows, the (i-1) right bits are shifted to the leftmost of the row to rearrange the bits in the left diagonal direction, or When the bit array in the codeword forms N rows, the bits are rearranged in the right diagonal direction by shifting (i-1) left bits to the rightmost side of the row for i (1 <i <N) rows. And rearranged in the form as shown in FIG.

When the rearrangement in the diagonal direction is completed in this way, as in step S405, every row includes elements of different rows once, and every column includes elements of different columns once. This method of reordering in the diagonal direction replaces the address value j of the column with the address value of the row, and the address of the new column is ((row address value) + (address value of the column)) with the length of the codeword n. Divided by. This is expressed in the program as "C [i] [j] = buffer [j] [(i + j)% n]".

In step S407, when the rearrangement is completed once, the number of interleaving is increased once, and in step S409, it is checked whether the current number of interleaving has reached a preset threshold. If the threshold has not been reached, the process returns to step S403 to repeat the process, and when the threshold is reached, the interleaving ends.

Here, the performance of the bit error rate may be improved in proportion to the number of repetitions until the interleaving is repeated a specific number of times. However, since the performance of the bit error rate does not improve when repeated more than a certain number of times, it may be desirable to set a threshold (a specific number of times) to avoid meaningless repetition.

After the additional interleaving process for the codeword inside the error correcting coder is completed, the interleaver 212 existing outside the coder may perform additional bit rearrangement for high-order modulation symbol and MIMO frame configuration.

Accordingly, the interleaving method for the error correcting code according to the present invention minimizes the number of correlated channel detection values in one codeword, maximizes the diversity of channel information existing in the received codeword, and constructs a high-order modulation symbol. Maximum performance is obtained by averaging non-uniform performance for each bit.

That is, since the more the channel information in one codeword, the better the decoding performance, the interleaving method according to the present invention maximizes the diversity of the channel information in one codeword. This is because when a plurality of symbols are received with the same channel information as in the MIMO scheme, the performance of the error correction code is deteriorated. In addition, when the codeword is composed of only the same bit component, the bit error rate (BER) value is increased by the bit component having the poorest performance. In the present invention, by including various bit components in the codeword constituting the error correction code, the channel information in the protected word can be maximized.

6 is a graph showing a performance comparison when the interleaving method according to the present invention is applied. As shown, it simulates bit error rate (BER) performance with and without interleaving for 16-QAM and 64-QAM schemes in Additive white Gaussian noise (AWGN) channels. One result. As can be seen, it can be seen that the higher the modulation order, the greater the effect due to interleaving according to the present invention, and such a difference in performance occurs in the fading channel.

210: transmitting end 211: error correction encoder
212 interleaver 213 modulator
214: MIMO frame portion 220: receiving end
221: symbol detector 222: bit information detector
223: deinterleaver 224: error correction decoder

Claims (7)

A high dimensional interleaving method for an error correcting code for performing additional interleaving on each block type code word in which block words are interleaved in a column direction and a row direction,
a) initializing a number No_of_interleaving for the interleaving;
b) storing a codeword bit consisting of n (x) n bits in a temporary memory for performing further interleaving;
c) rearranging the diagonal bit elements stored in the temporary memory in a single row;
d) if one rearrangement is completed in step c), increasing the number of interleavings once, and determining whether the current number of interleavings has reached a preset threshold; And
e) If it is determined in step d), if the threshold has not reached, feedback to step b) to repeat the process, and if the threshold is reached error correction characterized in that the step of terminating the interleaving Interleaving method for sign. According to claim 1, wherein step c) is
When the bit array in the codeword forms N rows, the bit rearrangement is performed in the right diagonal direction by moving the (i-1) left bits to the rightmost of the row for the i (1 <i <N) rows. Interleaving method for error correction code, characterized in that. According to claim 1, wherein step c) is
When the bit array in the codeword forms N rows, the bit rearrangement is performed in the left diagonal direction by moving the (i-1) right bits to the leftmost of the row for the i (1 <i <N) rows. Interleaving method for error correction code, characterized in that. The method of claim 1 or 2, wherein d)
d-1) converting the address value of the column to the address value of the row; And
d-2) setting the remainder divided by the length (n) of the codeword for '(row address value) + (column address value)' to be the column address value. For interleaving method. In the data transmission and reception system using the interleaving method according to claim 1,
A transmitter for performing a bit rearrangement in a diagonal direction for high-order modulation symbols and MIMO frame configuration in an interleaver outside of the coder after completion of an additional interleaving process for a codeword consisting of binary bits; And
After rearranging the detection bit values in an order that can be used in the decoder for the error correction code, the received signal with fading and noise for the information transmitted from the transmitting device is repeated, and the received codeword is repeated to restore the transmitted information. An information transmitting / receiving system using an interleaving method for an error correcting code, characterized by comprising a receiving device. The method of claim 5, wherein
The transmitter includes an error correction encoder for adding parity information to binary information bits for error correction occurring in a channel;
An interleaver for reordering the codewords of the binary bits encoded by the error correction encoder by a predetermined number and storing them in an internal memory;
A modulator for modulating bits stored in the memory according to an M-ary modulation method; And
And an MIMO frame unit configured to map the modulated bits into one symbol, and to form a MIMO frame and transmit the same through a channel at the same time. The method of claim 5, wherein
The receiver includes a symbol detector for extracting a symbol for a received signal subjected to fading and noise in the channel;
A bit information detector for outputting a soft decision or a fixed decision bit value of each symbol extracted by the symbol detector;
A deinterleaver for rearranging the output information of the bit information detector in an order applied to error correction of the transmitting apparatus and storing the output information in the memory; And
And an error correction decoder for restoring the transmitted information by repeating the received codewords according to the order of the information stored in the memory.

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