KR20130104453A - Cpu module of programmable logic controller system, method for program update of programmable logic controller system - Google Patents

Cpu module of programmable logic controller system, method for program update of programmable logic controller system Download PDF

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Publication number
KR20130104453A
KR20130104453A KR1020120025954A KR20120025954A KR20130104453A KR 20130104453 A KR20130104453 A KR 20130104453A KR 1020120025954 A KR1020120025954 A KR 1020120025954A KR 20120025954 A KR20120025954 A KR 20120025954A KR 20130104453 A KR20130104453 A KR 20130104453A
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South Korea
Prior art keywords
code
instruction
block
program
instruction code
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KR1020120025954A
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Korean (ko)
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유승훈
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엘에스산전 주식회사
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Publication of KR20130104453A publication Critical patent/KR20130104453A/en

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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Programme-control systems
    • G05B19/02—Programme-control systems electric
    • G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/05—Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/60—Software deployment
    • G06F8/65—Updates
    • G06F8/656—Updates while running
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/60—Software deployment
    • G06F8/65—Updates
    • G06F8/658—Incremental updates; Differential updates

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Automation & Control Theory (AREA)
  • Stored Programmes (AREA)

Abstract

The present invention relates to a program update technology of a PLC system, wherein a program block for storing the currently executing executable code, a program block for storing a newly downloaded executable code, and the latest instruction are stored in a memory of the PL system. An instruction code block for storing code and an instruction address table for storing the addresses of the instruction codes stored in the instruction code block are respectively maintained. Branching from executable code to instruction code is done indirectly through the instruction address table. Since the memory copy for program block switching is skipped during 'correction during run' of the PSI system, the program switching time is shortened. It can increase the size of the executable code area.

Description

CPU module of PSI system, program update processing method of PSI system {CPU Module of Programmable Logic Controller System, Method for Program Update of Programmable Logic Controller System}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a programmable logic controller (PLC) system. In particular, when a ladder program is compiled and updated in a running system, the memory can be used more efficiently and the program switching time can be shortened. To help.

The PL system is widely used as an industrial control system. After reading input data from the input module, the program is executed once from the beginning to the end, and the result of writing the result to the output module is called a scan. It is the PSI scan program that plays a role.

There are many functions or function blocks in the PI system, which are PI instructions for performing various operations or functions. The PI system can add, modify or delete instructions in the ladder program without stopping the currently running scan program. This is called 'modification during run'.

The PI system downloads the newly added instruction and executable code to update the new program block.

Downloading and switching to a new program are performed in several scan times. Because many scans are indefinitely longer at one time, the PSI system downloads by dividing the scan time into several scan times. When the download is complete, the program blocks are switched to execute a new program.

FIG. 1 shows a program block when a program is downloaded to a run state for the first time after a download to a stopped system.

When the user downloads the ladder program to the paused PSI system, one program block PB1 has the execution code region 11 at the front and the instruction code region 12 at the rear. The combined size of the executable code and the instruction code cannot exceed the size of each program block.

FIG. 2 shows a program block when a ladder program is modified through a 'correction in run' function in the PFC system in the run state.

When the user updates the program through the 'modify during run' function, another program block PB2 becomes an executable program block, and the newly downloaded execution code 13 is executed in the program block PB2.

The existing instruction code 12 is copied to the program block PB2 as it is, and a new instruction code 15 is added. Therefore, the more instructions that are used in the past, the more time it takes to scan and the more memory is wasted to copy.

That is, the conventional PSI system is composed of two or more program blocks, each of the execution code and the used instruction code is stored in each program block, if the 'modification during run' the entire previously used instruction code is a different program The process is copied to the block.

For this reason, the more instruction codes used, the longer the memory copy time, the longer the program block switching time. The more 'modification during run', the more wasted the memory, and as many new instructions are added and the number of 'modification during run' is increased, most of the program blocks are occupied by the instruction code. There is nothing else. In addition, when a user deletes an existing command, the command is copied as it is.

Accordingly, the present invention has been made to solve the above problems, and separates the block for storing the execution code and the block for storing the instruction code, and the instruction code is indirectly referred to through the instruction address table, Its purpose is to allow program modifications to be performed quickly and to use memory more efficiently by allowing modifications during run without copying the instruction codes.

In order to achieve the above object, the CPU module of the PL system according to the present invention, a memory for storing the execution code and instruction code of the program for operating the PID system, and the execution code and instruction code stored in the memory It comprises a control unit for sequentially processing.

In this case, a program block for storing the currently executing execution code, another program block for storing the newly downloaded execution code, an instruction code block for storing the latest instruction code, and an instruction code stored in the instruction code block. Each instruction address table is stored, which stores its address.

Each of the program block and the instruction code block is composed of different blocks, and branching from the execution code to the instruction code is indirectly made through the instruction address table.

When the command code is updated, the controller may modify only a portion that is changed in the command code block and the command address table.

The controller may perform an update on the execution code or the command code while the execution code is executed.

The size of the command address table may be set to designate all addresses of all commands of the PSI system.

According to the present invention, there is provided a method of processing a program update of a PID system, the method comprising: starting a program update while executing the execution code stored in the first program block; If the new update relates to executable code, downloading the executable code and storing the executable code in a second program block; If the new update relates to an instruction code, downloading the instruction code and updating the instruction code block; And updating the instruction address table for storing the addresses of the instruction codes when the instruction code block is updated.

Each of the program block and the instruction code block is composed of different blocks, and the execution code is configured such that branching to the instruction code is indirectly made through the instruction address table.

According to the present invention, since the memory copy for program block switching is omitted during the 'modification during run' of the PSI system, the program switching time is shortened.

Instruction code is indirectly referenced using a memory address table. Therefore, it is not necessary to modify the execution code every time according to the modification of the instruction code, so it is easy to apply the modified / modified existing instruction and apply the new instruction code immediately without stopping the PSI system when modifying or adding the function. have.

Since the block that stores the execution code and the block that stores the instruction code are separated, there is no need to have the instruction code double, which reduces the memory usage, and the entire program block can be used as the execution code area, which increases the program memory capacity. .

1 and 2 illustrate an example of a memory structure related to a 'correction during run' function of a conventional PFC system.
Figure 3 is an embodiment of a CPU module of the PI system according to the present invention,
4 is a specific example of a memory structure when 'modification in run' is made according to the present invention;
5 is an embodiment of a program update processing method of a PSI system according to the present invention;
6 illustrates an example in which branching to an instruction code is indirectly made through an instruction address table.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 3 shows an overview of the PIC system. The PI system 30 includes a CPU module 31 serving as a basic unit, and includes various types of modules 32-1, such as an input / output module and a communication module. 32-n).

The CPU module 31 is configured to include a control unit 31-1 configured using a central processing unit (CPU), a microprocessor, or the like, and a memory 31-2 storing a program. Numeral 31-1 sequentially executes the programs stored in the memory 31-2 to control the PSI system 30. FIG.

The PSI system 30 may be connected to the management computer (eg, Personal Computer, 20) through various communication methods such as RS-232 or Universal Serial Bus (USB), and the user may use the management computer 20 The city system 30 may be managed.

In particular, a user writes a program to be applied to the PSI system 30 using an application installed on the management computer 20 in the form of a ladder program, and the PSI system 30 as a newly created program. Can be updated.

When the update starts, the control unit 31-1 of the CPU module 31 downloads the execution code or the instruction code of the new program and stores it in the memory 31-2, and when the update is completed, executes the new program. Perform the relevant action.

At this time, the controller 31-1 may update the execution code or the command code while the current program is being executed. As described above, this feature is called 'editing during run'.

Execution code refers to a ladder program is converted into a program code that is actually executed in the PI system 30, the instruction code refers to a function (Function) or a function block used in the execution code.

On the other hand, in the memory 31-2 of the CPU module 31 according to the present invention, the first program block 41 in which the execution code currently executed is stored, and the second program block 42 in which the new execution code to be downloaded is stored. , An instruction code block 43 for storing the latest instruction code, and an instruction address table 44 for storing the addresses of the instruction codes stored in the instruction code block, respectively.

Conventionally, execution code and instruction code exist together in a program block, but in the present invention, each program block and instruction code block are separated.

The first program block 41 and the second program block 42 are relative to each other. The block in which the execution code currently being executed is stored is called the first program block, and the block in which the newly downloaded execution code is stored is the second program block. It is just called. When the update of the program is finished, the control unit 31-1 executes a new program, so that the newly updated program becomes the currently executed program.

In the case where the instruction code is updated, the instruction code to be added is added to the instruction code block 43, the instruction code to be modified is modified in the instruction code block 43, and if any instruction code is deleted, the instruction code is The instruction code block 43 is deleted.

When the contents of the instruction code block 43 change and the address for each instruction code changes, the contents of the instruction address table 44 also change. In this case, only the item corresponding to the instruction code in which the address has changed may be changed.

The instruction code referred to by the execution code is indirectly referred to through the instruction address table, rather than referring to the instruction code as conventionally.

That is, when referring to the instruction code in the execution code, refer to the instruction address table 44 having the address of the instruction code, and branching from the execution code to the instruction code is indirectly made through the instruction address table 44.

The size of the instruction address table 44 can be set to specify all addresses for the entire instruction code of the PSI system. For example, if there are n total instruction codes of the PI system, and 32 bits are used for addressing each instruction code, the size of the instruction address table 44 is 'n × 32' bits.

This does not mean that the instruction address table 44 should always have an address value for the entire instruction code, but that it is always ready to respond as the number of instruction codes used in the executable code increases.

That is, the instruction address table 44 only needs to have an address for the instruction code used in the latest execution code.

3 is only an example schematically illustrated for explanation. That is, the CPU module 31 according to the present invention has a memory structure as described above, and as long as the branch from the execution code to the instruction code is indirectly made through the instruction address table 44, as many as needed. Can be configured.

4 illustrates an example of a memory state in which a program is updated through a 'correction during run' function according to the present invention.

The newly downloaded execution code 42-1 is stored in the second program block 42 while the currently executing execution code 41-1 is stored in the first program block 41. When the update is finished, the newly downloaded execution code 42-1 to the second program block 42 is executed.

Instruction address table 44 stores the actual address of each instruction code in instruction code block 43. After executing the execution code sequentially, if a certain instruction code is outputted, the branching is performed to the code block in which the actual instruction code is located, and the branching is performed to the address of the corresponding instruction code with reference to the instruction address table 44.

In the instruction code block 43, the newly updated instruction code 43-3 has been added to the previously used instruction code 43-1, and thus the instruction code table 44 has been added to the newly added instruction code. Address (44-3) was added.

Even if a new executable code is downloaded through the 'modification in run' function, the executable code refers to the instruction address table 44, so if the instruction code is not modified, there is no need to change the instruction address table 44.

In addition, even if a new instruction code is added, program block conversion can be completed quickly because it is not necessary to copy existing instruction codes to a program block as in the related art.

If the size or operation of the instruction code is changed due to the addition or modification of the function of the existing instruction code, the changed instruction code is added to the instruction code block 43, and the existing instruction code is allocated from the instruction address table 44. After deleting the address, the newly downloaded command code address can be assigned. Therefore, the changed command code can be easily applied without restarting the system.

Referring to FIG. 5, an embodiment of a program updating method of a PSI system according to the present invention will be described.

First, the PSI system starts program update while executing the execution code stored in the first program block (S211).

If the update relates to the execution code, the execution code is downloaded and stored in the second program block (S212, S213).

The first program block and the second program block are relative to each other. The block in which the currently executing executable code is stored is called a first program block, and the block in which the new executable code is updated is called a second program block.

If the new update relates to the command code (S214), the command code block is downloaded and the command code block is updated (S215). That is, the added command code is added to the command code block, the modified command code is modified in the command code block, and the deleted command code is deleted from the command code block.

When the command code block is updated, the command address table for storing the address of the command codes is updated together (S216).

That is, since the latest command code is maintained in the command code block, when the address of each command code in the command code block changes due to the update of the command code, the command address table must also be updated.

In this case, the contents of the instruction code block are changed so that only the item whose address for each instruction code is changed is changed.

When the update is completed, the newly downloaded executable code starts to be executed in the second program block (S217, S218).

The block where the execution code of the program is stored and the block where the instruction code is stored are separated from each other, and the branching from the execution code to the instruction code is indirectly made through the instruction address table.

Referring to FIG. 6, when an execution code of a program block is sequentially executed, when an instruction code is to be processed (61), a branch to a code block in which an actual instruction code is located must be performed.

In this case, an address having a corresponding command code is queried from the command address table (62), and branches to the corresponding command code using the queried address (63). The branching address here is one of the addresses assigned to the instruction code block.

It is to be understood that the present invention is not limited to the above-described embodiment, and various changes and modifications may be made by those skilled in the art without departing from the technical spirit of the present invention. to be.

20: management computer 30: Fielcy system
31: CPU module 31-1: control unit
31-2: Memory 41: First program block
42: second program block 43: instruction code block
44: instruction address table

Claims (6)

A memory for storing an execution code and an instruction code of a program for operating a PI system; And a controller for sequentially processing the execution code and the instruction code stored in the memory.
A program block in which the execution code currently executed is stored in the memory;
Another program block that stores the newly downloaded executable code,
The instruction code block in which the latest instruction code is stored,
Each instruction address table for storing the addresses of the instruction codes stored in the instruction code block is maintained.
Each of the program block and the instruction code block is composed of different blocks,
Branching from the execution code to the instruction code is CPU module of the system, characterized in that the indirect through the instruction address table. The method of claim 1,
The controller of the CPU system of the PSI system, characterized in that for modifying only the portion that is changed in the instruction code block and instruction address table when the instruction code is updated. The method of claim 1,
The control unit CPU module of the PSI system, characterized in that for performing the update to the execution code or instruction code while the execution code is executed. The method of claim 1,
The size of the instruction address table is CPU module of the PCI system, characterized in that configured to be able to specify all the addresses for the entire instruction of the PID system. Starting a program update while the PSI system executes the executable code stored in the first program block;
If the new update relates to executable code, downloading the executable code and storing the executable code in a second program block;
If the new update relates to an instruction code, downloading the instruction code and updating the instruction code block; And
If the instruction code block is updated, updating the instruction address table for storing the addresses of the instruction codes,
And each of the program block and the instruction code block comprises different blocks. The method of claim 5, wherein
And the execution code is configured such that branching to the instruction code is indirectly made through the instruction address table.
KR1020120025954A 2012-03-14 2012-03-14 Cpu module of programmable logic controller system, method for program update of programmable logic controller system KR20130104453A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10824128B2 (en) 2018-05-03 2020-11-03 Lsis Co., Ltd. Device for processing programmable logic controller program

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10824128B2 (en) 2018-05-03 2020-11-03 Lsis Co., Ltd. Device for processing programmable logic controller program

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