KR20130043858A - Light emitting device and light emitting array, and method for manufacturing light emitting device and light emitting array respectively - Google Patents

Abstract

PURPOSE: A light emitting device, a light emitting array, and a method for manufacturing the light emitting device and the light emitting array are provided to improve efficiency by forming a light emitting structure having three or more tilt surfaces instead of a horizontal layer. CONSTITUTION: A buffer layer(120) is formed on a substrate(110). An aperture pattern(130) is formed on the buffer layer. The aperture pattern includes at least one opening part(131) for exposing the buffer layer. A light emitting structure(10) corresponding to the opening part is formed on the buffer layer. An ohmic layer(140) is formed on the aperture pattern in order to cover the light emitting structure. An electrode(150) is formed on the ohmic layer.

Description

LIGHT EMITTING DEVICE AND LIGHT EMITTING ARRAY, AND METHOD FOR MANUFACTURING LIGHT EMITTING DEVICE AND LIGHT EMITTING ARRAY RESPECTIVELY}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting device, a method for manufacturing the same, and a light emitting array and a method of manufacturing the same. And a light emitting array and a method of manufacturing the same.

Light emitting devices (LEDs) and light emitting arrays (LEDs) include a light emitting structure composed of a plurality of semiconductor layers including a p-n junction, and are a kind of optoelectronic devices that convert electrical energy and emit light energy.

The light emitting device can emit light of high brightness at low voltage, compared with other devices used as a light source, and has an advantage of high efficiency. In particular, when the light emitting structure is formed of a gallium nitride (GaN) semiconductor material, the light emitting device may be designed to selectively emit light in a wide wavelength range of infrared to ultraviolet. Accordingly, the light emitting device can be applied to various devices such as a backlight unit, a display panel, a display device, and a home appliance of a liquid crystal display, and an environment such as arsenic (As) and mercury (Hg). There is an advantage that does not require a harmful substance, has been spotlighted as the next generation light source.

In addition, the light emitting array includes at least three sub-pixels emitting red light, blue light and green light to display light of each color in a mixed color, and include a plurality of pixels arranged in a matrix on a plane. Accordingly, the light emitting array includes a fluorescent layer that emits light of any one of red, blue, and green as light emitted from the light emitting structure and the light emitting structure, corresponding to each subpixel.

The light emitting array may be used as a display device for displaying an image by adjusting the amount of light emitted from each subpixel. Alternatively, the entire plurality of pixels may be adjusted to emit white light having the same amount of light, thereby being used as a surface light source of a device such as a backlight unit and an illumination.

On the other hand, in general light emitting devices and light emitting arrays, the light emitting structure includes an n-type semiconductor layer and a p-type semiconductor layer, and an active layer sandwiched between the n-type semiconductor layer and the p-type semiconductor layer. Here, the active layer generates light by combining electrons and holes injected into the n-type semiconductor layer and the p-type semiconductor layer, respectively.

Such a light emitting structure is generally formed by growing a semiconductor material in the form of a horizontal layer having a predetermined thickness on a flat growth surface of the growth substrate. Accordingly, the active layer sandwiched between the n-type semiconductor layer and the p-type semiconductor layer is formed only in the form of a horizontal layer having a predetermined thickness parallel to the growth surface. At this time, in the direction parallel to the growth surface, the cross-sectional area of the active layer is equal to the cross-sectional area of the light emitting structure, which is limited to the area of the growth surface or less.

That is, as the active layer is formed in the form of a horizontal layer having a constant thickness, the cross-sectional area of the active layer is limited to the area of the growth surface or less equal to the cross-sectional area of the light emitting structure. Therefore, the light emitting area (here, "light emitting area" refers to the surface area of the region generating light by the combination of electrons and holes) and its internal quantum efficiency (here, "internal quantum efficiency") (Indicates the rate at which the injected electrons and holes are converted into light).

In addition, since the semiconductor material, in particular, the gallium nitride-based semiconductor material is a dense medium having a higher refractive index than air, some of the light generated in the light emitting structure having an angle of incidence below the critical angle is totally reflected and is not emitted to the outside, but is bound in the device. do. Therefore, there is a problem in that there is a limit in improving the light extraction efficiency (here, "light extraction efficiency" means the rate at which light generated in the device is emitted to the outside).

As described above, since the general light emitting structure includes an active layer formed of a horizontal layer having a constant thickness, it is difficult to improve the internal quantum efficiency, light extraction efficiency, and efficiency proportional to these.

The present invention is to solve the above-mentioned problems of the prior art, and includes at least one light emitting structure having a form including three or more inclined surfaces, instead of a horizontal layer of a constant thickness, the light emitting device and the light emitting which can improve the efficiency Arrays, and methods of making each.

In order to achieve the above object, the present invention, a substrate; A buffer layer formed on the substrate; An opening pattern formed on the buffer layer, the opening pattern including one or more openings arranged horizontally apart from each other and exposing the buffer layer; And at least one light emitting structure protruding from the exposed buffer layer corresponding to the opening on the opening pattern.

The present invention includes forming a buffer layer on a substrate; Forming a mask material layer on the buffer layer; Patterning the mask material layer to form an opening pattern to include one or more openings spaced apart from each other and arranged horizontally and exposing the buffer layer; And forming at least one light emitting structure protruding from the exposed buffer layer on the opening pattern corresponding to the opening.

The present invention includes a plurality of light emitting structures including a first semiconductor layer, a second semiconductor layer having a different conductivity type from the first semiconductor layer, and an active layer interposed between the first semiconductor layer and the second semiconductor layer. 3 semiconductor layers; An opening pattern formed on one surface of the third semiconductor layer, the opening pattern including a plurality of openings which are horizontally spaced apart from each other and expose the third semiconductor layer; Barrier ribs formed on the other surface of the third semiconductor layer corresponding to the opening pattern; And a fluorescent layer formed on the other surface of the third semiconductor layer corresponding to the plurality of light emitting structures.

The present invention includes an opening pattern including a plurality of openings; A plurality of light emitting structures which extend from the opening and protrude on the opening pattern; An insulating hole and a first insulating layer formed in a portion of the light emitting structure; A first electrode formed on the first insulating layer; A second electrode formed on another partial region on the light emitting structure; A first bump formed on the first electrode; A second bump formed on the second electrode; Reflective layers formed on the first and second bumps; A second insulating layer formed in a region between the first bump and the second bump; A circuit layer attached on the reflective layer; Barrier ribs formed on the other surface of the opening pattern; And a fluorescent layer formed on another surface of the plurality of light emitting structures.

The present invention comprises the steps of forming a buffer layer on the growth substrate; Forming a mask material layer on the buffer layer; Patterning the mask material layer to form an opening pattern including a plurality of openings horizontally spaced apart from each other and exposing the buffer layer; Forming a plurality of light emitting structures protruding from the buffer layer exposed through the openings and protruding from the opening patterns; Attaching a circuit layer on the plurality of light emitting structures; And it provides a method of manufacturing a light emitting array comprising the step of removing the growth substrate.

In this case, the light emitting structure includes three or more inclined surfaces, the cross-sectional area of the light emitting structure is reduced in the protruding direction, and includes three or more inclined surfaces to protrude from the exposed buffer layer, and the first semiconductor layer. An active layer formed on the semiconductor layer, and a second semiconductor layer formed on the active layer.

At least one light emitting device and a light emitting array according to the present invention include a first semiconductor layer and a second semiconductor layer having different conductivity, and an active layer between the first semiconductor layer and the second semiconductor layer and arranged horizontally apart from each other. Each of the light emitting structure includes. In this case, each light emitting structure is formed to have a shape including three or more inclined surfaces oblique to the growth surface, by growing from portions on the growth surface exposed through the at least one opening on the opening pattern. At this time, the growth surface is selected as a third semiconductor layer having the same conductivity as the buffer layer or the first semiconductor layer.

In other words, the light emitting structure is formed in a shape including three or more inclined surfaces that are not horizontal to the growth surface, rather than a layer form that is horizontal to the growth surface with a constant thickness. In particular, the first semiconductor layer of the light emitting structure, like the light emitting structure, has a form including three or more inclined surfaces oblique to the growth surface, the active layer and the second semiconductor layer sequentially stacked on the first semiconductor layer, the first It is formed in the form of a layer including three or more inclined surfaces obliquely corresponding to the upper shape of the semiconductor layer.

Thus, since the surface area of the active layer is not limited by the cross-sectional area of the light emitting structure, the light emitting area and its internal quantum efficiency can be improved compared to the conventional one. In addition, due to the rising layer shape of the active layer, the incident angle of the light bound in the active layer can be varied, thereby improving the light extraction efficiency. As such, due to the improvement of the internal quantum efficiency and the light extraction efficiency, the efficiency may also be improved.

In addition, the light emitting array according to the present invention further includes a fluorescent layer corresponding to each of the plurality of light emitting structures. That is, in the light emitting array, each subpixel is implemented by a light emitting structure having a size of several microns and a fluorescent layer corresponding thereto, and thus may include a plurality of pixels implemented in a micro size. It can be more advantageous.

1 is a cross-sectional view of a light emitting device according to a first embodiment of the present invention.
2A to 2D are perspective views and cross-sectional views illustrating another example of the light emitting structure and the light emitting structure of FIG. 1.
3 is a flowchart illustrating a method of manufacturing a light emitting device according to a first embodiment of the present invention.
4A to 4I are process charts showing the manufacturing method of the light emitting device shown in FIG.
5 is a cross-sectional view of a light emitting device according to a second embodiment of the present invention.
FIG. 6A is a flowchart illustrating a method of manufacturing a light emitting device according to a second embodiment of the present invention, and FIG. 6B is a process chart of "step of forming a temporary layer" in the method of manufacturing the light emitting device shown in FIG. 6A.
7 is a cross-sectional view of a light emitting device according to a third embodiment of the present invention.
8 is a flowchart illustrating a method of manufacturing a light emitting device according to a third embodiment of the present invention.
9 is a cross-sectional view of a light emitting device according to a fourth embodiment of the present invention.
10 is a flowchart illustrating a method of manufacturing a light emitting device according to a fourth embodiment of the present invention.
11 is a cross-sectional view of a light emitting device according to a fifth embodiment of the present invention.
12 is a flowchart illustrating a method of manufacturing a light emitting device according to a fifth embodiment of the present invention.
13 is a cross-sectional view of a light emitting array according to a sixth embodiment of the present invention.
14 is a view showing a light emitting surface of the light emitting array according to the sixth embodiment of the present invention.
15 is a flowchart illustrating a method of manufacturing a light emitting array according to a sixth embodiment of the present invention.
16A to 16K are process drawings showing the method of manufacturing the light emitting array shown in FIG.
17 is a cross-sectional view of a light emitting array according to a seventh embodiment of the present invention.
18 is a cross-sectional view of a light emitting array according to an eighth embodiment of the present invention.
19 is a flowchart illustrating a method of manufacturing a light emitting array according to an eighth embodiment of the present invention.
20A to 20J are process charts showing the manufacturing method of the light emitting array shown in FIG.
21 is a cross-sectional view of a light emitting array according to a ninth embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily carry out the present invention. It should be understood, however, that the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. In the drawings, the same reference numbers are used throughout the specification to refer to the same or like parts.

Throughout this specification, when a part is referred to as being "connected" to another part, it is not limited to a case where it is "directly connected" but also includes the case where it is "electrically connected" do.

Throughout this specification, when a member is " on " another member, it includes not only when the member is in contact with the other member, but also when there is another member between the two members.

Throughout this specification, when an element is referred to as "including " an element, it is understood that the element may include other elements as well, without departing from the other elements unless specifically stated otherwise. The terms "about "," substantially ", etc. used to the extent that they are used throughout the specification are intended to be taken to mean the approximation of the manufacturing and material tolerances inherent in the stated sense, Accurate or absolute numbers are used to help prevent unauthorized exploitation by unauthorized intruders of the referenced disclosure. As used throughout this specification, the term "step to" or "step of" does not mean "step for."

Throughout this specification, the term “combination of these” included in the expression of the makushi form means one or more mixtures or combinations selected from the group consisting of the constituents described in the expression of the makushi form, wherein the constituents It means to include one or more selected from the group consisting of.

First, the light emitting device and the light emitting array according to each embodiment of the present invention include at least one light emitting structure having a shape having three or more inclined surfaces oblique to the main surface of the substrate. In this case, each light emitting structure includes a first semiconductor layer and a second semiconductor layer having different conductivity, and an active layer sandwiched between the first semiconductor layer and the second semiconductor layer.

1st Example

1 is a cross-sectional view of a light emitting device according to a first embodiment of the present invention, Figures 2a to 2d is a perspective view and a cross-sectional view showing another example of the light emitting structure and the light emitting structure of FIG. 3 is a flowchart illustrating a method of manufacturing the light emitting device according to the first embodiment of the present invention, and FIGS. 4A to 4I are flowcharts illustrating the method of manufacturing the light emitting device shown in FIG. 3.

The light emitting device 100 illustrated in FIG. 1 includes a substrate 110, a buffer layer 120 formed on the substrate 110, an opening pattern 130 formed on the buffer layer 120, and at least one light emitting structure 10. ), An ohmic layer 140 formed on the opening pattern 130 to cover the light emitting structure 10, and an electrode 150 formed on the ohmic layer 140.

Here, the openings 131 included in the opening pattern 130 are spaced apart from each other and are horizontally arranged with respect to the main surface of the substrate 110 to expose the buffer layer 120.

The light emitting structures 10 are formed on the buffer layer 120 corresponding to the openings 131, and are spaced apart from each other and arranged horizontally.

Each light emitting structure 10 is connected to the buffer layer 120 exposed through the opening 131, is in contact with at least a portion of the opening pattern 130, and is formed to protrude on the opening pattern 130. Each of the light emitting structures 10 has a shape in which three or more inclined surfaces oblique to the main surface of the substrate 110 and a cross-sectional area gradually decreasing along the protruding direction. In addition, each light emitting structure 10 includes a first semiconductor layer 11, a second semiconductor layer 13 having a different conductivity type from the first semiconductor layer 11, and an active layer 12 interposed therebetween. do.

The substrate 110 is selected as a material having a lattice structure similar to that of the semiconductor material selected as the light emitting structure 10 in order to minimize crystal defects of the semiconductor material grown on the substrate 110. At the same time, the substrate 110 is selected of a conductive material so as to be electrically connected to the light emitting structure 10.

In particular, when the light emitting structure 10 is selected as a gallium nitride (GaN) -based semiconductor material having a hexagonal wurtzite crystal structure, the substrate 110 may be formed of SiC, GaN, Si, ZnS, ZnO, It may be selected from any one of AlN, LiMgO, GaAs, MgAl ₂ O ₃ and InAlGaN.

The buffer layer 120 is a buffer layer for reducing crystal defects due to differences in thermal expansion coefficient and lattice structure between the semiconductor material selected as the light emitting structure 10 and the substrate 110. Therefore, when the substrate 110 is made of the same material as the light emitting structure 10 and has the same lattice structure and the same thermal expansion coefficient, the buffer layer 120 may be omitted.

When the buffer layer 120 is formed, the buffer layer 120 is formed of an insulating material or a low temperature grown semiconductor material.

For example, the buffer layer 120 may be formed of an insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx). In this case, the buffer layer 120 made of an insulating material is sparsely formed on the main surface of the substrate 110.

Alternatively, the buffer layer 120 may be formed of a semiconductor material grown in a lower temperature atmosphere than the light emitting structure 10. In this case, the semiconductor material may be an undoped semiconductor material or a semiconductor material doped with the same impurities as the first semiconductor layer.

The opening pattern 130 is formed by patterning an insulating material stacked on the buffer layer 120. The opening pattern 130 includes at least one opening 131 through the insulating material to expose the buffer layer 120. The openings 131 are horizontally spaced apart from each other.

The opening 131 may be formed in a circular or polygonal pattern. In particular, when the light emitting structure 10 is selected as a gallium nitride (GaN) -based semiconductor material having a hexagonal wurtzite crystal structure, the opening 131 may be a hexagonal pattern.

The ohmic layer 140 is formed to cover the light emitting structure 10 and the opening pattern 130. That is, the ohmic layer 140 is formed on the opening pattern 130 to cover the second semiconductor layer 13.

The ohmic layer 140 is selected as a material having a sheet resistance and a light transmittance smaller than that of the second semiconductor layer 13, and diffuses a carrier (for example, a hole) into a wide area as large as that of the second semiconductor layer 13. And transmits the light generated in the light emitting structure. For example, the ohmic layer 140 may be formed of indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IZAZO), indium gallium zinc oxide (IGZO), IZTO, Metal oxides such as IGTO, AZO, AIO and GZO and the like, and a single layer of any one of metals such as Al, Ag, Pd, Rh and Rt, or any two or more layers or alloys.

The electrode 150 is formed in contact with at least a portion of the ohmic layer 140.

In this case, the substrate 110 is selected as a conductive material and functions as a first electrode electrically connected to the first semiconductor layer 11, and the electrode 150 is electrically connected to the second semiconductor layer 13. May be connected to function as a second electrode.

In exemplary embodiments, the substrate 110 may be bonded to an external circuit as a first electrode to inject a carrier (eg, an electron) into the first semiconductor layer 11, and the electrode 150 may be a second electrode. As an electrode, the electrode becomes a bonding region for connecting to an external circuit later, and a carrier (for example, a hole) can be injected into the second semiconductor layer 13.

2A to 2D, the shape of the light emitting structure 10 according to an exemplary embodiment of the present invention will be described in more detail. 2A and 2B are a perspective view and a cross-sectional view of the light emitting structure 10 of FIG. 1.

The light emitting structure 10 is formed in a shape having three or more inclined surfaces oblique to the main surface of the substrate 110 and a cross-sectional area gradually narrowing along the growth direction. That is, the light emitting structure 10 has a horn or a horn shape. In this case, when the semiconductor material is grown, the light emitting structure 10 may be formed in a horn or horn shape by adjusting process atmospheres such as temperature, pressure, and flow rate.

2A illustrates a light emitting structure 10 having a hexagonal pyramid including six inclined surfaces as the light emitting structure 10, but is not limited thereto.

Referring to the cross-sectional view of FIG. 2B, the light emitting structure 10 is formed to grow from the buffer layer 120 exposed through the opening 131 and to protrude on the opening pattern 130.

For example, when the light emitting structure 10 is a gallium nitride (GaN) -based semiconductor material having a hexagonal wurtzite type crystal structure, as shown in FIGS. 2A and 2B, the light emitting structure 10 is illustrated. ) Is grown to have a gradually narrow cross-sectional area along the protruding direction, while maintaining a hexagonal wurtzite crystal structure, it may be a hexagonal three-dimensional shape.

In addition, when the main surface of the substrate 110 is the C surface (0001), the inclined surfaces of the light emitting structure 10 may be selected as the S surface (1-101) and its equivalent crystal surfaces. In this case, the main surface of the substrate 110 may be selected as the M surface (1-100) or the A surface (11-20) in addition to the C surface (0001).

As mentioned above, the light emitting structure 10 includes a first semiconductor layer 11, an active layer 12, and a second semiconductor layer 13 having a different conductivity from that of the first semiconductor layer 11. In this case, the first semiconductor layer 11 is an n-type semiconductor material which is doped with n-type impurities such as Si to increase electron mobility, and the second semiconductor layer 13 is doped with p-type impurities such as Mg. It may be a p-type semiconductor material with increased hole mobility.

The active layer 12 is formed of a semiconductor material having a quantum well structure (MQW). The active layer 12 generates light by combining electrons and holes injected into the first semiconductor layer 11 and the second semiconductor layer 13, respectively.

For example, when the light emitting structure 10 is selected as a gallium nitride-based semiconductor material, the active layer 12 may include a barrier layer of In _x (Al _y Ga _(1-y) ) N and In _x (Al _y Ga _{(1). -y)} It may be formed as a single quantum well structure or a multi-quantum well structure consisting of a layer of N wells. At this time, according to the composition ratio of the nitride semiconductors (InGaN, GaN) of the barrier layer and the well layer, the wavelength region of the light emitted from the light emitting structure 10 ranges from a long wavelength to a short wavelength having an AlN (˜6.4 eV) band gap. Can be determined.

The first semiconductor layer 11 is in contact with the exposed buffer layer 120 through the opening 131, grows from the exposed buffer layer 120, and gradually becomes three or more inclined surfaces with respect to the main surface of the substrate 110. It is formed on the opening pattern 130 so as to have a shape having a narrowing cross-sectional area.

The active layer 12 is formed on the first semiconductor layer 11 and has a layer shape having three or more oblique inclined surfaces by the inclined surfaces of the first semiconductor layer 11. In other words, the active layer 12 is convexly convex, so that the edge is closer to the buffer layer 120 side than the center.

The second semiconductor layer 13 is formed on the active layer 12 and has a layer shape having three or more oblique inclined surfaces by the inclined surfaces of the active layer 12. That is, like the active layer 12, the 2nd semiconductor layer 13 is a layer shape which protruded convexly so that the edge may be adjacent to the buffer layer 120 side rather than the center.

For example, as illustrated in FIG. 2B, when the light emitting structure 10 is a hexagonal pyramid shape, the first semiconductor layer 11 is a hexagonal pyramid shape, and the active layer 12 and the second semiconductor layer 13 are hexagonal. It is a layer shape covering the pointed upper part of the horn.

In this case, the first semiconductor layer 11 is formed on the opening pattern 130 to cover a portion of the buffer layer 120 exposed through the opening 131, and the active layer 12 is formed on the first semiconductor layer 11. Is formed on the opening pattern 130, and the second semiconductor layer 13 is formed on the opening pattern 130 to cover the active layer 12.

Accordingly, at least a portion of each of the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13 contacts the opening pattern 130. Therefore, the surface area of the active layer 12 and the light emitting area corresponding to the surface area of the protruding upper portion of the first semiconductor layer 11 can be improved as much as possible. Therefore, the internal quantum efficiency corresponding to the light emitting area can be improved.

In addition, the active layer 12 may have a shape having a thickness gradually changing from the center to the edge. That is, the thickness of the active layer 12 may be gradually increased from the edge toward the center.

As such, the active layer 12 is formed as a convexly raised layer, and thus includes an inclined region or a curved region. As a result, the active layer 12 may be made of InGaN having a non-uniform composition, and may emit light in various wavelength regions. Therefore, the light emitting device 100 may be implemented as a light source that emits white light by properly mixing the light of various wavelengths generated in the active layer 12 even though it does not include a separate fluorescent layer.

2A and 2B have shown that the light emitting structure 10 and the first semiconductor layer 11 included therein have a horn shape. However, the light emitting structure and the first semiconductor layer included therein have a horn shape. It may be done.

That is, as illustrated in FIGS. 2C and 2D, by adjusting the process time of the semiconductor growth process, the light emitting structure 10 ′ may be formed in an annular shape. As described above, when the light emitting structure 10 'is a hexagonal pyramid shape, the first semiconductor layer 11' has a hexagonal pyramid shape, and the active layer 12 'and the second semiconductor layer 13' are raised with a hexagonal pyramid shape. It has the form of a layer covering the top.

Next, a method of manufacturing the light emitting device 100 shown in FIG. 1 will be described with reference to FIGS. 3 and 4A to 4I. As shown in FIG. 3, according to a first embodiment of the present invention. The method of manufacturing the light emitting device 100 includes forming a buffer layer on a substrate (S110), forming a mask material layer on a buffer layer (S120), and patterning the mask material layer to form an opening including at least one opening. Forming a pattern (S130), forming at least one light emitting structure in the buffer layer exposed through the at least one opening (S140), and forming an ohmic layer and an electrode (S150).

Among these, in the forming of the light emitting structure 10 (S140), growing the semiconductor material from the buffer layer 120 exposed through the opening 131 to form the first semiconductor layer 11 (S141), Forming an active layer 12 on the first semiconductor layer 11 (S142) and forming a second semiconductor layer 13 on the active layer 12 (S143). In this case, the light emitting structure 10 is formed in a shape having three or more inclined surfaces oblique to the main surface of the substrate 110 and a cross-sectional area gradually narrowing along the growth direction. In exemplary embodiments, the light emitting structure 10 may have a horn shape or a horn shape.

Specifically, as shown in FIG. 4A, the buffer layer 120 is formed on the entire surface of the substrate 110 (S110), and the mask material layer 130 ′ is formed on the entire surface of the buffer layer 120 (S120).

The substrate 110 is selected of a material having a lattice structure and conductivity similar to the semiconductor material of the light emitting structure 10. In exemplary embodiments, the substrate 110 may be selected from any one of SiC, GaN, Si, ZnS, ZnO, AlN, LiMgO, GaAs, MgAl ₂ O _3, and InAlGaN.

The forming step S110 of the buffer layer 120 may include laminating an insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx) on the main surface of the substrate 110.

Alternatively, the forming of the buffer layer 120 (S110) may include growing a semiconductor material in a temperature atmosphere lower than that of the light emitting structure 10. In this case, the semiconductor material may be an undoped semiconductor material or a semiconductor material doped with the same impurities as the first semiconductor layer.

In the step S120 of forming the mask material layer 130 ′, the mask material layer 130 ′ is selected as a curable resin material that has insulation and can be patterned.

Next, the forming of the opening pattern 131 (S130) may include patterning the mask material layer 130 ′ to form at least one opening 131 spaced apart from each other and arranged horizontally. In this case, each of the openings 131 passes through the mask material layer 130 ′ and exposes the buffer layer 120 thereunder.

The opening 131 is a circular or polygonal pattern.

For example, as illustrated in FIG. 4B, the opening 131a may be a hexagonal pattern and may be a hexagonal pillar-shaped hole with respect to the mask material layer 130 ′. Alternatively, as illustrated in FIG. 4C, the opening 131b may have a circular pattern, and may be a cylindrical hole with respect to the mask material layer 130 ′. Alternatively, as illustrated in FIG. 4D, the opening 131c may have a rectangular pattern and may be a rectangular pillar-shaped hole with respect to the mask material layer 130 ′. However, the openings 131, 131a, 131b, and 131c are designed to have a size and an interval corresponding to the light emitting structure 10.

Subsequently, as shown in FIG. 4E, the first semiconductor layer 11 having a shape having three or more inclined surfaces that are oblique with respect to the main surface of the substrate 110 and a cross-sectional area that gradually decreases toward the upper portion is formed on the opening pattern 130. To form (S141). In exemplary embodiments, the first semiconductor layer 11 may have a horn shape. The first semiconductor layer 11 may be selected as a gallium nitride based semiconductor material (n-GaN) doped with n-type impurities such as Si.

Referring to FIG. 4F, the first semiconductor layer 11 is formed by growing a semiconductor material from the buffer layer 120 exposed through the opening 131. In the growth process of the semiconductor material, by appropriately changing the temperature, pressure, flow rate, and processing time, the first semiconductor layer 11 may be formed in a shape having three or more inclined surfaces and a cross-sectional area gradually narrowing toward the upper portion.

In addition, when the main surface of the substrate 110 is the C surface (0001), the inclined surfaces of the light emitting structure 10 may be selected as the S surface (1-101) and its equivalent crystal surfaces. In this case, the main surface of the substrate 110 may be selected as the M surface (1-100) or the A surface (11-20) in addition to the C surface (0001).

On the other hand, in the step S141 of forming the first semiconductor layer 11, if the process time during the growth process of the semiconductor material is appropriately adjusted, as shown in FIG. 4G, the first semiconductor layer 11 ′, It may also be formed in a horn shape instead of the horn shape shown in FIGS. 4E and 4F.

As shown in FIG. 4H, the semiconductor material of the quantum well structure MQW is grown on the first semiconductor layer 11 to form the active layer 12 (S142). At this time, the active layer 12 has a layer shape having three or more inclined surfaces obliquely by the inclined surfaces of the first semiconductor layer 11. That is, the active layer 12 has a convexly raised layer shape such that the edge is closer to the buffer layer 120 side than the center.

The second semiconductor layer 13 is formed by growing a conductive semiconductor material different from the first semiconductor layer 11 on the active layer 12 (S143). In this case, the second semiconductor layer 13 has a layer shape having three or more oblique inclined surfaces by the inclined surfaces of the active layer 12. That is, the second semiconductor layer 13 has a convexly raised layer shape such that the edge thereof is closer to the buffer layer 120 side than the center thereof. The second semiconductor layer 13 may be selected as a gallium nitride based semiconductor material (p-GaN) doped with a p-type impurity such as Mg.

In the light emitting structure 10, the active layer 12 and the second semiconductor layer 13 have a convexly raised layer shape so that the edge thereof is closer to the buffer layer 120 side than the center thereof.

As a result, the first semiconductor layer 11, the second semiconductor layer 13 having a different conductivity type from the first semiconductor layer 11, and the active layer 12 interposed between the first semiconductor layer 11 and the second semiconductor layer. The light emitting structure 10 including the () is formed. In this case, the light emitting structure 10 is in contact with the buffer layer 120 exposed through the opening 131, protrudes on the opening pattern 130, and gradually increases toward three or more inclined surfaces and upper portions oblique to the main surface of the substrate 110. It has a shape having a narrowing cross-sectional area.

The first semiconductor layer 11 is formed on the opening pattern 130 to cover a portion of the buffer layer 120 exposed through the opening 131, and the active layer 12 is formed on the first semiconductor layer 11. Is formed on the opening pattern 130, and the second semiconductor layer 13 is formed on the opening pattern 130 to cover the active layer 12. Accordingly, at least a portion of each of the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13 contacts the opening pattern 130. Therefore, the surface area of the active layer 12 and the light emitting area corresponding to the surface area of the protruding upper portion of the first semiconductor layer 11 can be improved as much as possible. Therefore, the internal quantum efficiency corresponding to the light emitting area can be improved.

In the forming step (S142) of the active layer 12, by controlling the process atmosphere during the growth of the semiconductor material, it is possible to form the active layer 12 in the shape of a thickness gradually changing from the center to the edge. That is, the thickness of the active layer 12 may be gradually increased from the edge toward the center.

As such, the active layer 12 is formed as a convexly raised layer, and thus includes an inclined region or a curved region. As a result, the active layer 12 may be made of InGaN having a non-uniform composition, and may emit light in various wavelength regions. Therefore, the light emitting device 100 may be implemented as a light source that emits white light by properly mixing the light of various wavelengths generated in the active layer 12 even though it does not include a separate fluorescent layer.

As shown in FIG. 4I, an ohmic layer 140 is formed on the entire surface of the light emitting structure 10 and the opening pattern 130. The first electrode 151 is formed on the other surface of the substrate 110, and the second electrode 150 is formed on at least a portion of the ohmic layer 14 (S150).

The ohmic layer 140 is formed on the opening pattern 130 to cover the second semiconductor layer 13. The ohmic layer 140 is selected as a material having a sheet resistance and a light transmittance smaller than that of the second semiconductor layer 13. For example, the ohmic layer 140 may be formed of any one of metal oxides such as ITO, IZO, IZTO, IAZO, IGZO, IZTO, IGTO, AZO, AIO, and GZO, and metals such as Al, Ag, Pd, Rh, and Rt. Can be selected.

The first electrode 151 is formed on the conductive substrate 110 and is electrically connected to the first semiconductor layer 11. The first electrode 151 is bonded to an external circuit to inject a carrier (for example, electrons) into the first semiconductor layer 11.

The second electrode 150 is electrically connected to the second semiconductor layer 13 through the ohmic layer 140. The second electrode 150 is bonded to an external circuit to inject a carrier (eg, a hole) into the second semiconductor layer 13.

However, since the substrate 110 is conductive, it is also possible not to form the first electrode 151 during the step S150 of forming the ohmic layer and the electrode according to the design.

Second Example

5 is a cross-sectional view of a light emitting device according to a second embodiment of the present invention. 6A is a flowchart illustrating a method of manufacturing the light emitting device according to the second embodiment of the present invention, and FIG. 6B is a process chart of the step of forming a temporary layer in the method of manufacturing the light emitting device shown in FIG. 6A. .

The light emitting device 101 illustrated in FIG. 5 includes a support substrate 110, a buffer layer 120 formed on the support substrate 110, a third semiconductor layer 160 formed on the buffer layer 120, and a third An opening pattern 130 formed on the semiconductor layer 160, at least one light emitting structure 10, an ohmic layer 140 formed on the opening pattern 130 to cover the light emitting structure 10, and a third semiconductor. The first electrode 152 is formed on a portion of the layer 160, and the second electrode 150 is formed on the ohmic layer 140.

That is, the light emitting device 101 according to the second embodiment includes a first electrode formed on the third semiconductor layer 160 and the third semiconductor layer 160 interposed between the buffer layer 120 and the opening pattern 130. Except for further including 152, it is the same as the light emitting device 100 of FIG. Hereinafter, a duplicate description will be omitted.

The support substrate 110 is the same as the substrate 110 of FIG. 1. However, unlike the substrate 100 of FIG. 1, since the light emitting device 102 of FIG. 2 includes a separate first electrode 152, it does not need to be selected as a conductive material. Thus, the support substrate 110 may also be selected as insulating Al ₂ O ₃ . That is, the support substrate 110 may be selected from any one of Al ₂ O ₃ , SiC, GaN, Si, ZnS, ZnO, AlN, LiMgO, GaAs, MgAl ₂ O _3, and InAlGaN.

In addition, in the growth process of the semiconductor material for forming the buffer layer 120, the third semiconductor layer 160, and the light emitting structure 10, a separate growth substrate (not shown, corresponding to 111 of FIG. 6B) is used. The support substrate 110 need not be a material having a lattice structure similar to that of a semiconductor material.

The third semiconductor layer 160 is a semiconductor material having the same conductivity as that of the first semiconductor layer 11 on the third semiconductor layer 160, and is formed on the buffer layer 120. For example, if the first semiconductor layer 11 is an n-type semiconductor material, the third semiconductor layer 160 is also made of an n-type semiconductor material. The third semiconductor layer 160 diffuses the carrier (for example, electrons) injected through the first electrode 152 to the first semiconductor layer 11 of each of the light emitting structures 10.

The first electrode 152 is formed on a partial region of the third semiconductor layer 160 of a conductive material. The first electrode 152 is electrically connected to the first semiconductor layer 11 through the third semiconductor layer 160. The first electrode 152 is bonded to an external circuit to inject a carrier (for example, electrons) into the first semiconductor layer 11.

Next, a method of manufacturing the light emitting device 101 according to the second embodiment will be described with reference to FIGS. 6A and 6B.

As shown in FIG. 6A, in the method of manufacturing the light emitting device 101 according to the second embodiment of the present invention, forming a buffer layer and a third semiconductor layer on a growth substrate (S210) and forming a third semiconductor layer on the third semiconductor layer. Forming a mask material layer in the (S220), patterning the mask material layer to form an opening pattern including at least one opening (S230), in the third semiconductor layer exposed through the at least one opening, Forming at least one light emitting structure (S240), forming an ohmic layer and an electrode (S250), and replacing the growth substrate with a supporting substrate (S260).

Here, the step of replacing the growth substrate with the support substrate (S260), the step of forming a temporary layer on the remaining area except the electrode of the ohmic layer (S261), removing the growth substrate (S262), attaching the support substrate Step S263 and removing the temporary layer (S263).

In detail, the buffer layer 120 is formed on the entire surface of the growth substrate 111, and the third semiconductor layer 160 is formed on the entire surface of the buffer layer 120 (S210).

An opening pattern including at least one opening 131 is formed by forming a mask material layer (not shown) on the entire surface of the third semiconductor layer 160 (S220) and then patterning the mask material layer (not shown) ( 130) (S230). In this case, each of the openings 131 passes through the mask material layer 130 ′ and exposes the buffer layer 120 thereunder.

The light emitting structure 10 is formed in a shape having three or more inclined surfaces oblique to the main surface of the substrate 110 and a cross-sectional area gradually narrowing along the growth direction (S240).

Since the steps S210 to S240 are the same as those shown in FIGS. 4A to 4H except that the third semiconductor layer 160 is further formed on the buffer layer 120, redundant description thereof will be omitted.

Subsequently, an ohmic layer 140 is formed on the opening pattern 130 to cover the light emitting structure 10. After removing the ohmic layer 140 and the opening pattern 130 to expose a portion of the third semiconductor layer 160, a first electrode 152 is formed on the exposed third semiconductor layer. In addition, the second electrode 150 is formed on at least a portion of the ohmic layer 140 (S250).

In this case, the forming of the ohmic layer and the electrode (S250) are the same as those illustrated in FIG. 4I except that the first electrode 152 is formed on the exposed third semiconductor layer. do.

Next, as shown in FIG. 6B, the temporary layer 170 is formed on the remaining regions of the ohmic layer 150 except for the first and second electrodes 152 and 150 (S261). That is, the temporary layer 170 is formed in contact with the remaining area of the ohmic layer 150.

The temporary layer 170 is insulative and is selected as a material that can be cured after being applied in a gel or liquid state. In exemplary embodiments, the temporary layer 170 may be selected as spin on glass (SOG).

Thereafter, the growth substrate 111 is removed while the light emitting structure 10 is supported by using the temporary layer 170 (S262). In this case, the removing step S262 of the growth substrate 111 may be performed by laser lift off (LLO) or chemical lift off (CLO).

The support substrate 110 is attached to one surface of the third semiconductor layer 160 from which the growth substrate 111 and the buffer layer 120 are removed (S263). In this case, the support substrate 110 may be attached to one surface of the buffer layer 120 from which the growth substrate 111 is removed.

Next, the light emitting device 101 of FIG. 5 is manufactured by removing the temporary layer 170 (S264).

6A and 6B, in the manufacturing method illustrated in FIG. 3, the light emitting device 101 of FIG. 5 includes the third semiconductor layer (S110) in the forming of the buffer layer 120. If the first electrode 152 is further formed in the step S150 of forming the ohmic layer and forming the electrode further, the manufacturing method shown in FIG. 3 may be manufactured.

Third Example

7 is a cross-sectional view of a light emitting device according to a third embodiment of the present invention, and FIG. 8 is a flowchart illustrating a method of manufacturing a light emitting device according to a third embodiment of the present invention.

The light emitting device 102 shown in FIG. 7 includes a support substrate 110, a buffer layer 120 formed on the support substrate 110, a third semiconductor layer 160 formed on the buffer layer 120, and a third An opening pattern 130 formed on the semiconductor layer 160, at least one light emitting structure 10, an ohmic layer 140 formed on the opening pattern 130 to cover the light emitting structure 10, and a third semiconductor. First and second electrodes 152 and 150 of the first electrode 152 formed on the partial region of the layer 160, the second electrode 150 formed on the ohmic layer 140, and the ohmic layer 140. The fluorescent layer 180 is formed on the remaining regions except for ().

That is, the light emitting element 102 shown in FIG. 7 is the same as the light emitting element 101 shown in FIG. 5 except that the fluorescent layer 180 is further included. Hereinafter, a duplicate description will be omitted.

The fluorescent layer 180 is made of a fluorescent material emitting light in the second wavelength region in response to light in the first wavelength region emitted from the light emitting structure 10. In this case, the first wavelength region and the second wavelength region may be regions overlapping each other.

As the fluorescent layer 180 is included, the light emitting device 102 may emit light of a first wavelength region emitted from the light emitting structure 10 and a second wavelength emitted from a fluorescent material reacting to light of the first wavelength region. By mixing the light of the area, it can be implemented as a light source that emits light of white or other colors.

Next, a method of manufacturing the light emitting device 102 according to the third embodiment will be described with reference to FIG. 8.

As shown in FIG. 8, in the method of manufacturing the light emitting device 102 according to the third embodiment of the present invention, forming a buffer layer and a third semiconductor layer on a growth substrate (S310), and forming a third semiconductor layer on the third semiconductor layer Forming a mask material layer in the (S320), patterning the mask material layer, forming an opening pattern including at least one opening (S330), in the third semiconductor layer exposed through the at least one opening, Forming at least one light emitting structure (S340), forming an ohmic layer and an electrode (S350), forming a fluorescent layer on remaining regions other than the electrode of the ohmic layer (S360), and removing the growth substrate. Step S370 and attaching the support substrate (S380).

Among these, forming a buffer layer and a third semiconductor layer (S310), forming a mask material layer (S320), forming an opening pattern (S330), forming a light emitting structure (S340) and an ohmic layer The step (S350) of forming the and electrodes is the same as the manufacturing method of the second embodiment shown in Fig. 6A, and therefore redundant description will be omitted below.

After the ohmic layer and the electrode are formed (S350), a liquid material or a gel material including a fluorescent material is disposed in a state in which a mask for blocking the first electrode 152 and the second electrode 150 is disposed. After the coating, the applied material is cured to form the fluorescent layer 180 (S360).

Subsequently, in a state in which the light emitting structure 10 is supported using the fluorescent layer 180, the growth substrate (not shown) is removed (S370). In this case, the removing of the growth substrate (S370) may be performed by a laser lift off (LLO) or chemical lift off (CLO) method.

The support substrate 110 is attached to one surface of the third semiconductor layer 160 from which the growth substrate (not shown) and the buffer layer 120 are removed (S380). In this case, the support substrate 110 may be attached to one surface of the buffer layer 120 from which the growth substrate 111 is removed.

As a result, the light emitting device 102 of FIG. 7 is manufactured.

Fourth Example

9 is a cross-sectional view of a light emitting device according to a fourth embodiment of the present invention, and FIG. 10 is a flowchart illustrating a method of manufacturing a light emitting device according to a fourth embodiment of the present invention.

The light emitting device 103 illustrated in FIG. 9 includes a support substrate 110, a buffer layer 120 formed on the support substrate 110, a third semiconductor layer 160, and a third formed on the buffer layer 120. An opening pattern 130 formed on the semiconductor layer 160, at least one light emitting structure 10, an ohmic layer 140 formed on the opening pattern 130 to cover the light emitting structure 10, and a third semiconductor. First and second electrodes 152 and 150 of the first electrode 152 formed on the partial region of the layer 160, the second electrode 150 formed on the ohmic layer 140, and the ohmic layer 140. And a scratching groove 181 irregularly formed by scraping off the fluorescent layer 180 and the fluorescent layer 180 formed on the remaining regions except for.

That is, the light emitting device 103 shown in FIG. 9 is the same as the light emitting device 102 shown in FIG. 7 except that it further includes a scratching groove 181. Hereinafter, a duplicate description will be omitted.

The fluorescent layer 180 is made of a fluorescent material that emits light in the second wavelength region in response to light in the first wavelength region emitted from the light emitting structure 10. In this case, as the amount of the fluorescent material covering the light emitting structure 10 increases, the light of the second wavelength region by the fluorescent layer 180 may be generated in a greater amount than the light of the first wavelength region by the light emitting structure 10. You can expect that.

However, it is very difficult to control to apply the same amount of fluorescent material on the ohmic layer 140 in every process of forming the fluorescent layer 180. Thus, a process error of a threshold value or more with respect to the amount of the fluorescent material is generated for each of the fluorescent material coating process. Due to this process error, the uniformity of the color characteristics between the devices can be lowered.

Therefore, the light emitting device 103 shown in FIG. 9 can finely control the amount of the fluorescent material constituting the fluorescent layer 180 by using the scratching groove 181 formed by scraping the fluorescent layer 180 finely. have. For example, when the fluorescent layer 180 is formed of an excessive amount of fluorescent material than the design, the fluorescent layer 180 is selectively scraped off to form a scratching groove 181. In this way, the color characteristics of the device corresponding to the amount of the fluorescent material forming the fluorescent layer 180 can be finely adjusted, and defects related to the color characteristics can be reduced, so that the yield can be improved.

In addition, the scratching groove 181 may be disposed in a region other than the main emission region (for example, an outer region of the emission surface) to prevent color errors or light quantity errors due to the scratching groove 181.

Next, a method of manufacturing the light emitting device 103 according to the fourth embodiment will be described with reference to FIG. 10.

As shown in FIG. 10, in the method of manufacturing the light emitting device 103 according to the fourth embodiment of the present invention, forming a buffer layer and a third semiconductor layer on a growth substrate (S410), and forming a third semiconductor layer on the third semiconductor layer Forming a mask material layer in the (S420), patterning the mask material layer to form an opening pattern including at least one opening (S430), in the third semiconductor layer exposed through the at least one opening, Forming at least one light emitting structure (S440), forming an ohmic layer and an electrode (S440), forming an ohmic layer and an electrode (S450), and forming a fluorescent layer on the remaining regions of the ohmic layer except for the electrode. Forming step (S460), forming a scratching groove in the fluorescent layer (S461), removing the growth substrate (S470) and attaching a support substrate (S480).

Among the steps S410 to S460, S470, and S480 except for forming the scratching groove 181 in the fluorescent layer 180, the steps S410 to S460, S470, and S480 are the same as the manufacturing method of the third embodiment shown in FIG. 8. Therefore, redundant description will be omitted below.

After forming the fluorescent layer 180 (S460), the forming step (S461) of the scratching groove 181, the step of determining whether the amount of the fluorescent material forming the fluorescent layer 180 is greater than the design, and If the amount of the fluorescent material is greater than the design, the step of irregularly scraping the upper fluorescent layer 180 to form a scratching groove 181.

At this time, the scratching groove 181 is formed in a region (for example, the outer region of the light emitting surface) that is not the main light emitting region of the fluorescent layer 180, to prevent the color error or the light amount error due to the scratching groove 181. can do.

Thereafter, by removing the growth substrate (S470) and attaching the support substrate to the surface from which the growth substrate is removed (S480), the light emitting device 103 shown in FIG. 9 is manufactured.

5th Example

11 is a cross-sectional view of a light emitting device according to a fifth embodiment of the present invention, and FIG. 12 is a flowchart illustrating a method of manufacturing a light emitting device according to a fifth embodiment of the present invention.

The light emitting device 104 illustrated in FIG. 11 includes a support substrate 110, a buffer layer 120 formed on the support substrate 110, a third semiconductor layer 160 formed on the buffer layer 120, and a third An opening pattern 130 formed on the semiconductor layer 160, at least one light emitting structure 10, an ohmic layer 140 formed on the opening pattern 130 to cover the light emitting structure 10, and a third semiconductor. First and second electrodes 152 and 150 of the first electrode 152 formed on the partial region of the layer 160, the second electrode 150 formed on the ohmic layer 140, and the ohmic layer 140. And a scratching pattern 182 that is formed by scraping off the fluorescent layer 180 and the fluorescent layer 180 formed on the remaining areas except for ().

That is, the light emitting device 103 shown in FIG. 11 is the same as the light emitting device 102 according to the third embodiment shown in FIG. 7 except that the scratching pattern 182 is further included. Hereinafter, a duplicate description will be omitted.

The light emitting structure 10 is formed to protrude on the opening pattern 130 in a shape having three or more inclined surfaces oblique to the main surface of the support substrate 110 and a cross-sectional area that gradually decreases toward an upper portion thereof. The ohmic layer 140 is also formed on the light emitting structure 10 to have a shape corresponding to the upper shape of the light emitting structure 10. That is, the shape of the ohmic layer 140 includes a ridge area corresponding to the shape of the light emitting structure 10 and a valley area corresponding to the gap shape between the light emitting structure 10.

In addition, the fluorescent layer 180 is formed on the remaining region except for the region where the first and second electrodes 152 and 150 are formed in the ohmic layer 140, and is formed in a shape having a flat upper surface. That is, the thickness of the fluorescent layer 180 corresponding to the valley region of the ohmic layer 140 is thicker than the thickness corresponding to the ridge region of the ohmic layer 140. As such, the valley region and the ridge region covered by the fluorescent layers 180 having different thicknesses emit light of slightly different colors, so that the light emitting surface of the device may not exhibit uniform color characteristics.

Therefore, the light emitting device 104 shown in FIG. 11 includes a scratch pattern 182 formed by regularly scraping off the fluorescent layer 180 corresponding to the valley region of the ohmic layer 140. By using the scratch 180 as described above, the light emitting surface of the device can be adjusted to have more uniform color characteristics, and the color characteristics of the device can be further improved.

Next, a method of manufacturing the light emitting device 104 according to the fifth embodiment will be described with reference to FIG. 12.

As shown in FIG. 12, in the method of manufacturing the light emitting device 104 according to the fifth embodiment of the present invention, forming a buffer layer and a third semiconductor layer on a growth substrate (S510), and forming a third semiconductor layer on the third semiconductor layer Forming a mask material layer in the (S520), patterning the mask material layer, forming an opening pattern including at least one opening (S530), in the third semiconductor layer exposed through the at least one opening, Forming at least one light emitting structure (S540), forming an ohmic layer and an electrode (S550), forming a fluorescent layer on remaining regions other than the electrode of the ohmic layer (S560), and scratching patterns on the fluorescent layer. Forming (S561), removing the growth substrate (S570) and attaching the support substrate (S580).

Among the steps S510 to S560, S570, and S580 except for forming the scratching pattern 182 on the fluorescent layer 180, the steps S510 to S560, S570, and S580 are the same as the manufacturing method of the fourth embodiment shown in FIG. 10. Therefore, redundant description will be omitted below.

After the fluorescent layer 180 is formed (S560), the fluorescent layer 180 is regularly scraped out to correspond to the valley region of the ohmic layer 140 to form a scratching pattern 182 (S561).

Thereafter, by removing the growth substrate (S570) and attaching the support substrate to the surface from which the growth substrate is removed (S580), the light emitting device 104 shown in FIG. 11 is manufactured.

6th Example

13 is a cross-sectional view of a light emitting array according to a sixth embodiment of the present invention, and FIG. 14 is a view showing a light emitting surface of the light emitting array according to the sixth embodiment of the present invention. 15 is a flowchart illustrating a method of manufacturing the light emitting array according to the sixth embodiment of the present invention, and FIGS. 16A to 16K are process charts illustrating the method of manufacturing the light emitting array shown in FIG. 15.

The light emitting array 200 illustrated in FIG. 13 includes a third semiconductor layer 210, an opening pattern 220 formed on one surface of the third semiconductor layer 210, a plurality of light emitting structures 10, and a third semiconductor. On the ohmic layer 251 and the ohmic layer 251 formed on the opening pattern 220 to cover the partition wall 230, the fluorescent layer 240, and the light emitting structure 10 on the other surface of the layer 210. The reflective layer 252 is formed, the diffusion barrier layer 253 formed on the reflective layer 252, the support layer 254 formed on the diffusion barrier layer 253 and having a flat one surface, is formed in the region between the light emitting structure 10 And an insulating hole 260, a first electrode 270 formed through the insulating hole 260, and a circuit layer 280 attached on one flat surface of the support layer 254. In this case, the circuit layer 280 is attached to the support layer 254 through an adhesive layer (not shown).

Here, the openings 221 included in the opening pattern 220 are spaced apart from each other and are horizontally arranged with respect to the third semiconductor layer 210 to expose the third semiconductor layer 210.

The light emitting structures 10 are formed on the third semiconductor layer 210 corresponding to the openings 221 and are spaced apart from each other and arranged horizontally.

Each light emitting structure 10 is formed to be connected to the third semiconductor layer 210 exposed through the opening 221, to contact at least a portion of the opening pattern 220, and to protrude on the opening pattern 220. Each of the light emitting structures 10 has a shape having three or more inclined surfaces oblique with respect to the third semiconductor layer 210 and a cross-sectional area gradually decreasing along the protruding direction. In addition, each light emitting structure 10 includes a first semiconductor layer 11, a second semiconductor layer 13 having a different conductivity type from the first semiconductor layer 11, and an active layer 12 interposed therebetween. do.

The third semiconductor layer 210 is formed of a semiconductor material having the same conductivity as the first semiconductor layer 11 on the third semiconductor layer 210. For example, if the first semiconductor layer 11 is an n-type semiconductor material, the third semiconductor layer 210 is also made of an n-type semiconductor material. The third semiconductor layer 220 diffuses carriers (eg, electrons) injected through the first electrode 270 into the first semiconductor layer 11 of each of the light emitting structures 10.

The opening pattern 220 is formed by patterning an insulating material stacked on one surface of the third semiconductor layer 210. The opening pattern 220 includes a plurality of openings 221 penetrating an insulating material to expose a portion of the third semiconductor layer 210. The openings 131 are horizontally spaced apart from each other.

The opening 131 may be formed in a circular or polygonal pattern. In particular, when the light emitting structure 10 is selected as a gallium nitride (GaN) -based semiconductor material having a hexagonal wurtzite crystal structure, the opening 131 may be a hexagonal pattern.

The light emitting structure 10 is formed on the opening pattern 220 to correspond to the third semiconductor layer 210 exposed through the opening 221. The light emitting structure 10 is a shape having three or more oblique inclined surfaces and a cross-sectional area gradually narrowing along the growth direction. That is, the light emitting structure 10 has a horn or a horn shape. In this case, when the semiconductor material is grown, the light emitting structure 10 may be formed in a horn or horn shape by adjusting process atmospheres such as temperature, pressure, and flow rate.

Meanwhile, except that the light emitting structure 10 illustrated in FIG. 13 is grown from the third semiconductor layer 210 exposed through the opening 221, the light emitting structure illustrated in FIGS. 1 and 2A to 2D ( Since it is the same as 10), the overlapping description is omitted below.

The partition wall 230 and the fluorescent layer 240 are formed on the other surface of the third semiconductor layer 210. At this time, the fluorescent layer 240 is to implement the light emitting array 200 shown in Figure 13 as a surface light source that emits light of a specific color, the partition wall 230 is a different material forming the fluorescent layer 240 To isolate them. The partition 230 and the fluorescent layer 240 will be described later with reference to FIG. 14.

The ohmic layer 251 is formed to cover the plurality of light emitting structures 10 and the opening pattern 220. That is, the ohmic layer 251 is formed on the opening pattern 220 to cover the second semiconductor layer 13. The ohmic layer 251 is selected as a material having a sheet resistance and a light transmittance smaller than that of the second semiconductor layer 13, and diffuses a carrier (for example, a hole) into a wide area as large as that of the second semiconductor layer 13. And transmits the light generated in the light emitting structure. For example, the ohmic layer 251 may be formed of indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IZAZO), indium gallium zinc oxide (IGZO), IZTO, Metal oxides such as IGTO, AZO, AIO and GZO and the like, and a single layer of any one of metals such as Al, Ag, Pd, Rh and Rt, or any two or more layers or alloys.

The reflective layer 252 is formed on the ohmic layer 251. The reflective layer 252 is selected as a reflective material, and reflects light toward the third semiconductor layer 210. The reflective layer 252 includes Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Mf, IZO / Ni, AZO / Ag, IZO / Ag / Ni, and AZO / Ag / Ni. It may be selected from any one single layer, or any two or more layers or alloys.

The diffusion barrier layer 253 is formed on the reflective layer 252 to prevent the materials selected as the ohmic layer 251 and the reflective layer 252 from diffusing due to high heat and high pressure. The diffusion barrier layer 253 may be selected from a single layer of any one of Ti, Ni, Cu, N, Zr, Cr, Ta, and Rh, or any two or more layers or alloys.

The support layer 254 is formed between the light emitting structure 10 and the circuit layer 280 to support the plurality of light emitting structures 10 on the circuit layer 280.

Specifically, since the overall thickness of the light emitting structure 10, the ohmic layer 251, and the diffusion barrier layer 252 is about several μm, and the plurality of light emitting structures 10 are not in a horizontal layer shape, the plurality of light emitting structures 10 may be formed. It can be expected that the shape holding force of) is relatively low. Accordingly, the light emitting structure 10 and the circuit layer 280 may be spaced apart from the circuit layer 280 by a predetermined interval or more, and the plurality of light emitting structures 10 may be protected during the packaging process. The support layer 254 is formed therebetween.

Therefore, the light emitting array 200 illustrated in FIG. 13 includes a support layer 254 formed between the light emitting structure 10 and the circuit layer 280, thereby separating the light emitting structure 10 from the circuit layer 280 by a predetermined distance. Spaced apart above, and protects the light emitting structure (10) in the packaging process.

On the other hand, when the ohmic layer 251 is selected as a reflective material, the reflective layer 252 may be omitted. In addition, when the ohmic layer 251 and the reflective layer 252 are materials having a low diffusion rate with respect to high temperature and high pressure, the diffusion barrier layer 253 may be omitted.

The insulating hole 260 may pass through the opening pattern 220, the light emitting structure 10, the ohmic layer 251, the reflective layer 252, the diffusion barrier layer 253, and the support layer 254. Is formed in the area. That is, the insulating hole 260 is a columnar insulating layer that intersects between the third semiconductor layer 210 and the circuit layer 280 along the protruding direction of the light emitting structure 10.

For example, the insulating hole 260 may correspond to at least a portion of the opening pattern 220, which is an area between the light emitting structures 10, and may include the opening pattern 220, the light emitting structure 10, the ohmic layer 251, and the reflective layer. 252, a first hole (not shown) passing through the diffusion barrier layer 253 and the support layer 254, and an insulating material in the first hole.

The insulating hole 260 insulates the plurality of light emitting structures 10, and in particular, the active layer 12 and the second semiconductor layer form the first electrode 270 formed in a region between the plurality of light emitting structures 10. Insulation from (13).

The first electrode 270 is formed through the insulating hole 260. The first electrode 270 is formed of a conductive material and electrically connected to the third semiconductor layer 210. That is, the first electrode 270 is surrounded by the insulating hole 260, and has a pillar-shaped conductivity crossing between the third semiconductor layer 210 and the circuit layer 280 along the protruding direction of the light emitting structure 10. Layer.

For example, the first electrode 270 may be formed of a second hole (not shown) passing through the insulating hole 260 in the protruding direction of the light emitting structure 10, and a conductive material deposited or filled in the second hole. Can be.

The first electrode 270 electrically connects between the circuit layer 280 and the third semiconductor layer 210. Accordingly, the first semiconductor layer 11 receives a carrier (for example, electrons) from the first electrode 270.

Meanwhile, the ohmic layer 251, the reflective layer 252, the diffusion barrier layer 253, and the support layer 254 may be selected as a conductive material and function as a second electrode electrically connected to the second semiconductor layer 13. . Accordingly, the second semiconductor layer 13 receives a carrier (eg, a hole) through the ohmic layer 251, the reflective layer 252, the diffusion barrier layer 253, and the support layer 254.

Next, the partition wall 230 and the fluorescent layer 240 will be described next.

The partition wall 230 is formed to be convex on the other surface of the third semiconductor layer 210 to correspond to the opening pattern 220.

The fluorescent layer 240 corresponds to the light emitting structure 10, respectively, and is formed on the other surface of the third semiconductor layer 210. The fluorescent layer 180 is made of a fluorescent material that emits light in the second wavelength region in response to light in the first wavelength region emitted from the light emitting structure 10. In this case, the first wavelength region and the second wavelength region may be regions overlapping each other.

On the other hand, the light emitting array 200 shown in FIG. 13 includes a plurality of subpixels. In this case, each sub-pixel is implemented by each light emitting structure 10 and the fluorescent layer 240 corresponding thereto, and becomes a region for emitting light of a specific color (for example, any one of red, green, and blue).

Accordingly, the fluorescent layer 240 may be formed of different fluorescent materials corresponding to each light emitting structure 10 so that light of a color corresponding to each subpixel is emitted.

For example, referring to FIG. 14, the first subpixel R emitting red light is a first fluorescent material emitting light of a third wavelength region in a region corresponding to the first light emitting structure and the first light emitting structure. The second subpixel G, which is implemented as a fluorescent layer formed and emits green light, is formed of a second fluorescent material emitting light of a fourth wavelength region in a region corresponding to the second light emitting structure and the second light emitting structure. The third subpixel B, which is implemented as a fluorescent layer and emits blue light, is a fluorescent layer formed of a third fluorescent material emitting light of a fifth wavelength region in a region corresponding to the third and third light emitting structures. It can be implemented as. In this case, since the first to third fluorescent materials are separated from each other by the partition wall 230, the first to third subpixels R, G, and B are spaced apart from each other by the partition wall 230.

 As described above, the light emitting array 200 illustrated in FIG. 13 includes a plurality of subpixels each of the light emitting structure 10 and the fluorescent layer 240. In this case, when a current is applied to the plurality of light emitting structures 10, the same amount of light is emitted from all of the plurality of subpixels, so that the light emitting array 200 emits white light or other specific color light from the entire surface of the light emitting surface. It can be used as a surface light source. For example, when the fluorescent layer 240 is formed of only one fluorescent material so that the plurality of sub-pixels emit light of a specific color, the light emitting array 200 is a surface light source that emits light of a specific color. Can be used. Alternatively, when the fluorescent layer 240 is formed of two or more fluorescent materials such that the plurality of subpixels emits light of any one of red, green, and blue, the light emitting array 200 is emitted from each subpixel. It may be used as a surface light source that emits white light mixed with red, green and blue light.

Next, a method of manufacturing the light emitting array 200 illustrated in FIG. 13 will be described with reference to FIGS. 15 and 16A to 16K.

As shown in FIG. 15, in the method of manufacturing the light emitting array 200 according to the sixth embodiment of the present invention, forming a buffer layer and a third semiconductor layer on a growth substrate (S610), and Forming a mask material layer on one surface (S620), patterning the mask material layer to form an opening pattern including a plurality of openings (S630), a plurality of light emission in the third semiconductor layer exposed through the openings Forming a structure (S640), sequentially forming an ohmic layer, a reflective layer, a diffusion barrier layer, and a support layer to cover the plurality of light emitting structures and the opening pattern, and forming an insulation hole and a first electrode in a region between the light emitting structures. (S650), planarizing one surface of the support layer (S660), attaching a circuit layer to the planarized surface of the support layer (S670), separating the growth substrate (S680), and the other surface of the third semiconductor layer Forming the partition wall and the fluorescent layer (S690) It includes.

In the forming of the light emitting structure 10 (S640), the semiconductor material may be grown from the third semiconductor layer 210 exposed through the opening 221 to form the first semiconductor layer 11 ( S641), forming an active layer 12 on the first semiconductor layer 11 (S642), and forming a second semiconductor layer 13 on the active layer 12 (S643). At this time, the light emitting structure 10 is formed in a shape having three or more inclined surfaces oblique to the main surface of the growth substrate 290, and the cross-sectional area gradually narrowed along the growth direction. In exemplary embodiments, the light emitting structure 10 may have a horn shape or a horn shape.

Specifically, as shown in FIG. 16A, a buffer layer 291 is formed on the entire surface of the growth substrate 290, and a third semiconductor layer 210 is formed on the buffer layer 291 (S610). In operation S620, a mask material layer 220 ′ is formed on the entire surface of the third semiconductor layer 210.

In the step S610 of forming the buffer layer 291 and the third semiconductor layer 210, the growth substrate 290 has a lattice structure similar to that of the semiconductor material forming the light emitting structure 10 with the third semiconductor layer 210. It is chosen as the material. For example, when the third semiconductor layer 210 and the light emitting structure 10 are formed of a gallium nitride based semiconductor material having a hexagonal wurtzite crystal structure, the growth substrate 290 may be formed of Al _2. One of O ₃ , SiC, GaN, Si, ZnS, ZnO, AlN, LiMgO, GaAs, MgAl ₂ O ₃ and InAlGaN.

The buffer layer 291 may be formed by thinly laminating an insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx) on the main surface of the growth substrate 290. Alternatively, the buffer layer 291 may be formed by growing a semiconductor material on a main surface of the growth substrate 290 in a temperature atmosphere lower than that of the light emitting structure 10. In this case, the semiconductor material may be an undoped semiconductor material or a semiconductor material doped with the same impurities as the first semiconductor layer.

The third semiconductor layer 210 may be formed of a semiconductor material having the same conductivity as the first semiconductor layer 11 contacting the third semiconductor layer 160. For example, if the first semiconductor layer 11 is an n-type semiconductor material, the third semiconductor layer 210 is also selected as the n-type semiconductor material.

In the step S620 of forming the mask material layer 220 ', the mask material layer 220' is selected as a curable resin material that has insulation and can be patterned.

Next, the forming of the opening pattern 220 (S630) includes patterning the mask material layer 220 ′ to form at least one opening 221 spaced apart from each other and arranged horizontally. In this case, each of the openings 221 passes through the mask material layer 220 ′ and exposes the third semiconductor layer 210 under the opening. The opening 221 is a circular or polygonal pattern. For example, the opening 221 may be one of a hexagonal columnar shape, a circular shape, and a square columnar hole.

As illustrated in FIG. 16C, in the forming of the first semiconductor layer 11 (S641), the growth substrate 290 may be formed by using the third semiconductor layer 210 exposed through the opening 221 as a growth surface. And growing the semiconductor material in a shape having three or more inclined surfaces that are oblique with respect to the main surface of and a cross-sectional area that gradually narrows upward. In exemplary embodiments, the first semiconductor layer 11 may have a horn shape. The first semiconductor layer 11 may be formed of a gallium nitride based semiconductor material (n-GaN) doped with n-type impurities such as Si.

Here, when the main surface of the growth substrate 290 is the C surface (0001), the inclined surfaces of the light emitting structure 10 may be selected as the S surface (1-101) and its equivalent crystal surfaces. Meanwhile, the main surface of the growth substrate 290 may be selected as the M surface 1-100 or the A surface 11-20 in addition to the C surface 0001.

In addition, the forming of the active layer 12 (S642) includes growing a semiconductor material having a quantum well structure (MQW) on the first semiconductor layer 11. At this time, the active layer 12 has a layer shape having three or more inclined surfaces obliquely by the inclined surfaces of the first semiconductor layer 11. That is, the active layer 12 has a convexly raised layer shape such that the edge is closer to the third semiconductor layer 210 side than the center.

In addition, the forming of the second semiconductor layer 13 (S643) includes growing a conductive semiconductor material different from the first semiconductor layer 11 on the active layer 12. In this case, the second semiconductor layer 13 has a layer shape having three or more oblique inclined surfaces by the inclined surfaces of the active layer 12. That is, the second semiconductor layer 13 has a convexly raised layer shape so that the edge thereof is closer to the third semiconductor layer 210 side than the center thereof. The second semiconductor layer 13 may be made of a gallium nitride based semiconductor material (p-GaN) doped with a p-type impurity such as Mg.

As a result, the first semiconductor layer 11, the second semiconductor layer 13 having a different conductivity type from the first semiconductor layer 11, and the active layer interposed between the first semiconductor layer 11 and the second semiconductor layer ( A light emitting structure 10 including 12 is formed. At this time, the light emitting structure 10 is in contact with the buffer layer 120 exposed through the opening 131, protrudes on the opening pattern 130, toward three or more inclined surfaces and the upper side oblique to the main surface of the growth substrate 290 It has a shape with a gradually narrowing cross-sectional area.

The first semiconductor layer 11 is formed on the opening pattern 220 to cover a portion of the third semiconductor layer 210 exposed through the opening 221, and the active layer 12 is formed on the first semiconductor layer. It is formed on the opening pattern 220 to cover the (11), the second semiconductor layer 13 is formed on the opening pattern 220 to cover the active layer 12. Accordingly, at least a portion of each of the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13 contacts the opening pattern 220. Therefore, the surface area of the active layer 12 and the light emitting area corresponding to the surface area of the protruding upper portion of the first semiconductor layer 11 can be improved as much as possible. Therefore, the internal quantum efficiency corresponding to the light emitting area can be improved.

In the step of forming the active layer 12 (S642), the process atmosphere may be adjusted when the semiconductor material is grown, so that the active layer 12 may be formed in a shape having a thickness gradually changing from the center to the edge. That is, the thickness of the active layer 12 may be gradually increased from the edge toward the center.

As such, the active layer 12 is formed as a convexly raised layer, and thus includes an inclined region or a curved region. As a result, the active layer 12 may be made of InGaN having a non-uniform composition, and may emit light in various wavelength regions. Therefore, the light emitting array 200 may be implemented as a light source that emits white light by properly mixing the light of various wavelengths generated in the active layer 12 even though it does not include a separate fluorescent layer.

Forming the ohmic layer 251, the reflective layer 252, the diffusion barrier layer 253, the support layer 254, the insulating hole 260, and the first electrode 270 (S250) covers the light emitting structure 10. Forming the opening pattern 220 saeng ohmic layer 251, forming the reflective layer 252 on the ohmic layer 251, forming the diffusion barrier layer 253 on the reflective layer 252, and emitting light. Forming a support layer 254 ′ having one surface of irregularities on the diffusion barrier layer 253 corresponding to the structure 10, forming an insulation hole 260 in an area between the light emitting structures, and insulating hole 260. Forming a first electrode 270 penetrating the through.

That is, as shown in FIG. 16D, the ohmic layer 251, the reflective layer 252, the diffusion barrier layer 253, and the support layer 254 ′ cover the second semiconductor layer 12 of each of the light emitting structures 10. Are sequentially formed on the opening pattern 220.

At this time, each of the ohmic layer 251, the reflective layer 252, the diffusion barrier layer 253, and the support layer 254 ′ has one surface having an uneven shape corresponding to the shape of the light emitting structure 10. That is, the irregularities of the ohmic layer 251, the reflective layer 252, the diffusion barrier layer 253, and the support layer 254 ′ may have a gap between the ridge region corresponding to the upper shape of the light emitting structure 10 and the light emitting structure 10. It includes a bone area corresponding to the shape.

In addition, the ohmic layer 251 is selected as a material having a sheet resistance smaller than that of the second semiconductor layer 13, and is selected as a material having a sheet resistance and light transmittance smaller than the second semiconductor layer 13, so that a carrier (eg, Holes) are diffused into a wide area of the second semiconductor layer 13 so as to transmit light generated in the light emitting structure. For example, the ohmic layer 251 may be formed of indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IZAZO), indium gallium zinc oxide (IGZO), IZTO, Metal oxides such as IGTO, AZO, AIO and GZO and the like, and a single layer of any one of metals such as Al, Ag, Pd, Rh and Rt, or any two or more layers or alloys.

The reflective layer 252 is selected as a reflective material to reflect light toward the third semiconductor layer 210. In exemplary embodiments, the reflective layer 252 may be formed of Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Mf, IZO / Ni, AZO / Ag, IZO / Ag / Ni, and AZO / Ag. Or a single layer of any one of / Ni, or two or more layers or alloys.

The diffusion barrier layer 253 is selected as a material having a lower diffusivity for high heat and high pressure than the materials forming the ohmic layer 251 and the reflective layer 252. For example, it may be selected from a single layer of any one of Ti, Ni, Cu, N, Zr, Cr, Ta, and Rh, or any two or more layers or alloys.

The support layer 254 is selected as a material that can be deposited to a thickness thicker than the ohmic layer 251, the reflective layer 252, and the diffusion barrier layer 253. The support layer 254 separates the plurality of light emitting structures 10 from the circuit layer 280 by a predetermined interval or more, and protects the plurality of light emitting structures 10 during the packaging process.

However, unlike the illustration of FIG. 16D, when the ohmic layer 251 is selected as a reflective material, the reflective layer 252 may be omitted, and the ohmic layer 251 and the reflective layer 252 may have high temperature and high pressure. In the case of a material having a low diffusion rate, the diffusion barrier layer 253 may be omitted.

Subsequently, as illustrated in FIG. 16E, the light emitting structure 220 may pass through the opening pattern 220, the light emitting structure 10, the ohmic layer 251, the reflective layer 252, the diffusion barrier layer 253, and the support layer 254. 10) an insulating hole 260 'is formed in the region between the layers. For example, in the process of forming the insulating hole 260 ′, the insulating hole 260 corresponds to at least a portion of the opening pattern 220, which is an area between the light emitting structures 10, and thus, the opening pattern 220 and the light emitting structure ( 10) forming a first hole (not shown) through the ohmic layer 251, the reflective layer 252, the diffusion barrier layer 253, and the support layer 254, and depositing or filling an insulating material in the first hole. It may include the step. Accordingly, the insulating hole 260 ′ may include an opening pattern 220, a light emitting structure 10, an ohmic layer 251, a reflective layer 252, a diffusion barrier layer 253, and a support layer along the protruding direction of the light emitting structure 10. It is formed of a pillar-shaped insulating layer to contact the third semiconductor layer 210 across the 254.

The first electrode 270 ′ electrically connected to the third semiconductor layer 210 is formed through the insulating hole 260 ′.

As shown in FIG. 16F, the process of forming the first electrode 270 ′ is a process of forming a second hole (not shown) passing through the insulation hole 260 ′ along the protruding direction of the light emitting structure 10. And depositing a conductive material in the second hole.

Alternatively, as illustrated in FIG. 16G, the process of forming the first electrode 270 ′ may include forming a second hole (not shown) passing through the insulating hole 260 ′ along the protruding direction of the light emitting structure 10. And inserting or filling a conductive material in the second hole.

That is, the first electrode 270 ′ is surrounded by the insulating hole 260 and has a columnar shape intersecting between the third semiconductor layer 210 and the circuit layer 280 along the protruding direction of the light emitting structure 10. It is formed of a conductive layer. At this time, when the first electrode 270 ′ is formed through the deposition of the conductive material, the first electrode 270 ′ is formed of a conductive material and has a hollow pillar shape, and an insertion or filling process of the conductive material is performed. When the first electrode 270 ′ is formed through the first electrode 270 ′, the first electrode 270 ′ has a pillar shape in which an entire region is filled with a conductive material.

Next, as shown in FIG. 16H, one surface having an uneven shape of each of the support layer 254 ′, the insulating hole 260 ′, and the first electrode 270 ′ is flattened (S660). In this case, the support layer 254, the insulating hole 260, and the first electrode 270 may have a flat one surface.

As shown in FIG. 16I, the circuit layer 280 is attached to one planarized surface of each of the support layer 254, the insulating hole 260, and the first electrode 270 (S670). In this case, the circuit layer 280 may be attached to the support layer 254, the insulating hole 260, and the first electrode 270 by using an adhesive layer (not shown).

The adhesive layer (not shown) may be selected from a single layer of any one of Ti, Au, Sn, Ni, Cr, In, B, Cu, Ag, and Ta, or two or more laminates or alloys.

As shown in FIG. 16J, the adhesive force in the region between the third semiconductor layer 210 and the buffer layer 291 is weakened, and a predetermined force is applied to the weakened region, thereby growing the growth substrate 290 from the third semiconductor layer 210. ) And the buffer layer 291 are separated (S680). In this case, the separating step S780 of the growth substrate 290 may be performed by a laser lift off (LLO) or a chemical lift off (CLO) method.

On the other hand, although not shown separately, it is also possible to weaken the adhesive force between the region between the growth substrate 290 and the buffer layer 291, and to apply a predetermined force to separate the growth substrate 290 from the buffer layer 291. In this case, the buffer layer 291 remaining on the third semiconductor layer 210 may be removed by a grinding method or may be maintained as it is.

Thereafter, as shown in FIG. 16K, the barrier rib 230 and the fluorescent layer 240 are formed on the other surface of the third semiconductor layer 210 exposed by the separation step S680 of the growth substrate 290. (S690).

In the forming of the barrier rib 230 and the fluorescent layer 240 (S690), a process of forming the convex barrier rib 230 on the other surface of the third semiconductor layer 210 in response to the opening pattern 220, and In response to each of the light emitting structures 10, forming the fluorescent layer 240 on the other surface of the third semiconductor layer 210. Here, the formation of the fluorescent layer 240 may be performed by selectively printing a fluorescent material on the other surface of the third semiconductor layer 210 in correspondence with each light emitting structure 10. In the fluorescent layer 240, different kinds of fluorescent materials emitting light of different wavelength regions are separated from each other by the barrier rib 230.

Thus, the light emitting array 200 shown in FIG. 13 is manufactured.

Seventh Example

17 is a cross-sectional view of a light emitting array according to a seventh embodiment of the present invention.

The light emitting array 201 illustrated in FIG. 17 includes a third semiconductor layer 210, an opening pattern 220 formed on one surface of the third semiconductor layer 210, a plurality of light emitting structures 10, and a third semiconductor. On the other side of the layer 210 to cover the partition 230, the fluorescent layer 240, the distributed Bragg reflector (255R) formed on the light emitting structure 10, the light emitting structure 10 to cover On the ohmic layer 251 formed on the opening pattern 220, the reflective layer 252 formed on the ohmic layer 251, the diffusion barrier layer 253 and the diffusion barrier layer 253 formed on the reflective layer 252. A support layer 254 having one flat surface, an insulation hole 260 formed in a region between the light emitting structures 10, a first electrode 270 formed through the insulation hole 260, and a support layer 254. And a circuit layer 280 attached on one flat surface of the substrate. In this case, the circuit layer 280 is attached to the support layer 254 through an adhesive layer (not shown).

That is, the light emitting array 201 illustrated in FIG. 17 further includes a distributed Bragg reflector 255 between the plurality of light emitting structures 10 and the ohmic layer 251. Same as 200. Hereinafter, a duplicate description will be omitted.

The distribution Bragg reflector 255 is a structure in which one or more pairs of material layers having different refractive indices are repeatedly stacked, and 90% or more of the light in the wavelength region by the light emitting structures 10 and the fluorescent layer 240. It is formed to have a reflectance.

For example, the distributed Bragg reflector 255 has a structure in which the first Bragg pair and the second Bragg pair are regularly or irregularly mixed and stacked. At this time, the first Bragg pair is a stack of the first material layer and the second material layer having different refractive indices, and the second Bragg pair is a stack of the third material layer and the fourth material layer having different refractive indices.

In this case, the one or more repeatedly stacked first Bragg pairs have a higher reflectance for red light (for example, the light in the 550-630 nm wavelength region) than the blue light, and the one or more repeatedly stacked second Bragg pairs have more than the red light and green light. It may have a higher reflectance for blue light (eg, light in the 400-500 nm wavelength range).

And the first and second material layers of the first Bragg pair have an optical thickness thicker than the third and fourth material layers of the second Bragg pair (wherein the optical thickness is a parameter proportional to the refractive index of the material and the thickness of the layer). It may be formed as), but is not necessarily limited thereto.

Further, the first material layer and the third material layer may be selected to have the same refractive index, and the second material layer and the fourth material layer may have the same refractive index, in particular, the first and third material layers may be TiO ₂ having a refractive index may be selected, and the second and fourth material layers may be selected as SiO ₂ having a refractive index of about 1.5.

The distribution Bragg reflector 255 formed as described above may have a relatively high 90% reflectance of visible light in a wide wavelength region including red light, green light, and blue light, thereby further improving light extraction efficiency of the light emitting array 201. have.

Meanwhile, although not separately illustrated, the method for manufacturing the light emitting array 201 illustrated in FIG. 17 includes a distribution Bragg between forming a plurality of light emitting structures (S640) and forming an ohmic layer (S650). Except for further comprising the step of forming the reflector 255, since it is the same as the manufacturing method of the sixth embodiment shown in FIG.

Eighth Example

18 is a cross-sectional view of a light emitting array according to an eighth embodiment of the present invention, FIG. 19 is a flowchart illustrating a method of manufacturing a light emitting array according to an eighth embodiment of the present invention, and FIGS. 20A to 20J are shown in FIG. 19. It is a process chart which shows the manufacturing method of a light emitting array.

The light emitting array 300 illustrated in FIG. 18 includes an opening pattern 310, a plurality of light emitting structures 10, an insulating hole 321 and a first insulating layer 322 formed in a portion of the light emitting structure 10. The first electrode 331 formed on the first insulating layer 322, the second electrode 332 formed on another partial region on the light emitting structure 10, and the first bump formed on the first electrode 331. 341, a second bump 342 formed on the second electrode 332, a reflective layer 350, a first bump 341 and a second formed on the first and second bumps 341 and 342. A second insulating layer 323 formed in the region between the bumps 342 and a circuit layer 280 attached to the reflective layer 350 is included. In this case, the circuit layer 280 is attached to the reflective layer 350 through an adhesive layer (not shown).

The light emitting structures 10 are formed corresponding to the openings 221 and are spaced apart from each other and arranged horizontally.

Each light emitting structure 10 extends from the opening 221 to be in contact with at least a portion of the opening pattern 310 and is formed to protrude on the opening pattern 310. Each of the light emitting structures 10 has a shape having a cross-sectional area gradually decreasing along three or more inclined surfaces oblique to the opening pattern 310 and the protruding direction. In addition, each light emitting structure 10 includes a first semiconductor layer 11, a second semiconductor layer 13 having a different conductivity type from the first semiconductor layer 11, and an active layer 12 interposed therebetween. do.

The opening pattern 310 is formed by patterning an insulating material. In this case, although not shown in FIG. 18, the insulating material is stacked on a buffer layer (not shown) formed on the main surface of the growth substrate (not shown).

The opening pattern 310 includes a plurality of openings 311 penetrating the insulating material. The openings 311 are horizontally spaced apart from each other.

The opening 311 may be formed in a circular or polygonal pattern. In particular, when the light emitting structure 10 is selected as a gallium nitride (GaN) -based semiconductor material having a hexagonal wurtzite crystal structure, the opening 311 may have a hexagonal pattern.

The light emitting structure 10 is formed on one surface of the opening pattern 220 corresponding to the opening 221. The light emitting structure 10 is a shape having three or more oblique inclined surfaces and a cross-sectional area gradually narrowing along the growth direction. That is, the light emitting structure 10 has a horn or a horn shape. In this case, when the semiconductor material is grown, the light emitting structure 10 may be formed in a horn or horn shape by adjusting process atmospheres such as temperature, pressure, and flow rate.

Meanwhile, except that the light emitting structure 10 illustrated in FIG. 18 does not come into contact with the buffer layer 120 exposed through the opening 221, the light emitting structure 10 illustrated in FIGS. 1 and 2A to 2D. Since the description is the same as that, redundant description will be omitted below.

The insulating hole 321 and the first insulating layer 322 are formed in some regions on the second semiconductor layer 13 of the light emitting structure 10.

The insulating hole 321 is formed in a portion of the second semiconductor layer 13 so as to pass through the second semiconductor layer 13 and the active layer 12. That is, the insulating hole 321 is a columnar insulating layer penetrating the second semiconductor layer 13 and the active layer 12 along the protruding direction of the light emitting structure 10. For example, the insulating hole 321 may correspond to a portion of the second semiconductor layer 13, and may include a third hole (not shown) passing through the second semiconductor layer 13 and the active layer 12, and a third hole. It may be formed of an insulating material in the hole.

The first insulating layer 322 is formed in a portion of the second semiconductor layer 13 so as to be connected to the insulating hole 321.

The insulating hole 321 and the first insulating layer 322 insulate the first electrode 331 formed on the second semiconductor layer 13 from the active layer 12 and the second semiconductor layer 13.

The first electrode 331 passes through the insulating hole 321 to contact the first semiconductor layer 11 and is formed on the first insulating layer 322.

For example, the first electrode 331 may be formed in a fourth hole (not shown) and a fourth hole penetrating the first insulating layer 322 and the insulating hole 321 along the protruding direction of the light emitting structure 10. A through region 331a made of a deposited or filled conductive material, and a layer region 331b made of a conductive material stacked on the first insulating layer 322 so as to follow the through region 331a.

That is, the through region 331a of the first electrode 331 is surrounded by the insulating hole 321 and has a pillar crossing the second semiconductor layer 13 and the active layer 12 along the protruding direction of the light emitting structure 10. The conductive layer has a shape, and the layer region 331b of the first electrode 331 is a conductive layer laminated on the first insulating layer 322.

The first electrode 331 is electrically connected to the first semiconductor layer 11 to inject a carrier (for example, electrons) into the first semiconductor layer 11.

The second electrode 332 is formed in another partial region on the second semiconductor layer 13 of the light emitting structure 10. That is, the second electrode 332 is formed of a conductive material stacked on the remaining region in which the first insulating layer 321 is not formed on the second semiconductor layer 13. The second electrode 332 is electrically connected to the second semiconductor layer 13 to inject a carrier (for example, a hole) into the second semiconductor layer 13.

The first bump 341 is formed on the layer region 331b of the first electrode 331. That is, the first bump 341 extends from the layer region 331b of the first electrode 331 along the protruding direction of the light emitting structure 10.

The second bump 342 is formed on the second electrode 332. That is, the second bump 342 extends from the second electrode 332 along the protruding direction of the light emitting structure 10.

The first and second bumps 341 and 342 are formed between the plurality of light emitting structures 10 and the circuit layer 360 to support the plurality of light emitting structures 10 on the circuit layer 360. And as extension electrodes of the first and second electrodes 331 and 332.

That is, since the overall thickness of the plurality of light emitting structures 10 is about several μm, and the plurality of light emitting structures 10 are not in the form of a horizontal layer, the shape holding force of the plurality of light emitting structures 10 is relatively low. Therefore, the light emitting array 300 illustrated in FIG. 18 includes the first and second bumps 341 and 342 formed between the plurality of light emitting structures 10 and the circuit layer 360, whereby the light emitting structures 10 are provided. Is spaced apart from the circuit layer 360 by a predetermined interval or more, and protects the light emitting structure 10 during the packaging process.

Reflective layer 350 is formed on first and second bumps 341 and 342. In this case, the reflective layer 250 is selected as a reflective material, and reflects light toward the first semiconductor layer 11. The reflective layer 350 includes Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Au, Mf, IZO / Ni, AZO / Ag, IZO / Ag / Ni, and AZO / Ag / Ni. It may be selected from any one single layer, or any two or more layers or alloys.

Although not separately illustrated in FIG. 18, the light emitting array 300 according to the eighth embodiment may further include a diffusion barrier layer (not shown) formed on the reflective layer 350. In this case, the diffusion barrier layer (not shown) is to prevent the diffusion (diffusion) of the materials constituting the first and second electrodes 331, 332, and the reflective layer 250, Ti, Ni, Cu, N, Zr, It may be selected as a single layer of any one of Cr, Ta and Rh, or any two or more layers or alloys.

The circuit layer 360 is attached onto the reflective layer 350 through an adhesive layer (not shown).

The partition wall 370 and the fluorescent layer 380 are formed on the other surface of the opening pattern 310. That is, a plurality of light emitting structures 10 extending from the plurality of openings 311 are formed on one surface of the opening pattern 310, and the partition wall 370 and the fluorescent layer 380 are formed on the other surface of the opening pattern 310. do.

The partition wall 370 is formed convexly on the other surface of the opening pattern 310 in correspondence with the opening pattern 310.

The fluorescent layer 380 is formed on the other surface of the opening pattern 310 to correspond to the light emitting structure 10, respectively. In this case, the fluorescent layer 180 is made of a fluorescent material emitting light in the second wavelength region in response to light in the first wavelength region emitted from the light emitting structure 10. In this case, the first wavelength region and the second wavelength region may be regions overlapping each other.

The light emitting array 300 shown in FIG. 18 includes a plurality of subpixels. In this case, each sub-pixel is implemented by each light emitting structure 10 and the fluorescent layer 380 corresponding to each of the sub-pixels to be an area for emitting light of a specific color (for example, any one of red, green, and blue).

Accordingly, the fluorescent layer 380 may be formed of different fluorescent materials corresponding to each light emitting structure 10 so that light of a color corresponding to each subpixel is emitted. In this case, different fluorescent materials are separated from each other by the partition wall 370. Since the partition wall 370 and the fluorescent layer 380 are the same as the light emitting array 200 shown in FIGS. 13 and 14, a description thereof will not be repeated below.

As described above, the light emitting array 300 illustrated in FIG. 18 includes a plurality of subpixels each of the light emitting structure 10 and the fluorescent layer 380. In this case, since the current can be selectively applied to each of the light emitting structures 10, and light is emitted only from the selected sub-pixels among the plurality of sub-pixels, the light-emitting array 300 displays an image or the like. It can be used as a surface light source for emitting light.

Next, a method of manufacturing the light emitting array 200 illustrated in FIG. 18 will be described with reference to FIGS. 19 and 20A to 20J.

As shown in FIG. 19, the method of manufacturing the light emitting array 300 according to the eighth embodiment of the present invention includes forming a buffer layer on a growth substrate (S710), and forming a mask material layer on the buffer layer ( S720, patterning the mask material layer to form an opening pattern including a plurality of openings (S730), forming a plurality of light emitting structures in the buffer layer exposed through the openings (S640), and the light emitting structure 10. ) (S750) forming an insulating hole and a first insulating layer in a portion of the region (S750), forming a first electrode on the first insulating layer (S761), and a second electrode in another portion of the light emitting structure (10). Forming (S762), forming first and second bumps on the first and second electrodes, and forming a reflective layer on the first and second bumps (S763), attaching a circuit layer on the reflective layer. Step (S770), separating the growth substrate (S780), and the other surface of the opening pattern And a step (S790) of forming the wall and the fluorescent layer.

Among these, in the forming of the light emitting structure 10 (S740), growing the semiconductor material from the buffer layer exposed through the opening 221 to form the first semiconductor layer 11 (S741), and the first semiconductor. Forming an active layer 12 on the layer 11 (S742) and forming a second semiconductor layer 13 on the active layer 12 (S743). In this case, the light emitting structure 10 is formed in a shape having three or more inclined surfaces oblique to the opening pattern, and a cross-sectional area gradually narrowing along the growth direction. In exemplary embodiments, the light emitting structure 10 may have a horn shape or a horn shape.

Specifically, as shown in FIG. 20A, a buffer layer 391 is formed on the entire surface of the growth substrate 390 (S710). After forming a mask material layer (not shown) on the entire surface of the buffer layer 391 (S720), the mask material layer (not shown) is patterned to form an opening pattern 310 including the opening 311 (S730). ). In addition, using the buffer layer 391 exposed through the opening 311 as a growth surface, the semiconductor material is grown into a shape having three or more inclined surfaces oblique to the main surface of the growth substrate 390 and a cross-sectional area gradually narrowing toward an upper portion thereof. By doing so, the light emitting structure 10 is formed (S740).

At this time, forming a buffer layer on the growth substrate (S710), forming a mask material layer on the buffer layer (S720), patterning the mask material layer, forming an opening pattern including a plurality of openings (S730) ) And forming the plurality of light emitting structures in the buffer layer exposed through the opening are the same as the manufacturing method of the sixth embodiment shown in FIG. 15 except that the third semiconductor layer is not formed. In the following description, redundant description will be omitted.

As shown in FIG. 20B, a third hole 321 ′ penetrating the second semiconductor layer 13 and the active layer 12 is formed in a partial region on the second semiconductor layer 13.

As shown in FIG. 20C, an insulating material is deposited or applied to a portion of the third hole 321 ′ and the second semiconductor layer 13 subsequent to the insulating hole 321 and the first insulating layer ( 322 is formed (S750). In this case, the insulating hole 321 is a pillar-shaped insulating layer penetrating the second semiconductor layer 13 and the active layer 12 along the protruding direction of the light emitting structure 10.

As shown in FIG. 20D, the forming of the first electrode (S761) may include a fourth hole penetrating the first insulating layer 322 and the insulating hole 321 along the protruding direction of the light emitting structure 10. 331a '), and as illustrated in FIG. 20D, a process of depositing or filling the conductive material on the fourth hole 331a' and the first insulating layer 322 subsequent thereto is performed.

At this time, the first electrode 331 is surrounded by the insulating hole 321 and the through region 331a crossing the second semiconductor layer 13 and the active layer 12 in the protruding direction of the light emitting structure 10, and The layer region 331b may be stacked on the first insulating layer 322. Since the first electrode 331 is made of a conductive material in contact with the first semiconductor layer 11, the first electrode 331 is electrically connected to the first semiconductor layer 11, so that a carrier (for example, Inject).

Next, as shown in FIG. 20F, the conductive material is laminated on another partial region on the second semiconductor layer 13 to form the second electrode 332 (S762).

Subsequently, as shown in FIG. 20G, in the forming of the first and second bumps and the reflective layer (S763), a conductive material having a predetermined thickness is laminated on the first electrode 331 and the second electrode 332. To form a first bump 341 that follows the first electrode 331 and a second bump 342 that leads to the second electrode 332, and on the first and second bumps 341 and 342. Stacking the reflective material to form the reflective layer 350.

As shown in FIG. 20H, the circuit layer 360 is attached on the reflective layer 350 (S770). In this case, the circuit layer 360 may be attached to the reflective layer 350 using an adhesive layer (not shown). The adhesive layer (not shown) may be selected from a single layer of any one of Ti, Au, Sn, Ni, Cr, In, B, Cu, Ag, and Ta, or two or more laminates or alloys.

As shown in FIG. 20I, the adhesive force of the region between the buffer layer 391 and the opening pattern 310 is weakened, and a predetermined force is applied to the weakened region, so that the growth substrate 390 and the buffer layer ( 391) is separated (S780). In this case, the separating step S280 of the growth substrate 290 may be performed by a laser lift off (LLO) or a chemical lift off (CLO) method.

However, although not separately illustrated, in the separation step S780 of the growth substrate 390, the adhesive force of the region between the growth substrate 390 and the buffer layer 391 is weakened, and a predetermined force is applied thereto, thereby providing a buffer layer 291. After separating the growth substrate 290 from, the remaining buffer layer 291 can be removed by a grinding (granding) method.

As shown in FIG. 20J, the partition wall 230 is formed on the other surface of the opening pattern 310 exposed by the separation step S780 of the growth substrate 390, and the other surface of the light emitting structure 10 is formed. A fluorescent layer is formed (S790).

In the forming of the barrier rib 230 and the fluorescent layer 240 (S690), the process of forming the convex barrier rib 370 on the other surface of the opening pattern 220 and on the other surface of each light emitting structure 10 is performed. And forming the third fluorescent layer 380. Here, the formation of the fluorescent layer 380 may be performed by selectively printing a fluorescent material on the other surface of the first semiconductor layer 11 corresponding to each light emitting structure 10. In the fluorescent layer 380, different kinds of fluorescent materials emitting light of different wavelength ranges are separated from each other by the partition wall 370.

Thus, the light emitting array 300 shown in Fig. 18 is manufactured.

9th Example

21 is a cross-sectional view of a light emitting array according to a ninth embodiment of the present invention.

The light emitting array 301 illustrated in FIG. 21 may include an opening pattern 310, a plurality of light emitting structures 10, a distributed Bragg reflector (333) formed on the light emitting structure 10, and a light emitting structure ( In the insulating hole 321 and the first insulating layer 322, the first electrode 331 formed on the first insulating layer 322, and the other partial region on the light emitting structure 10. The second electrode 332 to be formed, the first bump 341 formed on the first electrode 331, the second bump 342 formed on the second electrode 332, the first and second bumps ( Reflective layer 350 formed on 341, 342, second insulating layer 323 formed in the region between first bump 341 and second bump 342, and circuit layer deposited on reflective layer 350. 280. In this case, the circuit layer 280 is attached to the reflective layer 350 through an adhesive layer (not shown).

The light emitting structures 10 are formed corresponding to the openings 221 and are spaced apart from each other and arranged horizontally.

Each light emitting structure 10 extends from the opening 221 to be in contact with at least a portion of the opening pattern 310 and is formed to protrude on the opening pattern 310. Each of the light emitting structures 10 has a shape having a cross-sectional area gradually decreasing along three or more inclined surfaces oblique to the opening pattern 310 and the protruding direction. In addition, each light emitting structure 10 includes a first semiconductor layer 11, a second semiconductor layer 13 having a different conductivity type from the first semiconductor layer 11, and an active layer 12 interposed therebetween. do.

That is, the light emitting array 301 illustrated in FIG. 21 is the same as the light emitting array 300 illustrated in FIG. 18 except that the light emitting array 301 further includes a distributed Bragg reflector 333 formed on the plurality of light emitting structures 10. Do. Hereinafter, a duplicate description will be omitted.

In addition, since the distribution Bragg reflector 333 is the same as the light emitting array 201 shown in FIG. 17, the overlapping description is abbreviate | omitted below.

Meanwhile, although not separately illustrated, the method of manufacturing the light emitting array 301 illustrated in FIG. 21 includes forming a plurality of light emitting structures (S740), and forming an insulating hole and a first insulating layer (S750). The same as the manufacturing method of the eighth embodiment shown in Fig. 19, except that it further comprises the step of forming a distribution Bragg reflector 333 between), the description overlapping below will be omitted.

The foregoing description of the present invention is intended for illustration, and it will be understood by those skilled in the art that the present invention may be easily modified in other specific forms without changing the technical spirit or essential features of the present invention. will be. It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive. For example, each component described as a single entity may be distributed and implemented, and components described as being distributed may also be implemented in a combined form.

The scope of the present invention is shown by the following claims rather than the above description, and all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included in the scope of the present invention. do.

10: light emitting structure 11: first semiconductor layer
12: active layer 13: second semiconductor layer
100 to 104: Light emitting elements 200, 201, 300, and 301: Light emitting array
130, 220, 310: opening pattern
131, 221, 311: openings

Claims (34)

In the light emitting device,
Board;
A buffer layer formed on the substrate;
An opening pattern formed on the buffer layer, the opening pattern including one or more openings arranged horizontally apart from each other and exposing the buffer layer; And
At least one light emitting structure protruding from the exposed buffer layer corresponding to the opening on the opening pattern,
The light emitting device includes three or more inclined surfaces, the light emitting device having a shape in which the cross-sectional area is reduced in the direction in which the light emitting structure protrudes. The method of claim 1,
The light emitting device is formed to be in contact with the opening pattern to cover at least a portion of the opening pattern. The method of claim 1,
The light emitting structure,
A first semiconductor layer protruding from the exposed buffer layer including three or more inclined surfaces;
An active layer formed on the first semiconductor layer; And
A light emitting device comprising a second semiconductor layer formed on the active layer. The method of claim 3, wherein
The thickness of the active layer gradually increases from the edge of the active layer toward the center. The method of claim 3, wherein
A transparent conductive material, the light emitting device further comprising an ohmic layer formed on the opening pattern to cover the light emitting structure. The method of claim 5,
The light emitting device further comprises an electrode formed to contact at least a portion of the ohmic layer. The method according to claim 6,
Wherein the substrate is electrically connected to the first semiconductor layer through the opening, and the electrode is electrically connected to the second semiconductor layer through the ohmic layer, respectively. The method of claim 1,
The light emitting structure is a light emitting device in the shape of a horn or horn. The method of claim 8,
The light emitting structure is formed of a gallium nitride-based semiconductor material having a hexagonal wurtzite crystal structure,
And when the main surface of the substrate is the C surface (0001), the inclined surface is selected as the S surface (1-101) and an equivalent crystal surface thereof of the substrate. A method of manufacturing a light emitting device,
Forming a buffer layer on the substrate;
Forming a mask material layer on the buffer layer;
Patterning the mask material layer to form an opening pattern to include one or more openings spaced apart from each other and arranged horizontally and exposing the buffer layer; And
Forming at least one light emitting structure protruding from the exposed buffer layer on the opening pattern corresponding to the opening;
In the step of forming the at least one light emitting structure, the light emitting structure includes a three or more inclined surface, the cross-sectional area along the protruding direction of the light emitting structure is reduced shape. 11. The method of claim 10,
The light emitting structure,
A first semiconductor layer protruding from the exposed buffer layer including three or more inclined surfaces;
An active layer formed on the first semiconductor layer; And
Method of manufacturing a light emitting device comprising a second semiconductor layer formed on the active layer. The method of claim 11,
In the forming of the plurality of light emitting structures,
The active layer is formed on the opening pattern to cover the first semiconductor layer, and the second semiconductor layer is formed on the opening pattern to cover the active layer,
At least a portion of each of the first semiconductor layer, the active layer, and the second semiconductor layer is in contact with the opening pattern. The method of claim 11,
In the forming of the plurality of light emitting structures,
The thickness of the active layer is a method of manufacturing a light emitting device gradually increases from the edge of the active layer toward the center. The method of claim 11,
The substrate is a first electrode electrically connected to the first semiconductor layer through the opening,
After forming the plurality of light emitting structures,
Forming an ohmic layer on the opening pattern, the ohmic layer covering the light emitting structure, using a transparent conductive material; And
And forming a second electrode in contact with at least a portion of the ohmic layer, the second electrode being electrically connected to the second semiconductor layer. The method of claim 11,
Before forming the mask material, further comprising forming a third semiconductor layer on the buffer layer,
After forming the plurality of light emitting structures,
Forming an ohmic layer on the opening pattern, the ohmic layer covering the light emitting structure, using a transparent conductive material;
Removing a portion of the ohmic layer to form a first electrode on the portion of the third semiconductor layer that is exposed; And
And forming a second electrode in contact with at least a portion of the ohmic layer, the second electrode being electrically connected to the second semiconductor layer. The method of claim 11,
The light emitting structure is a method of manufacturing a light emitting device in the shape of a horn or horn. In the light emitting array,
A plurality of light emitting structures including a first semiconductor layer, a second semiconductor layer having a different conductivity type than the first semiconductor layer, and an active layer interposed between the first semiconductor layer and the second semiconductor layer,
A third semiconductor layer;
An opening pattern formed on one surface of the third semiconductor layer, the opening pattern including a plurality of openings which are horizontally spaced apart from each other and expose the third semiconductor layer;
Barrier ribs formed on the other surface of the third semiconductor layer corresponding to the opening pattern; And
Further comprising a fluorescent layer formed on the other surface of the third semiconductor layer corresponding to the plurality of light emitting structure,
The light emitting structure is formed to protrude from the exposed third semiconductor layer corresponding to the opening on the opening pattern, and includes three or more inclined surfaces, and has a shape in which a cross-sectional area decreases along a direction in which the light emitting structure is exposed. . The method of claim 17,
The light emitting structure,
A first semiconductor layer protruding from the exposed third semiconductor layer, including three or more inclined surfaces;
An active layer formed on the first semiconductor layer; And
A light emitting array comprising a second semiconductor layer formed on the active layer. The method of claim 18,
The first semiconductor layer is formed in contact with the opening pattern to cover at least a portion of the opening pattern,
And the active layer and the second semiconductor layer are formed on and in contact with the opening pattern to cover at least a portion of the opening pattern. 19. The method of claim 18,
And a thickness of the active layer gradually increases from the edge of the active layer toward the center. The method of claim 18,
The fluorescent layer,
And at least red, green, and blue light in response to light emitted from the light emitting structure, the light emitting array being formed of two or more fluorescent materials separated from each other by the partition wall. The method of claim 18,
An ohmic layer formed on the opening pattern to cover the light emitting structure;
A reflective layer formed on the ohmic layer;
A diffusion barrier layer formed on the reflective layer;
A support layer formed on the diffusion barrier layer and having a flat surface;
A circuit layer attached to the support layer;
An insulating hole formed through the opening pattern, the light emitting structure, the ohmic layer, the reflective layer, and the support layer between the plurality of light emitting structures; And
And a first electrode formed of a conductive material penetrating the insulating hole and electrically connecting the third semiconductor layer and the circuit layer.
And the ohmic layer, the reflective layer, and the support layer are selected of a conductive material and provided as a second electrode electrically connecting the second semiconductor layer and the circuit layer. 23. The method of claim 22,
And a distributed bragg reflector formed between the second semiconductor layer and the ohmic layer. In the light emitting array,
An opening pattern including a plurality of openings;
A plurality of light emitting structures which extend from the opening and protrude on the opening pattern;
An insulating hole and a first insulating layer formed in a portion of the light emitting structure;
A first electrode formed on the first insulating layer;
A second electrode formed on another partial region on the light emitting structure;
A first bump formed on the first electrode;
A second bump formed on the second electrode;
Reflective layers formed on the first and second bumps;
A second insulating layer formed in a region between the first bump and the second bump;
A circuit layer attached on the reflective layer;
Barrier ribs formed on the other surface of the opening pattern; And
Including a fluorescent layer formed on the other surface of the plurality of light emitting structure,
The light emitting structure is a light emitting array having a shape having a cross-sectional area gradually decreasing along three or more inclined surfaces oblique to the opening pattern and the protrusion direction. 25. The method of claim 24,
The light emitting structure,
A first semiconductor layer protruding from the opening including three or more inclined surfaces;
An active layer formed on the first semiconductor layer; And
A light emitting array comprising a second semiconductor layer formed on the active layer. The method of claim 25,
The first semiconductor layer is formed in contact with the opening pattern to cover at least a portion of the opening pattern,
And the active layer and the second semiconductor layer are formed on and in contact with the opening pattern to cover at least a portion of the opening pattern. 26. The method of claim 25,
And a thickness of the active layer gradually increases from the edge of the active layer toward the center. The method of claim 25,
The fluorescent layer,
And at least red, green, and blue light in response to light emitted from the light emitting structure, the light emitting array being formed of two or more fluorescent materials separated from each other by the partition wall. The method of claim 25,
And a distributed bragg reflector formed on the second semiconductor layer. In the method of manufacturing a light emitting array,
Forming a buffer layer on the growth substrate;
Forming a mask material layer on the buffer layer;
Patterning the mask material layer to form an opening pattern including a plurality of openings horizontally spaced apart from each other and exposing the buffer layer;
Forming a plurality of light emitting structures protruding from the buffer layer exposed through the openings and protruding from the opening patterns;
Attaching a circuit layer on the plurality of light emitting structures; And
Removing the growth substrate;
The light emitting structure is a method of manufacturing a light emitting array having a shape having a cross-sectional area gradually decreasing along three or more inclined surfaces and the protrusion direction oblique to the opening pattern. 31. The method of claim 30,
The light emitting structure,
A first semiconductor layer protruding from the opening including three or more inclined surfaces;
An active layer formed on the first semiconductor layer; And
A method of manufacturing a light emitting array comprising a second semiconductor layer formed on the active layer. The method of claim 31, wherein
The first semiconductor layer is formed in contact with the opening pattern to cover at least a portion of the opening pattern,
And the active layer and the second semiconductor layer are formed on and in contact with the opening pattern to cover at least a portion of the opening pattern. The method of claim 32,
And a thickness of the active layer gradually increases from the edge of the active layer toward the center. 33. The method of claim 32,
After forming the light emitting structure,
And forming a distributed bragg reflector on the second semiconductor layer.

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