KR20130042242A - Liquid crystal display - Google Patents
Liquid crystal display Download PDFInfo
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- KR20130042242A KR20130042242A KR1020110106424A KR20110106424A KR20130042242A KR 20130042242 A KR20130042242 A KR 20130042242A KR 1020110106424 A KR1020110106424 A KR 1020110106424A KR 20110106424 A KR20110106424 A KR 20110106424A KR 20130042242 A KR20130042242 A KR 20130042242A
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/13439—Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136204—Arrangements to prevent high voltage or static electricity failures
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/025—Reduction of instantaneous peaks of current
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Liquid Crystal (AREA)
Abstract
A liquid crystal display according to an exemplary embodiment of the present invention includes a first substrate including a display area and a peripheral area surrounding the display area, two reference voltage bars respectively positioned at both peripheral areas of the display area, and a first substrate. A plurality of gate lines positioned thereon; a plurality of reference voltage lines positioned on the first substrate and connected to two reference voltage bars; a plurality of data lines positioned on the first substrate and intersecting the gate lines; a plurality of gate lines and a plurality of data A plurality of pixels connected to the line, and an auxiliary voltage line electrically connected to the reference voltage line, wherein each pixel includes a first thin film transistor and a second thin film transistor, a gate line, and a first line connected to the gate line and the data line. 2 third thin film transistor connected to the thin film transistor and the reference voltage line, a first thin film transistor connected to the first thin film transistor Claim that is connected to the pixel electrode and the second thin film transistor includes a pixel electrode having a second sub-pixel electrode.
Description
The present invention relates to a liquid crystal display device.
The liquid crystal display device is one of the most widely used flat panel display devices and is composed of two display panels having an electric field generating electrode such as a pixel electrode and a common electrode and a liquid crystal layer interposed therebetween.
An electric field is generated by applying a voltage to the field generating electrode, thereby determining an orientation of the liquid crystal molecules of the liquid crystal layer and controlling the polarization of incident light to display an image.
The liquid crystal display device further includes a switching element connected to each pixel electrode, and a plurality of signal lines such as a gate line and a data line for controlling the switching element to apply a voltage to the pixel electrode.
Among such liquid crystal displays, a vertically aligned liquid crystal display in which the long axis of the liquid crystal molecules is arranged perpendicular to the display panel without an electric field applied to the liquid crystal display device has a high contrast ratio and a wide reference viewing angle. .
However, in the vertical alignment liquid crystal display, side visibility may be inferior to that of the front visibility. In order to solve this problem, the transmittance may be changed by dividing one pixel into two subpixels and differently controlling the voltages of the two subpixels. The method was presented.
Meanwhile, when the voltages of the two subpixels are adjusted differently, the reference voltage may change in the liquid crystal display.
The problem to be solved by the present invention is to prevent the occurrence of variations in the reference voltage in the liquid crystal display device.
A liquid crystal display according to an exemplary embodiment of the present invention includes a first substrate including a display area and a peripheral area surrounding the display area, two reference voltage bars respectively positioned at both peripheral areas of the display area, and a first substrate. A plurality of gate lines positioned thereon; a plurality of reference voltage lines positioned on the first substrate and connected to two reference voltage bars; a plurality of data lines positioned on the first substrate and intersecting the respective gate lines; A plurality of pixels connected to the data line, and an auxiliary voltage line electrically connected to the reference voltage line, wherein each pixel includes a first thin film transistor, a second thin film transistor, a gate line, A third thin film transistor connected to the second thin film transistor and the reference voltage line, and connected to the first thin film transistor And a pixel electrode having a first subpixel electrode and a second subpixel electrode connected to the second thin film transistor.
The plurality of auxiliary voltage lines may be connected to each reference voltage line through the third thin film transistor in each pixel.
Each auxiliary voltage line may be positioned on each data line.
The display device may further include a signal line positioned in the peripheral area and applying a reference voltage to the reference voltage bar, and the width of the reference voltage bar may increase from the side connected to the signal line to the side facing the side connected to the signal line.
A second reference voltage equal to or greater than a magnitude of the first reference voltage and the first reference voltage may be applied to the reference voltage bar.
There are a plurality of auxiliary voltage lines, and each of the auxiliary voltage lines may be positioned only at 1/4, 1/2 and 3/4 of the interval between the two reference voltage bars.
The auxiliary voltage line may be located only at one half of the interval between two reference voltage bars.
The magnitude of the voltage applied to the auxiliary voltage line may be greater than or equal to the magnitude of the voltage applied to the reference voltage line.
The reference voltage line may include a protrusion overlapping one terminal of the third thin film transistor, and the auxiliary voltage line may include a connection member extending toward the protrusion of the reference voltage line.
The connection member may be connected to one terminal of the third thin film transistor.
The output terminal of the second thin film transistor may be connected to the input terminal of the second subpixel electrode and the third thin film transistor.
The voltage applied to the second subpixel electrode may be lower than the voltage applied to the first subpixel electrode.
An area of the second subpixel electrode may be equal to or larger than an area of the first subpixel electrode.
The first subpixel electrode and the second subpixel electrode may include a cross stem portion including a horizontal stem portion and a vertical stem portion crossing the cross stem portion, and a plurality of minute branches extending from the cross stem portion.
The gate line transfers a gate signal, and a gate signal applied to control terminals of each of the first thin film transistor, the second thin film transistor, and the third thin film transistor may be simultaneously transmitted.
A liquid crystal display according to another exemplary embodiment of the present invention includes a first substrate including a display area and a peripheral area surrounding the display area, two reference voltage bars respectively positioned at both peripheral areas of the display area, and on the first substrate. A gate line positioned thereon, a reference voltage line positioned on the first substrate and connected to two reference voltage bars, a first thin film transistor positioned on the first substrate and intersecting the gate line, and connected to the gate line and the data line; A third thin film transistor connected to a second thin film transistor, a gate line, a second thin film transistor, and a reference voltage line, a first subpixel electrode connected to a first thin film transistor, and a second subpixel electrode connected to a second thin film transistor. And a signal line positioned in the peripheral area and applying a reference voltage to the reference voltage bar. The width of the quasi-voltage bar becomes wider from the side connected to the signal line to the side facing the side connected to the signal line.
A liquid crystal display according to another exemplary embodiment of the present invention includes a first substrate including a display area and a peripheral area surrounding the display area, two reference voltage bars respectively positioned at both peripheral areas of the display area, and a first substrate. A gate line positioned above, a reference voltage line positioned on the first substrate and connected to two reference voltage bars, a first thin film transistor positioned on the first substrate and connected to the gate line and the data line crossing the gate line; A third thin film transistor connected to a second thin film transistor, a gate line, a second thin film transistor and a reference voltage line, and a first subpixel electrode connected to the first thin film transistor and a second part connected to the second thin film transistor. A pixel electrode having a pixel electrode, and a first reference voltage and a second reference voltage are applied to the reference voltage bar.
The magnitude of the second reference voltage may be equal to or greater than the magnitude of the first reference voltage.
The display device may further include a first signal line applying the first reference voltage to the reference voltage bar and a second signal line applying the second reference voltage to the reference voltage bar.
The reference voltage bar may include a pair of sides facing each other, and the sides of the reference voltage bar connected to the first signal line and the sides of the reference voltage bar connected to the second signal line may face each other.
As described above, according to an exemplary embodiment of the present invention, three auxiliary voltage lines or one auxiliary voltage line to which an auxiliary voltage greater than or equal to the reference voltage applied to the reference voltage bar is formed to form a variation in the reference voltage in the liquid crystal display. Can be prevented.
In addition, an auxiliary voltage line connected to the reference voltage line may be formed on each data line to prevent variations in the reference voltage in the liquid crystal display.
In addition, the width of the reference voltage bar may be gradually widened from the side connected to the first signal line to the side facing the side of the reference voltage bar, thereby preventing variation in the reference voltage in the liquid crystal display.
In addition, two reference voltages having the same or different magnitudes may be applied to different sides of the reference voltage bar to prevent variations in the reference voltage in the liquid crystal display.
1 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.
2 is a diagram schematically illustrating a liquid crystal display according to an exemplary embodiment of the present invention.
FIG. 3 is a layout view of one pixel of the liquid crystal display of FIG. 2.
4 is a cross-sectional view taken along the line IV-IV of FIG. 3.
5 is a cross-sectional view taken along the cutting line VV of FIG. 3.
FIG. 6 is a view schematically illustrating a liquid crystal display according to another exemplary embodiment of the present invention.
FIG. 7 is a layout view of one pixel of the liquid crystal display of FIG. 6.
8 is a view schematically illustrating a liquid crystal display according to another exemplary embodiment of the present invention.
FIG. 9 is a layout view of one pixel of the liquid crystal display of FIG. 8.
FIG. 10 is a cross-sectional view taken along the cutting line XX of FIG. 9.
FIG. 11 is a view schematically illustrating a liquid crystal display according to another exemplary embodiment of the present invention.
12 is a schematic view of a liquid crystal display according to another exemplary embodiment of the present invention.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. However, the present invention is not limited to the embodiments described herein but may be embodied in other forms. Rather, the embodiments disclosed herein are provided so that the disclosure can be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.
In the drawings, the thicknesses of layers and regions are exaggerated for clarity. Also, when a layer is referred to as being "on" another layer or substrate, it may be formed directly on another layer or substrate, or a third layer may be interposed therebetween. Like numbers refer to like elements throughout the specification.
Referring to FIG. 1, a liquid crystal display according to an exemplary embodiment of the present invention will be briefly described.
1 is an equivalent circuit diagram of one pixel of a liquid crystal display according to an exemplary embodiment of the present invention.
Referring to FIG. 1, a liquid crystal display according to an exemplary embodiment includes a signal line including a gate line GL for transmitting a gate signal and a data line DL for transmitting a data signal, and a pixel PX connected thereto. Include.
The pixel PX includes first, second and third switching elements Qa, Qb, and Qc, first and second liquid crystal capacitors Clc_H and Clc_L, and a reduced pressure capacitor Cstd. The first, second and third switching elements Qa, Qb, and Qc may be three-terminal elements such as thin film transistors, respectively.
The first switching element Qa and the second switching element Qb are connected to the gate line GL and the data line DL, respectively, and the third switching element Qc is the gate line GL and the second switching. It is connected to the output terminal of element Qb.
The first switching element Qa and the second switching element Qb are three-terminal elements such as thin film transistors, and a control terminal thereof is connected to the gate line GL, and an input terminal is connected to the data line DL. The output terminal of the first switching element Qa is connected to the first liquid crystal capacitor Clc_H, and the output terminal of the second switching element Qb is the second liquid crystal capacitor Clc_L and the third switching element Qc. ) Is connected to the input terminal of).
The third switching element Qc is also a three-terminal element such as a thin film transistor. The control terminal is connected to the gate line GL, the input terminal is connected to the second liquid crystal capacitor Clc_L, and the output terminal is a reference voltage. (Vcst) is authorized.
When a gate on signal Von is applied to the gate line GL, the first switching device Qa, the second switching device Qb, and the third switching device Qc connected thereto are turned on. Accordingly, the data voltage applied to the data line DL is first and second subpixel electrodes PEa and PEb through the turned-on first switching element Qa and the second switching element Qb, respectively. Is applied. In this case, the data voltages applied to the first subpixel electrode PEa and the second subpixel electrode PEb may be charged to the same value. However, according to the exemplary embodiment of the present invention, the voltage applied to the second subpixel electrode PEb is divided by the third switching element Qc connected in series with the second switching element Qb. Since the voltage applied to the second subpixel electrode PEb is turned on, the voltage difference between the sustain voltage Vcst and the input data voltage and the third switching element Qc have the third voltage. The voltage is divided according to the resistance value. Therefore, the voltage applied to the second subpixel electrode PEb is smaller than the voltage applied to the first subpixel electrode PEa. In this case, the voltage applied to the first subpixel electrode PEa and the second subpixel electrode PEb is the positive electrode (+), and on the contrary, the first subpixel electrode PEa and the second subpixel electrode. When the voltage applied to PEb is the negative electrode (−), the voltage applied to the first subpixel electrode PEa is smaller than the voltage applied to the second subpixel electrode PEb.
As a result, the voltage charged in the first liquid crystal capacitor Clc_H and the voltage charged in the second liquid crystal capacitor Clc_L are different from each other. Since the voltage charged in the first liquid crystal capacitor Clc_H and the voltage charged in the second liquid crystal capacitor Clc_L are different from each other, the angles at which the liquid crystal molecules are inclined in the first subpixel and the second subpixel are different. The brightness of the subpixels is different. Accordingly, by properly adjusting the voltage charged in the first liquid crystal capacitor Clc_H and the voltage charged in the second liquid crystal capacitor Clc_L, the image viewed from the side may be as close as possible to the image viewed from the front. Side visibility can be improved.
Next, the structure of the liquid crystal display according to the exemplary embodiment of the present invention will be described with reference to FIGS. 2 to 5. FIG. 2 is a view schematically illustrating a liquid crystal display according to an exemplary embodiment of the present invention, and FIG. 3 is a layout view of one pixel of the liquid crystal display of FIG. 2. 4 is a cross-sectional view taken along the line IV-IV of FIG. 3, and FIG. 5 is a cross-sectional view taken along the line V-V of FIG. 3.
2, the liquid crystal display according to the present exemplary embodiment includes a
The
The
In addition, the
The portion where the
Here, the
A printed
The
An
As described above, since the reference voltage is dispersed in the liquid crystal display by the
Referring to FIGS. 3 to 5, the liquid crystal display shown in FIG. 2 will be described in more detail.
In the liquid crystal display according to the present exemplary embodiment, the
First, the
The
The
A plurality of
The plurality of
The
Similarly, the
The
The
The pixel electrode 191 including the
The
One of the
Each
Although not shown, the width of the
The
The area of the
The
The
A
A plurality of
At least one of the
An
A
Alignment layers (not shown) are formed on both surfaces of the
Polarizers (not shown) are provided on the outer surfaces of the
The
The first and
In one embodiment of the present invention, since the length directions in which the
Hereinafter, a liquid crystal display according to another exemplary embodiment of the present invention will be described with reference to FIGS. 6 and 7.
FIG. 6 is a schematic view of a liquid crystal display according to another exemplary embodiment. FIG. 7 is a layout view of one pixel of the liquid crystal display of FIG. 6.
6 and 7, the liquid crystal display according to the present exemplary embodiment is similar to the structure of the liquid crystal display according to the exemplary embodiment illustrated in FIGS. 2 to 5. Description of similar parts is omitted.
In the liquid crystal display according to the present exemplary embodiment, unlike the liquid crystal display according to the exemplary embodiment illustrated in FIGS. 2 to 5, the
Each
As such, three
On the other hand, when the variation of the reference voltage is not large in the liquid crystal display, the auxiliary voltage may not be applied.
In the present embodiment, the
Hereinafter, a liquid crystal display according to still another exemplary embodiment of the present invention will be described with reference to FIGS. 8 to 10.
FIG. 8 is a schematic view of a liquid crystal display according to another exemplary embodiment of the present invention. FIG. 9 is a layout view of one pixel of the liquid crystal display of FIG. 8, and FIG. 10 is a cutaway line XX of FIG. 9. It is a cross-sectional view.
8 to 10, the liquid crystal display according to the present exemplary embodiment is similar to the structure of the liquid crystal display according to the exemplary embodiment illustrated in FIGS. 2 to 5. Description of similar parts is omitted.
In the liquid crystal display according to the present exemplary embodiment, unlike the liquid crystal display according to the exemplary embodiment illustrated in FIGS. 2 to 5, the
The
The width a of the side of the
In the side connected to the
Hereinafter, a liquid crystal display according to still another exemplary embodiment of the present invention will be described with reference to FIG. 11.
FIG. 11 is a view schematically illustrating a liquid crystal display according to another exemplary embodiment of the present invention.
Referring to FIG. 11, the liquid crystal display according to the present exemplary embodiment is similar to the structure of the liquid crystal display according to the exemplary embodiment illustrated in FIGS. 2 to 5. Thus, description of similar parts will be omitted.
In the liquid crystal display according to the present exemplary embodiment, unlike the liquid crystal display according to the exemplary embodiment illustrated in FIGS. 2 to 5, the
The first
The side of the
The magnitude of the first reference voltage is greater than 1V, less than 20V, and the magnitude of the second reference voltage is greater than the magnitude of the first reference voltage and less than 5V added to the first reference voltage. Preferably, the magnitude of the first reference voltage is greater than 7V, less than 15V, the magnitude of the second reference voltage is greater than the magnitude of the first reference voltage, and less than the value of 2V added to the first reference voltage.
In addition, the magnitude of the first reference voltage may be equal to the magnitude of the second reference voltage.
As such, by applying the second reference voltage equal to or greater than the first reference voltage and the first reference voltage to the other side of the
Meanwhile, the above-described embodiments can be combined, which will be described with reference to FIG. 12.
12 is a schematic view of a liquid crystal display according to another exemplary embodiment of the present invention.
Referring to FIG. 12, the liquid crystal display according to the present exemplary embodiment is a combination of the structures of the liquid crystal display of FIGS. 2, 8, and 11.
Since the
The
The second reference voltage equal to or greater than the magnitude of the first reference voltage and the first reference voltage is applied to the
The side of the
As described above, it is possible to prevent variations in the reference voltage in the liquid crystal display by combining the configurations of the liquid crystal display according to FIGS. 2, 8, and 11.
In the present embodiment, the liquid crystal display device in which the configuration of the liquid crystal display device of FIGS. 2, 8 and 11 is combined has been described, but the configuration of the liquid crystal display device according to another embodiment may be combined.
Accordingly, there is only a liquid crystal display device combining the configuration of the liquid crystal display device according to FIGS. 2 and 6 with reference to Tables 1 and 2 and a reference voltage line connecting the reference voltage bar and the reference voltage bar to a conventional structure, that is, a rectangular shape. The liquid crystal display device to which one reference voltage is applied to the voltage bar will be described.
Table 1 shows the data on the transmittance distribution of the structure of the conventional structure and the structure of the liquid crystal display according to FIGS. 2 and 6.
Standard deviation of transmittance of 9 points was applied to the panels according to
In the case of combining the configuration of the liquid crystal display device according to FIGS. 2 and 6, the average dispersion of the transmittances of the samples is 0.07%, and in the conventional structure, the average dispersion of the transmittances of the samples is 0.19%, according to FIGS. 2 and 6. It can be seen that the combination of the configuration of the liquid crystal display device is higher in transmission than in the conventional structure.
Table 2 shows data on the amount of drop in the reference voltage of the conventional structure and the structure of the liquid crystal display according to FIGS. 2 and 6. The drop amount of the reference voltage was measured by dividing it into the horizontal direction and the vertical direction. The horizontal direction measured the upper left and middle upper parts of each panel, and the vertical direction measured the upper left and lower left parts of each panel.
In the case of combining the configuration of the liquid crystal display device according to FIGS. 2 and 6, the reference voltage drop in the horizontal direction of the panel and the vertical direction of the panel was 0.6 V. In the conventional structure, the reference voltage in the horizontal direction of the panel The drop was 3V and the panel's longitudinal reference drop was 0.8V.
That is, it can be seen that the combination of the configurations of the liquid crystal display of FIGS. 2 and 6 has a smaller reference voltage drop than the conventional structure.
Combination configuration of liquid crystal display
Although the preferred embodiments of the present invention have been described in detail above, the scope of the present invention is not limited thereto, and various modifications and improvements of those skilled in the art using the basic concepts of the present invention defined in the following claims are also provided. It belongs to the scope of rights.
121: gate line 131: reference voltage line
135: reference voltage bar 137: auxiliary voltage line
171: data line 191: pixel electrode
Claims (36)
Two reference voltage bars respectively positioned in the peripheral regions of both sides of the display region;
A plurality of gate lines positioned on the first substrate,
A plurality of reference voltage lines positioned on the first substrate and connected to the two reference voltage bars;
A plurality of data lines positioned on the first substrate and crossing each of the gate lines;
A plurality of pixels connected to the plurality of gate lines and the plurality of data lines, and
An auxiliary voltage line electrically connected to the reference voltage line;
Each pixel is
A first thin film transistor and a second thin film transistor connected to the gate line and the data line,
A third thin film transistor connected to the gate line, the second thin film transistor, and the reference voltage line, and
And a pixel electrode having a first subpixel electrode connected to the first thin film transistor and a second subpixel electrode connected to the second thin film transistor.
And a plurality of auxiliary voltage lines, and connected to each of the reference voltage lines through the third thin film transistor in each pixel.
And each of the auxiliary voltage lines is positioned above each of the data lines.
A signal line positioned in the peripheral region and configured to apply a reference voltage to the reference voltage bar;
And a width of the reference voltage bar increases from a side connected to the signal line to a side facing the side connected to the signal line.
And a second reference voltage equal to or greater than a magnitude of a first reference voltage and the first reference voltage.
And a second reference voltage equal to or greater than a magnitude of a first reference voltage and the first reference voltage.
And a plurality of auxiliary voltage lines, each of which is located only at one quarter, one half, and three quarters of the interval between the two reference voltage bars.
And the auxiliary voltage line is positioned only at one half of a distance between the two reference voltage bars.
The auxiliary voltage line is positioned on the data line.
And a voltage equal to or greater than a voltage applied to the auxiliary voltage line.
A signal line positioned in the peripheral region and configured to apply a reference voltage to the reference voltage bar;
And a width of the reference voltage bar increases from a side connected to the signal line to a side facing the side connected to the signal line.
And a second reference voltage equal to or greater than a magnitude of a first reference voltage and the first reference voltage.
And a second reference voltage equal to or greater than a magnitude of a first reference voltage and the first reference voltage.
The reference voltage line includes a protrusion overlapping with one terminal of the third thin film transistor,
The auxiliary voltage line includes a connection member extending toward the protrusion of the reference voltage line.
And the connection member is connected to one terminal of the third thin film transistor.
The auxiliary voltage line is on the same layer as the first subpixel electrode and the second subpixel electrode.
And an output terminal of the second thin film transistor is connected to an input terminal of the second subpixel electrode and the third thin film transistor.
The voltage applied to the second subpixel electrode is lower than the voltage applied to the first subpixel electrode.
The area of the second subpixel electrode is equal to or larger than the area of the first subpixel electrode.
The first subpixel electrode and the second subpixel electrode may have a cross stem portion formed of a horizontal stem portion and a vertical stem portion crossing the same.
And a plurality of minute branches extending from the cross stem.
The gate line transfers a gate signal, and a gate signal applied to a control terminal of each of the first thin film transistor, the second thin film transistor, and the third thin film transistor is simultaneously transmitted.
Two reference voltage bars respectively positioned in the peripheral regions of both sides of the display region;
A gate line positioned on the first substrate,
A reference voltage line positioned on the first substrate and connected to the two reference voltage bars;
A data line positioned on the first substrate and crossing the gate line;
A first thin film transistor and a second thin film transistor connected to the gate line and the data line,
A third thin film transistor connected to the gate line, the second thin film transistor, and the reference voltage line,
A pixel electrode having a first subpixel electrode connected to the first thin film transistor and a second subpixel electrode connected to the second thin film transistor, and
A signal line positioned in the peripheral region and configured to apply a reference voltage to the reference voltage bar;
And a width of the reference voltage bar increases from a side connected to the signal line to a side facing the side connected to the signal line.
And an output terminal of the second thin film transistor is connected to an input terminal of the second subpixel electrode and the third thin film transistor.
The voltage applied to the second subpixel electrode is lower than the voltage applied to the first subpixel electrode.
The area of the second subpixel electrode is equal to or larger than the area of the first subpixel electrode.
The first subpixel electrode and the second subpixel electrode may have a cross stem portion formed of a horizontal stem portion and a vertical stem portion crossing the same.
And a plurality of minute branches extending from the cross stem.
The gate line transfers a gate signal, and a gate signal applied to a control terminal of each of the first thin film transistor, the second thin film transistor, and the third thin film transistor is simultaneously transmitted.
Two reference voltage bars respectively positioned in the peripheral regions of both sides of the display region;
A gate line positioned on the first substrate,
A reference voltage line positioned on the first substrate and connected to the two reference voltage bars;
A data line positioned on the first substrate and crossing the gate line;
A first thin film transistor and a second thin film transistor connected to the gate line and the data line,
A third thin film transistor connected to the gate line, the second thin film transistor, and the reference voltage line, and
A pixel electrode having a first subpixel electrode connected to the first thin film transistor and a second subpixel electrode connected to the second thin film transistor;
And a first reference voltage and a second reference voltage are applied to the reference voltage bar.
The second reference voltage has a magnitude equal to or greater than that of the first reference voltage.
A first signal line applying the first reference voltage to the reference voltage bar;
And a second signal line for applying the second reference voltage to the reference voltage bar.
The reference voltage bar includes a pair of sides facing each other,
And a side of the reference voltage bar connected to the first signal line and a side of the reference voltage bar connected to the second signal line face each other.
And an output terminal of the second thin film transistor is connected to an input terminal of the second subpixel electrode and the third thin film transistor.
The voltage applied to the second subpixel electrode is lower than the voltage applied to the first subpixel electrode.
The area of the second subpixel electrode is equal to or larger than the area of the first subpixel electrode.
The first subpixel electrode and the second subpixel electrode may have a cross stem portion formed of a horizontal stem portion and a vertical stem portion crossing the same.
And a plurality of minute branches extending from the cross stem.
The gate line transfers a gate signal, and a gate signal applied to a control terminal of each of the first thin film transistor, the second thin film transistor, and the third thin film transistor is simultaneously transmitted.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020110106424A KR20130042242A (en) | 2011-10-18 | 2011-10-18 | Liquid crystal display |
US13/517,872 US8952878B2 (en) | 2011-10-14 | 2012-06-14 | Display device |
US14/591,833 US9261749B2 (en) | 2011-10-14 | 2015-01-07 | Display device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020110106424A KR20130042242A (en) | 2011-10-18 | 2011-10-18 | Liquid crystal display |
Publications (1)
Publication Number | Publication Date |
---|---|
KR20130042242A true KR20130042242A (en) | 2013-04-26 |
Family
ID=48440995
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020110106424A KR20130042242A (en) | 2011-10-14 | 2011-10-18 | Liquid crystal display |
Country Status (1)
Country | Link |
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KR (1) | KR20130042242A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9753345B2 (en) | 2012-08-22 | 2017-09-05 | Samsung Display Co., Ltd. | Mother substrate for display device, method for manufacturing the same, and method for manufacturing display device |
KR20170114034A (en) * | 2016-03-31 | 2017-10-13 | 삼성디스플레이 주식회사 | Display devcie |
US9817272B2 (en) | 2015-05-20 | 2017-11-14 | Samsung Display Co., Ltd. | Liquid crystal display device |
US10074324B2 (en) | 2015-07-20 | 2018-09-11 | Samsung Display Co., Ltd. | Liquid crystal display panel and liquid crystal display device |
-
2011
- 2011-10-18 KR KR1020110106424A patent/KR20130042242A/en not_active Application Discontinuation
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9753345B2 (en) | 2012-08-22 | 2017-09-05 | Samsung Display Co., Ltd. | Mother substrate for display device, method for manufacturing the same, and method for manufacturing display device |
US9817272B2 (en) | 2015-05-20 | 2017-11-14 | Samsung Display Co., Ltd. | Liquid crystal display device |
US10074324B2 (en) | 2015-07-20 | 2018-09-11 | Samsung Display Co., Ltd. | Liquid crystal display panel and liquid crystal display device |
KR20170114034A (en) * | 2016-03-31 | 2017-10-13 | 삼성디스플레이 주식회사 | Display devcie |
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