KR20130039600A - Semiconductor manufacturing apparatus - Google Patents

Semiconductor manufacturing apparatus Download PDF

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Publication number
KR20130039600A
KR20130039600A KR1020110104271A KR20110104271A KR20130039600A KR 20130039600 A KR20130039600 A KR 20130039600A KR 1020110104271 A KR1020110104271 A KR 1020110104271A KR 20110104271 A KR20110104271 A KR 20110104271A KR 20130039600 A KR20130039600 A KR 20130039600A
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KR
South Korea
Prior art keywords
wafer
pocket
wafer carrier
pockets
center
Prior art date
Application number
KR1020110104271A
Other languages
Korean (ko)
Inventor
강고운
정종필
장석원
Original Assignee
엘지이노텍 주식회사
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Application filed by 엘지이노텍 주식회사 filed Critical 엘지이노텍 주식회사
Priority to KR1020110104271A priority Critical patent/KR20130039600A/en
Publication of KR20130039600A publication Critical patent/KR20130039600A/en

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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
    • C23C16/4582—Rigid and flat substrates, e.g. plates or discs
    • C23C16/4583—Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially horizontally
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68735—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by edge profile or support profile

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical Vapour Deposition (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

PURPOSE: An apparatus for manufacturing a semiconductor is provided to improve wavelength uniformity in a wafer according to temperature distribution. CONSTITUTION: A wafer carrier(130) is installed in a reaction chamber. A pocket(135) having an opened upper part is formed in the upper side of the wafer carrier . The bottom of the pocket is concaved. The center of the pockets is separated from the center of the wafer carrier with 300mm. A wafer(101) is loaded in the pocket. A heater(145) is arranged under the wafer carrier.

Description

Semiconductor Manufacturing Equipment {SEMICONDUCTOR MANUFACTURING APPARATUS}

An embodiment relates to a semiconductor manufacturing apparatus.

In general, chemical vapor deposition (CVD), which uses a chemical method, in forming a thin film on a wafer, uses a chemical reaction of a source material to form a semiconductor thin film, an insulating film, or the like on the surface of the substrate. do. This chemical vapor deposition method is currently used to deposit various thin films, such as a silicon film, an oxide film, a silicon nitride film, or a silicon oxynitride film, a tungsten film, or the like on a substrate. As a substrate loading apparatus used for these chemical vapor depositions, a vacuum wafer carrier is widely used.

The embodiment provides a semiconductor manufacturing apparatus having a pocket bottom structure of a new structure.

The embodiment provides a semiconductor manufacturing apparatus having a convex surface of a pocket bottom of a wafer carrier.

Semiconductor manufacturing apparatus according to the embodiment, the reaction chamber; A wafer carrier having a plurality of pockets in the reaction chamber; And a heater disposed below the wafer carrier and a heater plate supporting the heater, wherein the centers of the plurality of pockets are spaced 300 mm from the center of the wafer carrier, and the bottom of each pocket includes a convex spherical surface. do.

The embodiment can improve the wavelength uniformity in the wafer according to the temperature distribution.

1 is a view illustrating a semiconductor manufacturing apparatus according to an embodiment.
2 is a perspective view showing a heater plate.
3 illustrates a wafer carrier according to an embodiment.
4 is a side cross-sectional view illustrating a wafer carrier according to an embodiment.
5 is a side cross-sectional view illustrating the pocket structure of FIG. 4.
6 is a view for calculating the bottom depth of the pocket of FIG.
7 is a view showing a wafer carrier of a comparative example.
8 is a graph illustrating curvature of semiconductor layers grown on a wafer according to an embodiment.
9 is a graph illustrating curvature of semiconductor layers grown on wafers according to a comparative example.
10 and 11 are diagrams showing, as a comparative example, wavelength distribution and heat distribution on a wafer.
12 and 13 are diagrams showing wavelength distribution and heat distribution on a wafer as another comparative example.

Hereinafter, exemplary embodiments will be described with reference to the accompanying drawings.

1 is a side sectional view showing a semiconductor manufacturing apparatus according to an embodiment, FIG. 2 is a perspective view showing a heater plate, FIG. 3 is a side sectional view showing a wafer carrier according to an embodiment, and FIG. 4 is of FIG. Side cross-sectional view showing the pocket structure, Figure 5 is a view for calculating the bottom depth of the pocket of FIG.

Referring to FIG. 1, the semiconductor manufacturing apparatus 10 may include a reaction chamber 120, a shower head 122, a rotation shaft 125, a wafer carrier (Wafer carrier or susceptor) 130, a heater plate 140, and a heater ( 145 and electrode member 147.

The wafer carrier 130 is coupled to the reaction chamber 120, and a plurality of pockets 135 having an open upper portion are formed on the upper side of the wafer carrier 130. Here, the pocket 135 is formed in a convex bottom structure. Wafer 101 is loaded in the pocket 135. The showerhead 122 supplies various source materials and the like into the reaction chamber 120, but the supply structure is not limited thereto.

The rotating shaft 125 is axially coupled to the lower portion of the wafer carrier 130 and rotates the wafer carrier 130. The heater plate 140 is disposed under the wafer carrier 130 and supports the heater 145. The heat generated by the heater 145 heats the lower portion of the wafer carrier 130 and increases the internal temperature of the reaction chamber 120.

A base plate 137 is disposed below the heater plate 140, and the base plate 137 supports the electrode member 147 that is vertically coupled. The electrode member 147 may be coupled to the reaction chamber 120 using the O-ring coupling unit 148. The O-ring coupling portion 148 is sealed to prevent gas leakage when coupling with the electrode member 147.

The source material and the like are supplied into the reaction chamber 120 through the shower head 122, the wafer carrier 130 therein rotates by the rotation shaft 125, and the reaction chamber 120 by the heater 145. ) And the wafer carrier 130 are heated. In this case, a semiconductor thin film or an insulating film is formed on the surface of the wafer 101 loaded in the pocket 135 by a chemical reaction of the incoming source materials.

The semiconductor manufacturing apparatus may include equipment such as metal organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), and chemical vapor deposition (CVD). Using such equipment, devices such as a gallium nitride-based semiconductor light emitting device, a high electron mobility transistor (HEMT), a field effect transistor (FET), and a laser diode are grown on the surface of the wafer 101.

The semiconductor layer grown on the wafer includes a nitride semiconductor layer, for example, a buffer layer is formed on a sapphire substrate which is a wafer, an n-AlGaN layer is formed on the buffer layer, and an n-GaN layer is formed on the N-AlGaN layer. The active layer (MQW) may be formed on the n-GaN layer, and the P-GaN layer may be formed on the active layer. Other semiconductor layers may be further formed above and below each layer, and the compound composition of each compound semiconductor layer may be changed, but is not limited thereto.

Referring to FIGS. 1 and 2, the heater 145 is formed in a pipe shape on the heater plate 140, and is arranged in a plurality of rows from the center region to the outer region.

3 and 4, the wafer carrier 130 has six pockets 135 arranged around the same radius. The centers of the pockets 135 and the centers of the wafer carriers 130 may be spaced apart from each other by the same distance D1. The gap D1 may be 304.8 mm ± 5 mm, and the wafer 101 inserted into each pocket 135 is formed to have a diameter of 6 inches. The wafer carrier 130 has a structure of 6 inches in diameter and six pockets 135, and an upper diameter of each pocket may be 6 inches.

Referring to the wafer carrier 130 of the comparative example with reference to FIG. 7, five pockets 135A are arranged to have one circle with respect to the center of the wafer carrier 130. The spacing D2 between the centers of the pockets 135A is 274 mm, and is disposed closer to the center of the wafer carrier 130 than D2.

Comparing FIG. 3 with FIG. 7, by arranging six pockets 135 in the wafer carrier 130, the center of each pocket 135 has a wafer carrier 130 rather than the structure of the comparative example in which five pockets 135A are arranged. Will move outwards from the center. That is, although the structure of the heater 145 disposed under the wafer carrier 130 is the same, each of the pockets 135 and 135A is disposed under the wafer carrier 130 of FIG. 3, and FIG. 7. The heaters 145 disposed under the wafer carrier 130 have different heat distributions. An embodiment is a pocket 135 having an optimal wavelength uniformity in the case of six pockets 135 or a wafer carrier 130 having a structure in which the center of each pocket 135 is 300 mm away from the center of the wafer carrier 130. ).

4 is a side cross-sectional view of the wafer carrier according to the embodiment, and FIG. 4 is an enlarged view of the pocket of FIG. 3.

3, 4, and 5, the heater 145 disposed under the wafer carrier 130 may be a first disposed at a first distance L1 from the central portion C of the wafer carrier 130. The heater row 145-1, the second heater row 145-2 disposed at the second distance L2, and the third heater row 145-3 arranged at the third distance L3 can be divided. The uniform heat is transferred to the lower surface of the wafer carrier 130 by the first to third heater rows 145-1, 145-2, and 145-3. However, the first heater row 145-1 is moved from the area corresponding to the bottom of each pocket 135 by moving the pocket 135 of the embodiment outward than the pocket 135A of the comparative example (FIG. 7). Are placed off. Accordingly, the characteristics of the semiconductor thin film grown on the wafer also change according to the heat distribution delivered to each pocket 135.

In an embodiment, the bottom 135-1 of each pocket 135 has a convex spherical surface. The bottom 135-1 of each pocket 135 is formed with a convex spherical surface with the deepest and lowest center portion of the edge portion.

The mounting portion 135-2 on which the wafers 101 of each of the pockets 135 are mounted is formed in a stepped structure from the upper surface 135-3 of the wafer carrier 130, and the bottom of each of the pockets 135. It is formed in a stepped structure from 135-1. The diameter between the mounting portions 135-2 may be wider than the diameter between the bottoms of the pockets 135.

The interval H1 between the center of the bottom 135-1 of each pocket 135 and the bottom surface of the wafer 101 is formed in a range of 185 μm to 285 μm, and the bottom 135 of each pocket 135 is formed. The gap H2 between the edge portion and the lower surface of the wafer 101 may be formed in a range of 200 μm to 300 μm. Here, the difference between the interval (H2) and (H1) may be formed to 15㎛ ~ 20㎛.

 FIG. 6 may measure the degree of curvature of the wafer when the bottom of the pocket is flat or concave in the wafer carrier having the pocket structure as illustrated in FIG. 3.

Rc is the distance from the laser to the wafer center for measurement, δ is the distance from the flat bottom to the curved wafer, r is the radius of the wafer, and α is the displacement for measuring the curvature of the wafer.

The measurement result of the degree of curvature of the active layer of a wafer is as follows.

The active layer (MQW) of the wafer has a curvature of 0.05 (km −1 ) in the active layer as shown in FIG. 8, and the distance (curvature degree) to the curved wafer with respect to the flat bottom is about 15 μm. This causes the edge portion to bend more than the center portion of the wafer. Accordingly, the embodiment considers the curvature of the active layer grown on the wafer to form the bottom of each pocket in a structure opposite to the curvature of the wafer. That is, the bottom of each pocket may be formed in a curved shape with a deep edge and a low center.

In the structure of the comparative example of FIG. 9, when the bottom of the pocket is concave, the active layer of the wafer has a curvature of -10 km (km -1 ), which causes a problem that the wavelength uniformity of the active layer is lowered.

10 and 11 are comparative examples, in the wafer carrier having six pockets, each pocket has a depth of 300 μm and a concave bottom with a depth of 50 μm. In the wavelength uniformity and wafer heat distribution of the 6-inch wafer manufactured from such a wafer carrier, the heat distribution has a large difference between the center region and the side region, and the wavelength difference between the active layer in the center region and the side region is large. It can be seen.

12 and 13 show, as another comparative example, in a wafer carrier having six pockets, each pocket has a depth of 200 μm and a concave bottom to a depth of 50 μm. In the wavelength uniformity and wafer heat distribution of the 6-inch wafer manufactured from such a wafer carrier, the heat distribution has a large difference between the center region and the side region, and the wavelength difference between the active layer in the center region and the side region is large. It can be seen.

3, 4, and 5, six pockets are disposed in a wafer carrier, and a 6-inch wafer is grown. In this case, the bottom of the pocket has a deepest edge portion and a structure having a lower depth toward the center, thereby uniformly transferring heat due to warpage of the wafer, thereby effectively improving the wavelength uniformity of the wafer.

Although the technical spirit of the present invention has been described in detail according to the above-described preferred embodiment, it should be noted that the above-described embodiments are for the purpose of description and not of limitation. It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit and scope of the invention.

101: wafer 120: reaction chamber
130: wafer carrier 135: pocket
135-1: pocket bottom 140: heater plate
145: heater

Claims (7)

A reaction chamber;
A wafer carrier having a plurality of pockets in the reaction chamber; And
A heater disposed below the wafer carrier and a heater plate supporting the heater,
Centers of the plurality of pockets are spaced 300 mm from the center of the wafer carrier,
The bottom of each pocket comprises a convex spherical surface. The method of claim 1,
The wafer carrier includes six pockets equally spaced from the center of the wafer carrier. The method of claim 1,
And an upper diameter of the pocket of the wafer carrier is 6 inches. The method of claim 1,
And the bottom of the pocket is formed to a lower depth toward the center from the edge portion. The method of claim 1,
The depth difference between the edge part and the center part of the bottom of the said pocket is 15 micrometers-20 micrometers. The method of claim 1,
Each of the pockets includes a stepped mount in which a wafer is disposed between the top surface of the wafer carrier and the bottom of the pocket,
And a distance between the top surface of the top member and the bottom of the pocket is 200 μm to 300 μm. The semiconductor manufacturing apparatus according to claim 6, wherein a nitride semiconductor is grown on the wafer.
KR1020110104271A 2011-10-12 2011-10-12 Semiconductor manufacturing apparatus KR20130039600A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020110104271A KR20130039600A (en) 2011-10-12 2011-10-12 Semiconductor manufacturing apparatus

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Application Number Priority Date Filing Date Title
KR1020110104271A KR20130039600A (en) 2011-10-12 2011-10-12 Semiconductor manufacturing apparatus

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KR20130039600A true KR20130039600A (en) 2013-04-22

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20150093495A (en) * 2014-02-07 2015-08-18 엘지이노텍 주식회사 Apparatus for manufacturing semiconductor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20150093495A (en) * 2014-02-07 2015-08-18 엘지이노텍 주식회사 Apparatus for manufacturing semiconductor

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