KR20130022296A - Solar cell and method of manufacturing the same - Google Patents

Abstract

PURPOSE: A solar cell and a manufacturing method thereof are provided to reduce manufacturing costs by using an electroless plating process and a sputtering process using a mask. CONSTITUTION: A second semiconductor layer(200) is formed on one side of a first semiconductor layer(100). A first transparent conductive layer(300) is formed on the upper side of the second semiconductor layer. A first electrode is electrically connected to the second semiconductor layer. The first electrode includes a first metal layer(410) and a second metal layer formed on the first metal layer. A third semiconductor layer is formed on the other side of the first semiconductor layer. The second electrode is electrically connected to the third semiconductor layer.

Description

Solar cell and method of manufacturing the same {Solar Cell and method of manufacturing the same}

The present invention relates to a solar cell.

Solar cells are devices that convert light energy into electrical energy using the properties of semiconductors.

The solar cell has a PN junction structure in which a P (positive) semiconductor and a N (negative) semiconductor are bonded to each other. When sunlight is incident on the solar cell having such a structure, Holes and electrons are generated in the p-type semiconductor layer. At this time, the holes (+) move toward the p-type semiconductor due to the electric field generated at the PN junction and the electrons (- So that power can be produced.

Such a solar cell generally can be classified into a substrate type solar cell and a thin film type solar cell.

The substrate type solar cell is a solar cell manufactured using a semiconductor material such as silicon as a substrate, and the thin film type solar cell is a solar cell manufactured by forming a semiconductor in the form of a thin film on a substrate such as glass.

The substrate-type solar cell has an advantage that it is somewhat more efficient than the thin-film solar cell, and the thin-film solar cell has an advantage in that the manufacturing cost is reduced as compared with the substrate-type solar cell.

Hereinafter, a conventional solar cell will be described with reference to the drawings.

1 is a schematic cross-sectional view of a conventional solar cell.

As can be seen in FIG. 1, a conventional solar cell includes a first semiconductor layer 10, a second semiconductor layer 20, a first electrode 30, a third semiconductor layer 40, and a second electrode 50. )

The first semiconductor layer 10 is made of a semiconductor wafer.

The second semiconductor layer 20 is formed on the upper surface of the first semiconductor layer 10 in a thin film form, and the third semiconductor layer 40 is formed on the lower surface of the first semiconductor layer 10 in a thin film form. The PN junction structure is formed by the combination of the first semiconductor layer 10, the second semiconductor layer 20, and the third semiconductor layer 40.

The first electrode 30 is formed on the second semiconductor layer 20, and the second electrode 50 is formed on the third semiconductor layer 40, respectively, the positive electrode of the solar cell. Or (-) electrode.

When sunlight is incident on the conventional solar cell, a carrier such as a hole or an electron is generated in the first semiconductor layer 10, and the carrier is formed in the second semiconductor layer ( The first electrode 30 is moved via 20 and the second electrode 50 is moved via the third semiconductor layer 40.

However, such a conventional solar cell has the following disadvantages.

In the conventional solar cell, the first electrode 30 and the second electrode 50 are mainly formed by screen printing, and the material capable of using such screen printing has a disadvantage of high price. Therefore, the conventional solar cell has a disadvantage that the manufacturing cost is increased.

The present invention is devised to overcome the above-mentioned disadvantages of the conventional solar cell, and the present invention uses an alternative material which is cheaper than the prior art as an electrode material and can form an electrode using such an alternative material. It is an object to provide a more efficient manufacturing method.

The present invention, in order to achieve the above object, a first semiconductor layer; A second semiconductor layer formed on one surface of the first semiconductor layer; A first electrode electrically connected to the second semiconductor layer; A third semiconductor layer formed on the other surface of the first semiconductor layer; And a second electrode electrically connected to the third semiconductor layer, wherein the first electrode comprises a first metal layer and a second metal layer formed on the first metal layer. To provide.

The second metal layer may be formed in the same pattern by the same process as the first metal layer.

The second metal layer may be formed in a different pattern by a different process from the first metal layer, wherein the second metal layer may have a different crystal structure from the first metal layer, and the second metal layer may be formed in the first metal layer. It may be formed to cover the side and top of the metal layer.

The second metal layer may be made of the same metal material as the first metal layer, and in this case, the second metal layer and the first metal layer may be made of any one metal selected from the group consisting of Cu, Al, Mo, and W. have.

The second metal layer may be made of a metal material different from the first metal layer, wherein the first metal layer is made of any one metal selected from the group consisting of Cu, Al, Mo, and W, and the second metal layer Silver may be made of another metal selected from the group consisting of Cu, Al, Mo, and W. Alternatively, the first metal layer may be made of any one metal selected from the group consisting of Cu, Al, Mo, and W, and the second metal layer may be made of Ag. Alternatively, the first metal layer may be made of Ag, and the second metal layer may be made of any one metal selected from the group consisting of Cu, Al, Mo, and W.

The second electrode may include a third metal layer and a fourth metal layer formed on the third metal layer.

A first transparent conductive layer may be formed between the second semiconductor layer and the first electrode, and a second transparent conductive layer may be formed between the third semiconductor layer and the second electrode, wherein the first semiconductor layer and An intrinsic semiconductor layer may be further formed between at least one of the second semiconductor layer and between the first semiconductor layer and the third semiconductor layer. In addition, at least one of the second semiconductor layer and the third semiconductor layer may be formed of a lightly doped semiconductor layer and a heavily doped semiconductor layer formed on the lightly doped semiconductor layer.

An antireflection layer may be formed on the second semiconductor layer.

The first semiconductor layer may be formed of a semiconductor wafer, and the second semiconductor layer and the third semiconductor layer may be formed of a thin film layer.

The first semiconductor layer, the second semiconductor layer, and the third semiconductor layer may be formed of a semiconductor wafer.

The present invention also provides a process for forming a second semiconductor layer on one surface of a first semiconductor layer made of a semiconductor wafer; Forming a first transparent conductive layer on the second semiconductor layer; Forming a first electrode on the first transparent conductive layer; Forming a third semiconductor layer on the other surface of the first semiconductor layer; Forming a second transparent conductive layer on the third semiconductor layer; And forming a second electrode on the second transparent conductive layer, wherein the forming of the first electrode comprises patterning the first metal layer by a sputtering process using a first mask having a predetermined pattern. It provides a method for producing a solar cell comprising the step of forming and pattern forming a second metal layer on the first metal layer.

The process of patterning the second metal layer may be performed by a sputtering process using the first mask, and in this case, the second metal layer may be formed in the same pattern as the first metal layer.

The process of patterning the second metal layer may be performed by an electroless plating process, the second metal layer may have a different crystal structure from the first metal layer, and the second metal layer may have a side surface and an upper surface of the first metal layer. It can be formed to cover.

The second metal layer may be made of the same metal material as the first metal layer, and the second metal layer and the first metal layer may be made of any one metal selected from the group consisting of Cu, Al, Mo, and W.

The second metal layer may be made of a metal material different from the first metal layer, wherein the first metal layer is made of any one metal selected from the group consisting of Cu, Al, Mo, and W, and the second metal layer Silver may be made of another metal selected from the group consisting of Cu, Al, Mo, and W. In addition, the first metal layer may be made of any one metal selected from the group consisting of Cu, Al, Mo, and W, and the second metal layer may be made of Ag. In addition, the first metal layer may be made of Ag, and the second metal layer may be made of any one metal selected from the group consisting of Cu, Al, Mo, and W.

The forming of the second electrode may include forming a third metal layer by a sputtering process using a second mask having a predetermined pattern and forming a fourth metal layer on the third metal layer. have.

The method may further include forming an intrinsic semiconductor layer between at least one of the first semiconductor layer and the second semiconductor layer and between the first semiconductor layer and the third semiconductor layer.

The step of forming at least one semiconductor layer of the second semiconductor layer and the third semiconductor layer includes a step of forming a lightly doped semiconductor layer and a step of forming a high concentration doped semiconductor layer on the lightly doped semiconductor layer. Can be.

In addition, the present invention is a step of forming a second semiconductor layer on the upper surface of the first semiconductor layer by doping a dopant on one surface of the semiconductor wafer; Forming an anti-reflection layer on the second semiconductor layer; Forming a first electrode on the anti-reflection layer; Forming a second electrode on the other surface of the first semiconductor layer; And performing a heat treatment to allow the first electrode to penetrate the antireflection layer and penetrate the second semiconductor layer, and the second electrode penetrates the other surface of the first semiconductor layer to form a third semiconductor layer. In this case, the step of forming the first electrode, the step of forming a pattern of the first metal layer by the sputtering process using a first mask of a predetermined pattern and the pattern of the second metal layer on the first metal layer It provides a method of manufacturing a solar cell comprising the step of forming.

The process of patterning the second metal layer may be performed by a sputtering process using the first mask, and in this case, the second metal layer may be formed in the same pattern as the first metal layer.

The process of patterning the second metal layer may be performed by an electroless plating process, wherein the second metal layer may have a crystal structure different from that of the first metal layer, and the second metal layer may have a side surface of the first metal layer. And an upper surface thereof.

According to the present invention with the above configuration, the following effects can be obtained.

According to the present invention, by using a sputtering process and an electroless plating process using a mask, the use of expensive materials can be reduced, thereby reducing the manufacturing cost of the solar cell.

1 is a schematic cross-sectional view of a conventional solar cell.
2 is a schematic cross-sectional view of a solar cell according to an embodiment of the present invention.
3 is a schematic cross-sectional view of a solar cell according to another embodiment of the present invention.
4 is a schematic cross-sectional view of a solar cell according to another embodiment of the present invention.
5 is a schematic cross-sectional view of a solar cell according to another embodiment of the present invention.
6 is a schematic cross-sectional view of a solar cell according to another embodiment of the present invention.
7 is a schematic cross-sectional view of a solar cell according to another embodiment of the present invention.
8 is a schematic cross-sectional view of a solar cell according to another embodiment of the present invention.
9 is a schematic cross-sectional view of a solar cell according to another embodiment of the present invention.
10A to 10H are schematic process cross-sectional views illustrating a manufacturing process of a solar cell according to an embodiment of the present invention.
11A to 11H are schematic cross-sectional views illustrating a manufacturing process of a solar cell according to another embodiment of the present invention.
12A to 12F are schematic cross-sectional views illustrating a manufacturing process of a solar cell according to still another embodiment of the present invention.
13A to 13F are schematic cross-sectional views illustrating a manufacturing process of a solar cell according to still another embodiment of the present invention.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings.

2 is a schematic cross-sectional view of a solar cell according to an embodiment of the present invention.

As can be seen in Figure 2, the solar cell according to an embodiment of the present invention, the first semiconductor layer 100, the second semiconductor layer 200, the first transparent conductive layer 300, the first electrode 400, The third semiconductor layer 500, the second transparent conductive layer 600, and the second electrode 700 may be formed.

The first semiconductor layer 100 may be formed of a semiconductor wafer, for example, a silicon wafer. Specifically, the first semiconductor layer 100 may be formed of an N-type silicon wafer or a P-type silicon wafer. The first semiconductor layer 100 has the same polarity as any one of the second semiconductor layer 200 and the third semiconductor layer 500.

Although not shown, an uneven structure may be formed on at least one surface of the upper or lower surface of the first semiconductor layer 100. When the uneven structure is formed on the upper and lower surfaces of the first semiconductor layer 100, the second semiconductor layer 200, the first transparent conductive layer 300, the third semiconductor layer 500, and the second transparent conductive layer ( Concave-convex structure may be formed on the surface of 600).

The second semiconductor layer 200 is formed in the form of a thin film on the upper surface of the first semiconductor layer 100 made of the semiconductor wafer. The second semiconductor layer 200 may form a PN junction together with the first semiconductor layer 100. Therefore, when the first semiconductor layer 100 is formed of an N-type silicon wafer, the second semiconductor layer 200 may be formed. 200 may be formed of a P-type semiconductor layer. In particular, the second semiconductor layer 200 may be made of P-type amorphous silicon doped with a Group III element such as boron (B).

In general, since the drift mobility of holes is lower than the drift mobility of electrons, it is preferable to form a P-type semiconductor layer close to the light-receiving surface in order to maximize hole collection efficiency due to incident light. It is preferable that the second semiconductor layer 200 close to the surface is made of a P-type semiconductor layer.

The first transparent conductive layer 300 is formed in the form of a thin film on the upper surface of the second semiconductor layer 200. The first transparent conductive layer 300 collects carriers, for example, holes generated in the first semiconductor layer 100, and moves the collected carriers to the first electrode 400.

The first transparent conductive layer 300 may be made of a transparent conductive material such as indium tin oxide (ITO), ZnOH, ZnO: B, ZnO: Al, SnO ₂ , SnO ₂ : F, and the like. Can be.

The first electrode 400 is formed on the first transparent conductive layer 300 to form a front surface of the solar cell. Therefore, the first electrode 400 is patterned to have a predetermined shape so that sunlight can penetrate into the solar cell.

The first electrode 400 may include a first metal layer 410 and a second metal layer 420.

The first metal layer 410 is patterned on the first transparent conductive layer 300. The first metal layer 410 may be patterned by a sputtering process using a first mask having a predetermined pattern.

The second metal layer 420 is patterned on the first metal layer 410. The second metal layer 420 may be formed in the same pattern as the first metal layer 410. The second metal layer 420 may be patterned by the same process as that of forming the first metal layer 410, that is, by a sputtering process using the first mask. In particular, the first metal layer 410 and the second metal layer 420 may be patterned in a continuous process using the same first mask.

The thickness of the first metal layer 410 may be the same as or different from the thickness of the second metal layer 420.

The first metal layer 410 and the second metal layer 420 may be made of the same metal material. In this case, the first metal layer 410 and the second metal layer 420 may be formed of Cu, Al, Mo, and W. It may be made of any one metal selected from the group consisting of.

The first metal layer 410 and the second metal layer 420 may be made of different metal materials. In this case, the first metal layer 410 is any one selected from the group consisting of Cu, Al, Mo, and W. It is made of a metal and the second metal layer 420 may be made of another metal selected from the group consisting of Cu, Al, Mo, and W.

In addition, the first metal layer 410 may be made of any one metal selected from the group consisting of Cu, Al, Mo, and W, and the second metal layer 420 may be made of Ag. In addition, the first metal layer 410 may be made of Ag, and the second metal layer 420 may be made of any one metal selected from the group consisting of Cu, Al, Mo, and W.

The third semiconductor layer 500 is formed in the form of a thin film on the lower surface of the first semiconductor layer 100 made of the semiconductor wafer. The third semiconductor layer 500 is formed to have a different polarity from the second semiconductor layer 200. The second semiconductor layer 200 is a P-type semiconductor layer doped with a Group III element such as boron (B). In this case, the third semiconductor layer 500 is formed of an N-type semiconductor layer doped with a Group 5 element such as phosphorus (P). In particular, the third semiconductor layer 500 may be made of N-type amorphous silicon.

The second transparent conductive layer 600 is formed in the form of a thin film on the lower surface of the third semiconductor layer 500. The second transparent conductive layer 600 collects carriers, eg, electrons, generated in the first semiconductor layer 100 and moves the collected carriers to the second electrode 700.

The second transparent conductive layer 600 may be made of a transparent conductive material such as indium tin oxide (ITO), ZnOH, ZnO: B, ZnO: Al, SnO ₂ , SnO ₂ : F, or the like.

The second electrode 700 is formed on the bottom surface of the second transparent conductive layer 600. Since the second electrode 700 is formed on the rear surface of the solar cell, the second electrode 700 may be formed on the entire lower surface of the second transparent conductive layer 600, but the reflected sunlight is incident on the rear surface of the solar cell. In order to be able to, the pattern can be formed, as shown.

The second electrode 700 may include a third metal layer 710 and a fourth metal layer 720.

The third metal layer 710 is patterned on the second transparent conductive layer 600. The third metal layer 710 may be patterned by a sputtering process using a second mask having a predetermined pattern. The second mask may be the same as or different from the first mask described above.

The fourth metal layer 720 is patterned on the third metal layer 710. The fourth metal layer 720 may be formed in the same pattern as the third metal layer 710. The fourth metal layer 720 may be patterned by the same process as that of forming the third metal layer 710, that is, by a sputtering process using the second mask. In particular, the third metal layer 710 and the fourth metal layer 720 may be patterned in a continuous process by using the same second mask.

The thickness of the third metal layer 710 may be the same as or different from the thickness of the fourth metal layer 720.

The third metal layer 710 and the fourth metal layer 720 may be made of the same metal material. In this case, the third metal layer 710 and the fourth metal layer 720 may be formed of Cu, Al, Mo, and W. It may be made of any one metal selected from the group consisting of.

The third metal layer 710 and the fourth metal layer 720 may be formed of different metal materials. In this case, the third metal layer 710 may be any one selected from the group consisting of Cu, Al, Mo, and W. It is made of a metal and the fourth metal layer 720 may be made of another metal selected from the group consisting of Cu, Al, Mo, and W.

In addition, the third metal layer 710 may be made of any one metal selected from the group consisting of Cu, Al, Mo, and W, and the fourth metal layer 720 may be made of Ag. In addition, the third metal layer 710 may be made of Ag, and the fourth metal layer 720 may be made of any one metal selected from the group consisting of Cu, Al, Mo, and W.

FIG. 3 is a schematic cross-sectional view of a solar cell according to another embodiment of the present invention, which is the solar cell illustrated in FIG. 2 except that the structures of the first electrode 400 and the second electrode 700 are changed. Is the same as Therefore, like reference numerals refer to like elements, and repeated descriptions of the same elements will be omitted.

As can be seen in FIG. 3, the first electrode 400 may include a first metal layer 410 and a second metal layer 420.

The first metal layer 410 is patterned on the first transparent conductive layer 300. The first metal layer 410 may be patterned by a sputtering process using a first mask having a predetermined pattern.

The second metal layer 420 is patterned on the first metal layer 410. In this case, the second metal layer 420 is formed in a different pattern from the first metal layer 410. More specifically, the second metal layer 420 is formed to cover the side and the top surface of the first metal layer 410. The second metal layer 420 may be patterned by a plating process, in particular, an electroless plating process.

The thickness of the first metal layer 410 may be the same as or different from the thickness of the second metal layer 420.

The first metal layer 410 and the second metal layer 420 may be made of the same metal material. In this case, the first metal layer 410 and the second metal layer 420 may be formed of Cu, Al, Mo, and W. It may be made of any one metal selected from the group consisting of.

As described above, even if the first metal layer 410 and the second metal layer 420 are made of the same metal material, the first metal layer 410 is patterned by a sputtering process and the second metal layer 420 is plated. Since the pattern is formed, the crystal structures of the first metal layer 410 and the second metal layer 420 may be different from each other.

In addition, the first metal layer 410 and the second metal layer 420 may be made of different metal materials as in the above-described embodiment, and a repeated description thereof will be omitted.

On the other hand, considering that the sputtering process takes a long time in lamination, it is a process time to combine the sputtering process and the plating process as compared to forming the first metal layer 410 and the second metal layer 420 only by the sputtering process. This can be shortened.

As shown in FIG. 3, the second electrode 700 may include a third metal layer 710 and a fourth metal layer 720.

The third metal layer 710 is patterned on the second transparent conductive layer 600. The third metal layer 710 may be patterned by a sputtering process using a second mask having a predetermined pattern.

The fourth metal layer 720 is patterned on the third metal layer 710. In this case, the fourth metal layer 720 is formed in a different pattern from the third metal layer 710. More specifically, the fourth metal layer 720 is formed to cover side and bottom surfaces of the third metal layer 710. The fourth metal layer 720 may be patterned by a plating process, in particular, an electroless plating process.

The thickness of the third metal layer 710 may be the same as or different from the thickness of the fourth metal layer 720.

The third metal layer 710 and the fourth metal layer 720 may be made of the same metal material. In this case, the third metal layer 710 and the fourth metal layer 720 may be formed of Cu, Al, Mo, and W. It may be made of any one metal selected from the group consisting of.

Although the third metal layer 710 and the fourth metal layer 720 are made of the same metal material, the third metal layer 710 is patterned by a sputtering process and the fourth metal layer 720 is patterned by a plating process. As such, the crystal structures of the third metal layer 710 and the fourth metal layer 720 may be different from each other.

In addition, the third metal layer 710 and the fourth metal layer 720 may be made of different metal materials as in the above-described embodiment, and a repeated description thereof will be omitted.

Meanwhile, in the solar cell according to FIG. 3, any one of the first electrode 400 and the second electrode 700 may be formed in the structure of FIG. 2.

4 is a schematic cross-sectional view of a solar cell according to another embodiment of the present invention, in which a first intrinsic semiconductor layer 150 is further formed between the first semiconductor layer 100 and the second semiconductor layer 200. In addition, the second intrinsic semiconductor layer 450 is additionally formed between the first semiconductor layer 100 and the third semiconductor layer 500, and is the same as the solar cell illustrated in FIG. 2. Therefore, the same reference numerals are assigned to the same components, and repeated descriptions of the same components will be omitted.

When the second semiconductor layer 200 or the third semiconductor layer 500 is formed on the surface of the first semiconductor layer 100 using a high concentration of dopant gas, the first semiconductor layer ( Defect may occur on the surface of the 100).

Therefore, in another embodiment of the present invention illustrated in FIG. 4, the first intrinsic semiconductor layer 150 is formed on the upper surface of the first semiconductor layer 100, and then on the first intrinsic semiconductor layer 150. The second semiconductor layer 200 is formed to prevent defects from occurring on the upper surface of the first semiconductor layer 100. In addition, by forming a second intrinsic semiconductor layer 450 on the lower surface of the first semiconductor layer 100, and then forming a third semiconductor layer 500 on the second intrinsic semiconductor layer 450, the first The lower surface of the semiconductor layer 100 is to prevent the occurrence of defects.

Meanwhile, although FIG. 4 illustrates a state in which both the first intrinsic semiconductor layer 150 and the second intrinsic semiconductor layer 450 are formed, any one of the first intrinsic semiconductor layer 150 and the second intrinsic semiconductor layer 450 is shown. It is also possible to form only intrinsic semiconductor layers.

FIG. 5 is a schematic cross-sectional view of a solar cell according to another exemplary embodiment of the present invention, which is illustrated in FIG. 2 except that the structures of the second semiconductor layer 200 and the third semiconductor layer 500 are changed. Same as solar cell. Therefore, the same reference numerals are assigned to the same components, and repeated descriptions of the same components will be omitted.

As can be seen in Figure 5, according to another embodiment of the present invention, the second semiconductor layer 200 is a lightly doped second semiconductor layer 210 formed on the upper surface of the first semiconductor layer 100 and the A lightly doped second semiconductor layer 220 is formed on the lightly doped second semiconductor layer 210.

In addition, the third semiconductor layer 500 may be formed on the lightly doped third semiconductor layer 510 and the lightly doped third semiconductor layer 510 formed on the bottom surface of the first semiconductor layer 100. It may be formed of the doped third semiconductor layer 520.

In the present specification, low concentration and high concentration are relative concepts, which means that the lightly doped second semiconductor layer 210 has a relatively smaller concentration of dopant than the highly doped second semiconductor layer 220.

The lightly doped second semiconductor layer 210 and the lightly doped third semiconductor layer 510 are respectively the first intrinsic semiconductor layer 150 and the second intrinsic semiconductor layer 450 of the embodiment shown in FIG. 4. Play the same role as).

That is, the first semiconductor layer 210 may be formed on the upper surface of the first semiconductor layer 100 by first forming the lightly doped second semiconductor layer 210 and then the second lightly doped second semiconductor layer 220. Defects may be prevented from occurring on the top surface of the substrate 100, and a lightly doped third semiconductor layer 510 is first formed on the bottom surface of the first semiconductor layer 100, and then the heavily doped agent is formed. By forming the three semiconductor layers 520, defects may be prevented from occurring on the bottom surface of the first semiconductor layer 100.

Therefore, the dopant concentrations of the lightly doped second semiconductor layer 210 and the lightly doped third semiconductor layer 510 may be adjusted to prevent defects on the surface of the first semiconductor layer 100. Do.

The solar cell shown in FIG. 5 has an advantage of superior productivity compared to the solar cell shown in FIG. 4 described above. That is, in the above-described solar cell shown in FIG. 4, although deposition equipment is added and the process is complicated to form the first intrinsic semiconductor layer 150 and the second intrinsic semiconductor layer 450, productivity may be reduced, but FIG. 5. In the solar cell shown in FIG. 1, the lightly doped second semiconductor layer 210 and the lightly doped second semiconductor layer 220 may be performed in one chamber in a continuous process, and the lightly doped third semiconductor may be used. Since the layer 510 and the highly doped third semiconductor layer 520 may be performed in one chamber in a continuous process, an additional deposition apparatus or process may not be added.

Meanwhile, in FIG. 5, the second semiconductor layer 200 includes a lightly doped second semiconductor layer 210 and a heavily doped second semiconductor layer 220, and the third semiconductor layer 500 is lightly doped. Although the third semiconductor layer 510 and the heavily doped third semiconductor layer 520 are illustrated, only one of the semiconductor layers may be formed of a lightly doped semiconductor layer and a heavily doped semiconductor layer.

6 is a schematic cross-sectional view of a solar cell according to another embodiment of the present invention, in which a first intrinsic semiconductor layer 150 is further formed between the first semiconductor layer 100 and the second semiconductor layer 200. In addition, except that the second intrinsic semiconductor layer 450 is further formed between the first semiconductor layer 100 and the third semiconductor layer 500, the same as the solar cell illustrated in FIG. 3.

FIG. 7 is a schematic cross-sectional view of a solar cell according to another embodiment of the present invention, which is a lightly doped second semiconductor layer 210 having a second semiconductor layer 200 formed on an upper surface of the first semiconductor layer 100. And a lightly doped second semiconductor layer 220 formed on the lightly doped second semiconductor layer 210, and the third semiconductor layer 500 is formed on the bottom surface of the first semiconductor layer 100. 3 is the same as the solar cell illustrated in FIG. 3 except that the third semiconductor layer 510 and the highly doped third semiconductor layer 520 formed on the lightly doped third semiconductor layer 510 are formed. .

2 to 7 as described above relates to a solar cell in which a substrate type solar cell and a thin film type solar cell are combined, and the solar cell according to FIGS. 8 and 9 to be described later relates to a substrate type solar cell.

FIG. 8 is a schematic cross-sectional view of a solar cell according to still another embodiment of the present invention. As can be seen in FIG. 8, the solar cell according to another embodiment of the present invention may include a first semiconductor layer 100 and a second layer. The semiconductor layer 200 includes an antireflection layer 800, a first electrode 400, a third semiconductor layer 500, and a second electrode 700.

The first semiconductor layer 100 may be formed of a semiconductor wafer, for example, a silicon wafer. Specifically, the first semiconductor layer 100 may be formed of a P-type silicon wafer.

Although not shown, an uneven structure may be formed on at least one surface of the upper or lower surface of the first semiconductor layer 100.

The second semiconductor layer 200 is formed on the top surface of the first semiconductor layer 100. The second semiconductor layer 200 may be formed of a semiconductor wafer. In particular, by doping an N-type dopant to a P-type silicon wafer, the N-layer doped with the N-type dopant constitutes the second semiconductor layer 200. can do. An uneven structure may be formed on the surface of the second semiconductor layer 200.

The antireflection layer 800 is formed on the second semiconductor layer 200. The anti-reflection layer 800 may be formed of a thin film layer such as SiNx.

The first electrode 400 is formed to be electrically connected to the second semiconductor layer 200. Specifically, the first electrode 400 penetrates the anti-reflection layer 800 from the upper side of the anti-reflection layer 800 and the second semiconductor layer. It extends to 200.

Since the specific configuration of the first electrode 400 is the same as in the solar cell illustrated in FIG. 2 described above, repeated description will be omitted.

The third semiconductor layer 500 is formed on the bottom surface of the first semiconductor layer 100. The third semiconductor layer 500 may be formed of a semiconductor wafer. In particular, by doping a P-type dopant to a P-type silicon wafer, the P + layer doped with the P-type dopant constitutes the third semiconductor layer 500. can do. An uneven structure may also be formed on the surface of the third semiconductor layer 500.

The second electrode 700 is formed on the bottom surface of the third semiconductor layer 500.

Since the second electrode 700 is formed on the rear surface of the solar cell, the second electrode 700 may be formed on the entire lower surface of the third semiconductor layer 500 as shown, but the third electrode as shown in FIG. The metal layer 710 and the fourth metal layer 720 may be formed in a combination.

9 is a schematic cross-sectional view of a solar cell according to another embodiment of the present invention, which is the same as the solar cell according to FIG. 8 except that the structure of the first electrode 400 is changed.

According to the solar cell of FIG. 9, the structure of the first electrode 400 is the same as that of the solar cell of FIG. 3.

10A to 10H are schematic cross-sectional views illustrating a manufacturing process of a solar cell according to an embodiment of the present invention, which relates to the manufacturing method of the solar cell shown in FIG.

First, as shown in FIG. 10A, a second semiconductor layer 200 is formed on an upper surface of the first semiconductor layer 100 made of a semiconductor wafer.

The first semiconductor layer 100 may be formed of an N-type silicon wafer.

Although not shown, in order to form a concave-convex structure on at least one surface of the upper or lower surface of the first semiconductor layer 100, a texture processing process may be performed before the process of forming the second semiconductor layer 200. have. The texture processing process may be made by reactive ion etching (RIE), or may be made by wet etching.

In the process of forming the second semiconductor layer 200, a P-type semiconductor layer, for example, a P-type amorphous silicon layer, is formed on the first semiconductor layer 100 by using plasma enhanced chemical vapor deposition (PECVD). It can be made to the process.

Meanwhile, a first intrinsic semiconductor layer may be formed on the first semiconductor layer 100 before the process of forming the second semiconductor layer 200. The first intrinsic semiconductor layer may be formed by forming an intrinsic (I) -type amorphous silicon layer using a plasma enhanced chemical vapor deposition (PECVD) method.

In addition, in the process of forming the second semiconductor layer 200, a lightly doped second semiconductor layer 210 is formed on the first semiconductor layer 100, and the lightly doped second semiconductor layer 210 is formed. It may be a process of forming the second semiconductor layer 220 doped with high concentration on the.

The lightly doped second semiconductor layer 210 and the heavily doped second semiconductor layer 220 may be performed in a continuous process in one chamber. That is, the doped P-type semiconductor layer 210 and the highly doped P-type semiconductor layer 210 may be controlled while controlling the dopant gas of Group III elements such as boron (B) in one plasma enhanced chemical vapor deposition (PECVD) chamber. The second P-type semiconductor layer 220 may be formed continuously.

Next, as shown in FIG. 10B, a first transparent conductive layer 300 is formed on the second semiconductor layer 200.

The process of forming the first transparent conductive layer 300 may be performed by sputtering or metal organic chemical vapor deposition (MOCVD), indium tin oxide (ITO), ZnOH, ZnO: B, ZnO: Al, SnO ₂ , SnO ₂ : It may be a process of forming a transparent conductive material layer such as F.

Next, as can be seen in Figure 10c, to form a pattern on the first metal layer 410 on the first transparent conductive layer (300).

The first metal layer 410 is patterned by a sputtering process using the first mask 910 having a predetermined pattern.

Next, as shown in FIG. 10D, the second metal layer 420 is patterned on the first metal layer 410 to form a first electrode 400 including the first metal layer 410 and the second metal layer 420. To form.

The second metal layer 420 may be patterned by the same process as the pattern forming process of the first metal layer 410, that is, by a sputtering process using the first mask 910, and thus, the first metal layer The 410 and the second metal layer 420 may be formed in the same pattern. In particular, the first metal layer 410 and the second metal layer 420 may be patterned in a continuous process using the same first mask.

Since the thickness, material, and the like of the first metal layer 410 and the second metal layer 420 are the same as those of FIG. 2, the repeated description will be omitted.

Next, as shown in FIG. 10E, a third semiconductor layer 500 is formed on the bottom surface of the first semiconductor layer 100.

In the process of forming the third semiconductor layer 500, an N-type semiconductor layer, for example, an N-type amorphous silicon layer is formed on the first semiconductor layer 100 by using plasma enhanced chemical vapor deposition (PECVD). It can be made to the process.

Next, as shown in FIG. 10F, a second transparent conductive layer 600 is formed on the third semiconductor layer 500.

The process of forming the second transparent conductive layer 600 may be performed by sputtering or metal organic chemical vapor deposition (MOCVD), indium tin oxide (ITO), ZnOH, ZnO: B, ZnO: Al, SnO ₂ , SnO ₂ : It may be a process of forming a transparent conductive material layer such as F.

Next, as can be seen in FIG. 10G, a third metal layer 710 is patterned on the second transparent conductive layer 600.

The third metal layer 710 is patterned by a sputtering process using the second mask 920 having a predetermined pattern.

Next, as can be seen in Figure 10h, by forming a fourth metal layer 720 on the third metal layer 710, the second electrode 700 consisting of a third metal layer 710 and the fourth metal layer 720. To form.

The fourth metal layer 720 may be patterned by the same process as the pattern forming process of the third metal layer 710, that is, by the sputtering process using the second mask 920, and thus, the third metal layer 710 and the fourth metal layer 720 may be formed in the same pattern. In particular, the third metal layer 710 and the fourth metal layer 720 may be patterned in a continuous process by using the same second mask.

Since the thickness and the material of the third metal layer 710 and the fourth metal layer 720 are the same as those of FIG. 2 described above, repeated descriptions thereof will be omitted.

11A to 11H are schematic cross-sectional views illustrating a manufacturing process of a solar cell according to another exemplary embodiment of the present invention, which relates to the manufacturing method of the solar cell illustrated in FIG. 3. Detailed description of the repeated configuration with the above-described embodiment will be omitted.

First, as shown in FIG. 11A, a second semiconductor layer 200 is formed on an upper surface of the first semiconductor layer 100 made of a semiconductor wafer.

The first intrinsic semiconductor layer may be formed on the first semiconductor layer 100 before the process of forming the second semiconductor layer 200.

In addition, in the process of forming the second semiconductor layer 200, a lightly doped second semiconductor layer 210 is formed on the first semiconductor layer 100, and the lightly doped second semiconductor layer 210 is formed. It may be a process of forming the second semiconductor layer 220 doped with high concentration on the.

Next, as shown in FIG. 11B, a first transparent conductive layer 300 is formed on the second semiconductor layer 200.

Next, as shown in FIG. 11C, the first metal layer 410 is patterned on the first transparent conductive layer 300.

The first metal layer 410 is patterned by a sputtering process using the first mask 910 having a predetermined pattern.

Next, as shown in FIG. 11D, the second metal layer 420 is patterned on the first metal layer 410 to form a first electrode 400 including the first metal layer 410 and the second metal layer 420. To form.

The second metal layer 420 may be patterned by a process different from the pattern forming process of the first metal layer 410, specifically, a plating process, in particular, an electroless plating process, and thus, the first metal layer The second metal layer 420 may be patterned to cover the top and side surfaces of the 410.

Next, as shown in FIG. 11E, a third semiconductor layer 500 is formed on the bottom surface of the first semiconductor layer 100.

Next, as shown in FIG. 11F, a second transparent conductive layer 600 is formed on the third semiconductor layer 500.

Next, as can be seen in FIG. 11G, a third metal layer 710 is patterned on the second transparent conductive layer 600.

The third metal layer 710 is patterned by a sputtering process using the second mask 920 having a predetermined pattern.

Next, as can be seen in FIG. 11H, the fourth metal layer 720 is patterned on the third metal layer 710 to form a second electrode 700 including the third metal layer 710 and the fourth metal layer 720. To form.

The fourth metal layer 720 may be patterned by a process different from the pattern forming process of the third metal layer 710, specifically, a plating process, in particular, an electroless plating process, and thus, the third metal layer The fourth metal layer 720 may be patterned to cover the bottom and side surfaces of the 710.

As described above, the second semiconductor layer 200, the first transparent conductive layer 300, and the first electrode 400 are sequentially formed on the upper surface of the first semiconductor layer 100, and then the first semiconductor layer 100 is formed. An example of a process of sequentially forming a third semiconductor layer 500, a second transparent conductive layer 600, and a second electrode 7000 on a lower surface thereof has been described, but the method of manufacturing a solar cell according to the present invention may vary the above processes. It also includes the case of changing.

For example, the present invention forms the second semiconductor layer 200 on the top surface of the first semiconductor layer 100 and the third semiconductor layer 500 on the bottom surface of the first semiconductor layer 100, and then After forming the first transparent conductive layer 300 on the second semiconductor layer 200 and the second transparent conductive layer 600 on the third semiconductor layer 500, thereafter, the first transparent conductive layer It also includes a case where the first electrode 400 is formed on the 300 and the second electrode 700 is formed on the second transparent conductive layer 600.

12A to 12F are schematic cross-sectional views showing a manufacturing process of a solar cell according to another embodiment of the present invention, which relates to the manufacturing method of the solar cell shown in FIG. 8 described above.

First, as shown in FIG. 12A, the second semiconductor layer 200 is formed on the upper surface of the first semiconductor layer 100.

The process of forming the second semiconductor layer 200 on the upper surface of the first semiconductor layer 100 may include a process of doping a dopant, for example, an N-type dopant, on an upper surface of a semiconductor wafer, for example, a P-type silicon wafer. have. In this case, a region in which the dopant is not doped constitutes the first semiconductor layer 100 and a region in which the dopant is doped constitutes the second semiconductor layer 200.

Meanwhile, a texture process on one surface of the semiconductor wafer may be performed before the dopant doping process. The texture process may be performed by using reactive ion etching (RIE).

Next, as can be seen in FIG. 12B, an antireflection layer 800 is formed on the second semiconductor layer 200.

The antireflection layer 800 may form a thin film layer such as SiNx by PECVD.

Next, as can be seen in Figure 12c, to form a pattern on the first metal layer 410 on the anti-reflection layer (800).

The first metal layer 410 is patterned by a sputtering process using the first mask 910 having a predetermined pattern.

Next, as shown in FIG. 12D, the second metal layer 420 is patterned on the first metal layer 410 to form a first electrode 400 including the first metal layer 410 and the second metal layer 420. To form.

The second metal layer 420 may be patterned by the same process as the pattern forming process of the first metal layer 410, that is, by a sputtering process using the first mask 910, and thus, the first metal layer The 410 and the second metal layer 420 may be formed in the same pattern. In particular, the first metal layer 410 and the second metal layer 420 may be patterned in a continuous process using the same first mask.

The thickness, material, and the like of the first metal layer 410 and the second metal layer 420 are the same as described above.

Next, as shown in FIG. 12E, a second electrode 700 is formed on the bottom surface of the first semiconductor layer 100.

The second electrode 700 is formed using a metal that can function as a dopant such as Al.

Next, as can be seen in Figure 12f, firing is performed at a high temperature.

When the heat treatment is performed at a high temperature as described above, the first electrode 400 penetrates the anti-reflection layer 800 and penetrates to the second semiconductor layer 200, and the second electrode 700 is formed of the first electrode. The third semiconductor layer 500, for example, a P + layer, is formed by penetrating into the lower surface of the first semiconductor layer 100.

13A to 13F are schematic cross-sectional views illustrating a manufacturing process of a solar cell according to still another embodiment of the present invention, which relates to the manufacturing method of the solar cell illustrated in FIG. 9. Repeated descriptions of the same configurations as those of the above-described embodiment will be omitted.

First, as shown in FIG. 13A, the second semiconductor layer 200 is formed on the upper surface of the first semiconductor layer 100.

Next, as shown in FIG. 13B, an anti-reflection layer 800 is formed on the second semiconductor layer 200.

Next, as can be seen in Figure 13c, to form a pattern on the first metal layer 410 on the anti-reflection layer (800).

The first metal layer 410 is patterned by a sputtering process using the first mask 910 having a predetermined pattern.

Next, as shown in FIG. 13D, the second metal layer 420 is patterned on the first metal layer 410 to form the first electrode 400 including the first metal layer 410 and the second metal layer 420. To form.

The second metal layer 420 may be patterned by a process different from the pattern forming process of the first metal layer 410, specifically, a plating process, in particular, an electroless plating process, and thus, the second metal layer The second metal layer 420 may be patterned to cover the top and side surfaces of the 420.

Next, as shown in FIG. 13E, a second electrode 700 is formed on the bottom surface of the first semiconductor layer 100.

Next, as can be seen in Figure 13f, the firing is performed at a high temperature. Then, the first electrode 400 penetrates the anti-reflection layer 800 and penetrates to the second semiconductor layer 200, and the second electrode 700 is formed of the first semiconductor layer 100. It penetrates into the lower surface to form a third semiconductor layer 500, for example, a P + layer.

100: first semiconductor layer 150: first intrinsic semiconductor layer
200: second semiconductor layer 210: lightly doped second semiconductor layer
220: heavily doped second semiconductor layer 300: first transparent conductive layer
400: first electrode 410: first metal layer
420: second metal layer 450: second intrinsic semiconductor layer
500: third semiconductor layer 510: lightly doped third semiconductor layer
520: highly doped third semiconductor layer 600: second transparent conductive layer
700: second electrode 710: third metal layer
720: fourth metal layer 800: antireflection layer
910: first mask 920: second mask

Claims (39)

A first semiconductor layer;
A second semiconductor layer formed on one surface of the first semiconductor layer;
A first electrode electrically connected to the second semiconductor layer;
A third semiconductor layer formed on the other surface of the first semiconductor layer; And
And a second electrode electrically connected to the third semiconductor layer,
In this case, the first electrode comprises a first metal layer and a second metal layer formed on the first metal layer. The method of claim 1,
The second metal layer is a solar cell, characterized in that formed in the same pattern by the same process as the first metal layer. The method of claim 1,
The second metal layer is a solar cell, characterized in that formed in a different pattern by a different process than the first metal layer. The method of claim 3,
The second metal layer is a solar cell, characterized in that the crystal structure is different from the first metal layer. The method of claim 3,
The second metal layer is a solar cell, characterized in that formed to cover the side and the top surface of the first metal layer. The method of claim 1,
The second metal layer is a solar cell, characterized in that made of the same metal material as the first metal layer. The method according to claim 6,
The second metal layer and the first metal layer is a solar cell, characterized in that made of any one metal selected from the group consisting of Cu, Al, Mo, and W. The method of claim 1,
The second metal layer is a solar cell, characterized in that made of a different metal material than the first metal layer. 9. The method of claim 8,
The first metal layer is made of any one metal selected from the group consisting of Cu, Al, Mo, and W, the second metal layer is made of another metal selected from the group consisting of Cu, Al, Mo, and W Solar cell, characterized in that. 9. The method of claim 8,
The first metal layer is made of any one metal selected from the group consisting of Cu, Al, Mo, and W, the second metal layer is a solar cell, characterized in that made of Ag. 9. The method of claim 8,
The first metal layer is made of Ag, the second metal layer is a solar cell, characterized in that made of any one metal selected from the group consisting of Cu, Al, Mo, and W. The method of claim 1,
The second electrode comprises a third metal layer and a fourth metal layer formed on the third metal layer. The method of claim 1,
And a first transparent conductive layer formed between the second semiconductor layer and the first electrode, and a second transparent conductive layer formed between the third semiconductor layer and the second electrode. The method of claim 13,
An intrinsic semiconductor layer is further formed between at least one of the first semiconductor layer and the second semiconductor layer and between the first semiconductor layer and the third semiconductor layer. The method of claim 13,
At least one semiconductor layer of the second semiconductor layer and the third semiconductor layer is a solar cell, characterized in that consisting of a lightly doped semiconductor layer and a high concentration doped semiconductor layer formed on the lightly doped semiconductor layer. The method of claim 1,
The solar cell, characterized in that the anti-reflection layer is formed on the second semiconductor layer. The method of claim 1,
The first semiconductor layer is made of a semiconductor wafer, the second semiconductor layer and the third semiconductor layer is a solar cell, characterized in that made of a thin film layer. The method of claim 1,
The first semiconductor layer, the second semiconductor layer, and the third semiconductor layer is a solar cell, characterized in that consisting of a semiconductor wafer. Forming a second semiconductor layer on one surface of the first semiconductor layer made of a semiconductor wafer;
Forming a first transparent conductive layer on the second semiconductor layer;
Forming a first electrode on the first transparent conductive layer;
Forming a third semiconductor layer on the other surface of the first semiconductor layer;
Forming a second transparent conductive layer on the third semiconductor layer; And
It comprises a step of forming a second electrode on the second transparent conductive layer,
In this case, the step of forming the first electrode includes a step of pattern-forming a first metal layer by a sputtering process using a first mask having a predetermined pattern and a step of pattern-forming a second metal layer on the first metal layer. Method for producing a solar cell, characterized in that made. 20. The method of claim 19,
The step of patterning the second metal layer is a manufacturing method of a solar cell, characterized in that the sputtering process using the first mask. 21. The method of claim 20,
The second metal layer is a solar cell manufacturing method, characterized in that formed in the same pattern as the first metal layer. 20. The method of claim 19,
The process of forming the pattern of the second metal layer is a manufacturing method of a solar cell, characterized in that consisting of an electroless plating process. The method of claim 22,
The second metal layer is a solar cell manufacturing method, characterized in that the crystal structure is different from the first metal layer. The method of claim 22,
The second metal layer is a solar cell manufacturing method, characterized in that formed to cover the side and the top surface of the first metal layer. 20. The method of claim 19,
The second metal layer is a method of manufacturing a solar cell, characterized in that made of the same metal material as the first metal layer. 26. The method of claim 25,
The second metal layer and the first metal layer is a manufacturing method of a solar cell, characterized in that made of any one metal selected from the group consisting of Cu, Al, Mo, and W. 20. The method of claim 19,
The second metal layer is a method of manufacturing a solar cell, characterized in that made of a different metal material than the first metal layer. 28. The method of claim 27,
The first metal layer is made of any one metal selected from the group consisting of Cu, Al, Mo, and W, the second metal layer is made of another metal selected from the group consisting of Cu, Al, Mo, and W Method for manufacturing a solar cell, characterized in that. 28. The method of claim 27,
The first metal layer is made of any one metal selected from the group consisting of Cu, Al, Mo, and W, the second metal layer is a manufacturing method of a solar cell, characterized in that made of Ag. 28. The method of claim 27,
The first metal layer is made of Ag, the second metal layer is a manufacturing method of a solar cell, characterized in that made of any one metal selected from the group consisting of Cu, Al, Mo, and W. 20. The method of claim 19,
The step of forming the second electrode includes a step of pattern forming a third metal layer by a sputtering process using a second mask having a predetermined pattern and a step of pattern forming a fourth metal layer on the third metal layer. Method for manufacturing a solar cell characterized in that. 20. The method of claim 19,
And forming an intrinsic semiconductor layer between at least one of the first semiconductor layer and the second semiconductor layer and between the first semiconductor layer and the third semiconductor layer. . 20. The method of claim 19,
The step of forming at least one semiconductor layer of the second semiconductor layer and the third semiconductor layer includes a step of forming a lightly doped semiconductor layer and a step of forming a high concentration doped semiconductor layer on the lightly doped semiconductor layer. Method for manufacturing a solar cell, characterized in that. Forming a second semiconductor layer on an upper surface of the first semiconductor layer by doping a dopant on one surface of the semiconductor wafer;
Forming an anti-reflection layer on the second semiconductor layer;
Forming a first electrode on the anti-reflection layer;
Forming a second electrode on the other surface of the first semiconductor layer; And
Performing a heat treatment to allow the first electrode to penetrate the antireflection layer and penetrate the second semiconductor layer, and the second electrode penetrates into the other surface of the first semiconductor layer to form a third semiconductor layer. Made, including
In this case, the step of forming the first electrode includes a step of pattern-forming a first metal layer by a sputtering process using a first mask having a predetermined pattern and a step of pattern-forming a second metal layer on the first metal layer. Method for producing a solar cell, characterized in that made. 35. The method of claim 34,
The step of patterning the second metal layer is a manufacturing method of a solar cell, characterized in that the sputtering process using the first mask. 36. The method of claim 35,
The second metal layer is a solar cell manufacturing method, characterized in that formed in the same pattern as the first metal layer. 35. The method of claim 34,
The process of forming the pattern of the second metal layer is a manufacturing method of a solar cell, characterized in that consisting of an electroless plating process. 39. The method of claim 37,
The second metal layer is a solar cell manufacturing method, characterized in that the crystal structure is different from the first metal layer. 39. The method of claim 37,
The second metal layer is a solar cell manufacturing method, characterized in that formed to cover the side and the top surface of the first metal layer.

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