KR20130021932A - Nitride semiconductor device - Google Patents

Abstract

PURPOSE: A nitride semiconductor device is provided to improve luminous efficiency by increasing the density of holes inputted to an active layer. CONSTITUTION: An active layer is formed between an n-type nitride semiconductor layer and a p-type nitride semiconductor layer(106). The active layer is formed by alternatively laminating a quantum well layer(103b) and a quantum barrier layer(103a). An electron blocking layer(105) is formed between the active layer and the p-type nitride semiconductor layer. A hole collector layer is formed between the active layer and the electron blocking layer and includes a first layer(104a) and a second layer(104b) with higher bandgap energy than the bandgap energy of the quantum well layer. The first layer and the second layer are alternatively laminated.

Description

Nitride Semiconductor Device

The present invention relates to a nitride semiconductor device.

In general, nitride semiconductors are widely used in green or blue light emitting diodes (LEDs) or laser diodes (LDs), which are provided as light sources in full-color displays, image scanners, various signal systems, and optical communication devices. Such a nitride semiconductor device can be provided as a light emitting device having an active layer emitting a variety of light, including blue and green using the recombination principle of electrons and holes.

After such a nitride light emitting device (LED) has been developed, many technological advances have been made, and the range of its use has been expanded, and thus, many studies have been conducted as general lighting and electric light sources. In particular, in the past, nitride light emitting devices have been mainly used as components applied to mobile products of low current / low power, but recently, their application ranges are gradually expanded to high current / high power fields.

1 is a cross-sectional view showing a general nitride semiconductor device. Referring to FIG. 1, a general nitride semiconductor device 10 includes a substrate 11, an n-type nitride semiconductor layer 12, an active layer 13, and a p-type nitride semiconductor layer 15, and the active layer 13 And an electron blocking layer (EBL) 14 between the p-type nitride semiconductor layer 15. The p-type electrode 16b is formed on the mesa-etched p-nitride semiconductor layer 15, and the n-type electrode 16a is formed on the exposed top surface of the n-type nitride semiconductor layer 12. The electron blocking layer 14 may improve electron recombination efficiency of the carrier in the active layer 13 by preventing electrons having higher mobility than holes from overflowing the p-type nitride semiconductor layer 15. It is adopted. However, the electron blocking layer 14 may function as a barrier not only for electrons but also for holes, and thus, the concentration of holes entering the active layer 13 beyond the electron blocking layer 14 may be lowered. .

One object of the present invention is to provide a nitride semiconductor light emitting device capable of improving luminous efficiency by increasing the concentration of holes entering the active layer.

In order to solve the above problems, one embodiment of the present invention,

an active layer formed between an n-type nitride semiconductor layer, a p-type nitride semiconductor layer, the n-type and p-type nitride semiconductor layers, and a quantum well layer and a quantum barrier layer alternately stacked with each other, the active layer and the p An electron blocking layer formed between the type nitride semiconductor layer and the active layer and the electron blocking layer, the energy level of the p-type nitride based on the first layer and the valence band having a higher bandgap energy than the quantum well layer And a hole collector layer having a second layer of In _x Ga _{1 - x} N (0 <x ≤ 1) that is higher than the doping level of the semiconductor layer and lower than the first layer, and away from the active layer. The nitride semiconductor device is disposed in the order of the first and second layers with respect to the direction.

In one embodiment of the present invention, the first and second layers may be alternately stacked alternately with each other.

In this case, the first layer may contact the electron blocking layer.

In addition, the hole collector layer may include a plurality of second layers, and the second layer may have a lower energy level based on a valence band as the second layer is closer to the electron blocking layer.

In addition, the hole collector layer may include a plurality of second layers, and the plurality of second layers may be thicker as they are closer to the electron blocking layer.

In an embodiment of the present invention, the energy level of the second layer may change with a slope based on the valence band.

In this case, the energy level of the second layer may decrease toward the direction in which the electron blocking layer is located based on the valence band.

In one embodiment of the present invention, the first layer may be made of GaN.

In one embodiment of the present invention, the electron blocking layer may be made of a material having a higher band gap energy than the active layer and the hole collector layer.

In one embodiment of the present invention, the first layer may be in contact with the quantum well layer.

In one embodiment of the present invention, the first layer may be thinner than the second layer.

In one embodiment of the present invention, the second layer may be formed of In _x Ga _{1 - x} N (0.08 ≦ x ≦ 0.1).

According to one embodiment of the present invention, a nitride semiconductor light emitting device capable of improving light emission efficiency may be obtained by increasing the concentration of holes entering the active layer.

1 is a cross-sectional view showing a general nitride semiconductor device.
FIG. 2 is a cross-sectional view illustrating a nitride semiconductor device according to one embodiment of the present invention, and FIG. 3 is an enlarged view of a region indicated by A in FIG. 2. 4 schematically shows the valence band energy level in the region shown in FIG. 3.
FIG. 5 schematically shows the energy level of the hole collector layer of the modified example in the embodiment of FIG. 2.
6 is a configuration diagram schematically showing an example of use of a semiconductor light emitting device proposed in the present invention.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings.

However, the embodiments of the present invention can be modified into various other forms, and the scope of the present invention is not limited to the embodiments described below. Further, the embodiments of the present invention are provided to more fully explain the present invention to those skilled in the art. Accordingly, the shape and size of elements in the drawings may be exaggerated for clarity.

FIG. 2 is a cross-sectional view illustrating a nitride semiconductor device according to one embodiment of the present invention, and FIG. 3 is an enlarged view of a region indicated by A in FIG. 2. 4 schematically shows the valence band energy level in the region shown in FIG. 3.

First, referring to FIG. 2, the nitride semiconductor device 100 according to the present embodiment includes a substrate 101, an n-type nitride semiconductor layer 102, an active layer 103, an electron blocking layer 105, and a p-type nitride semiconductor. A layer 106, and a hole collector layer 104 is formed between the active layer 103 and the electron blocking layer 105. The n-type electrode 107a may be formed on the exposed surface of the n-type nitride semiconductor layer 102, and the p-type electrode 107b may be formed on the upper surface of the p-type nitride semiconductor layer 106. However, in this specification, terms such as 'top', 'bottom', and 'side' are based on the drawings and may actually vary depending on the direction in which the device is disposed. Although not shown, an ohmic contact layer made of a transparent electrode material or the like may be formed between the p-type nitride semiconductor layer 106 and the p-type electrode 107b. Meanwhile, in the present embodiment, the structure in which the n-type and p-type electrodes 107a and 107b are arranged to face the same direction is illustrated, but the electrodes may be arranged in other forms. For example, a device having a so-called vertical structure in which n-type and p-type electrodes are formed to face each other after removing the substrate 101 may be employed.

The substrate 101 may be provided as a substrate for growing a semiconductor, and may be formed of an electrically insulating and conductive material such as sapphire, Si, SiC, MgAl ₂ O ₄ , MgO, LiAlO ₂ , LiGaO ₂ , GaN, or the like. In this case, the most preferable one can be used is sapphire having electrical insulation, and sapphire is Hexa-Rhombo R3c symmetry, and the lattice constants of c-axis and a-direction are 13.001Å and 4.758Å, respectively. And a C (0001) plane, an A (1120) plane, an R (1102) plane, and the like. In this case, the C-plane is relatively easy to grow the nitride film, and is stable at high temperature, and thus is mainly used as a substrate for nitride growth. Meanwhile, a material suitable for use as the substrate 101 may include a Si substrate, and mass productivity may be improved by using a Si substrate that is more suitable for large diameters and has a relatively low cost. Further, a buffer layer for improving the crystal quality of the nitride semiconductor single crystal grown on the substrate 101 may be grown, for example, a buffer layer made of undoped GaN, AlGaN, or the like.

The n-type and p-type nitride semiconductor layers 102 and 106 have Al _x In _y Ga _(1-xy) N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ doped with n-type and p-type impurities, respectively _). x + y ≤ 1). active layer 103 formed between the n-type and p-type nitride semiconductor layer (102, 106) emits light having a predetermined energy by electron-hole recombination, In such that the band gap energy is adjusted to the indium content of _a Ga _{1 - a} N (0 ≦ a ≦ 1). In this case, as shown in FIG. 3, the active layer 103 has a multi-quantum well (MQW) structure in which a quantum barrier layer 103a and a quantum well layer 103b are alternately stacked, for example, The quantum well layer 103b may be made of GaN, and a multi-quantum well structure made of InGaN (In and Ga contents may vary) may be used. Meanwhile, the n-type and p-type semiconductor layers 102 and 106 and the active layer 104 constituting the light emitting structure may include metal organic chemical vapor deposition (MOCVD), hydrogenation vapor phase epitaxy, ' HVPE '), Molecular Beam Epitaxy (MBE) and the like can be grown using processes known in the art.

The electron blocking layer 105 may block electrons having a higher mobility than the holes from overflowing the active layer 103. To this end, it may be made of a material having a higher band gap energy than the active layer 103 or the hole collector layer 104, and specifically, may be made of a material such as Al _x Ga _{1 - x} N (0≤x≤1). . In this case, the band gap energy of the electron blocking layer 105 may be appropriately adjusted by the aluminum content. However, as described above, the electron blocking layer 105 increases the recombination probability in the active layer 103 by blocking the overflow of electrons, but may also function to block the injection of holes.

In this embodiment, the hole collector layer 104 is employed between the active layer 103 and the electron blocking layer 105 in order to reduce the hole blocking function of the electron blocking layer 105 to improve the hole injection efficiency. The hole collector layer 104 provides an appropriate energy level condition to increase the probability that holes injected from the p-type nitride semiconductor layer 106 can be injected into the active layer 103 by tunneling or crossing the electron blocking layer 105. . Referring to FIG. 4 together, the hole collector layer 104 has a structure including a first layer 104a and a second layer 104b, and includes a first and a second reference to a direction away from the active layer 103. It is arranged in the order of the two layers 104a and 104b. In this case, the first layer 104a and the second layer 104b are alternately stacked alternately with each other, except that the first layer 104a and the second layer 104b are each 1 in the hole collector layer 104. Only one may be provided. As shown in FIG. 4, the first layer 104a may contact the quantum well layer 103b and the electron blocking layer 105 of the active layer 103 to form an interface. That is, when the first layer 104a and the second layer 104b are repeatedly stacked, the outermost layer may be the first layer 104a, which has a relatively In content as described below. By forming a small (or not containing) first layer 104a, crystallinity can be improved.

The first layer 104a may be formed of a material having a higher band gap energy than that of the quantum well layer 103b, for example, InGaN having a lower In content than GaN or the quantum well layer 103b. In this case, the first layer 104a may be made of the same material as the quantum barrier layer 103a. As will be described later, since the second layer 104b is formed of In _x Ga _{1 - x} N (0 <x ≤ 1) containing a predetermined In to facilitate the injection of holes, the hole collector layer 104 is formed. If only the second layer 104b is configured, crystallinity may be lowered. In the present embodiment, the first layer 104a having relatively high crystallinity is disposed between the interface between the quantum well layer 103b and the electron blocking layer 105 or between the plurality of second layers 104b. Degradation of the crystallinity of the collector layer 104 and the semiconductor layers grown thereon is minimized.

The second layer 104b has a lower energy level Ev than the quantum well layer 103b and a higher energy level Ev than the quantum barrier layer 103a. In this case, the energy level Ev described in the present embodiment is based on a valence band. Further, the energy level of the second layer 104b is higher than the doping level of the p-type nitride semiconductor layer 106, and the concentration of holes tunneling the electron blocking layer 105 may be increased by the energy level conditions. . 4 illustrates a case where Mg is used as the p-type impurity, and it is assumed that the p-type nitride semiconductor layer 105 and the quantum barrier layer 103a are made of the same material, for example, GaN. The energy level difference ΔEv of 104b should be greater than the energy level value raised by Mg doping. In view of this, it is preferable that ΔEv is greater than about 170 meV. In order to perform the hole injection enhancement function, the second layer 104b is formed of In _x Ga _{1- x} N (0 <x ≤ 1), and the energy level may be appropriately adjusted by adjusting the indium content. For example, the second layer 104b may be formed of In _x Ga _{1 - x} N (0.08 ≦ x ≦ 0.1) as a condition for satisfying the above band gap energy and energy level while preventing a decrease in crystallinity.

Meanwhile, since the first layer 104a may be a barrier to holes due to relatively high band gap energy, the thickness d1 of the first layer 104a may be the thickness d2 or d3 of the second layer 104b. It is desirable to be thinner than), for example, the first layer 104a may have a thickness of about 5 nm or less. In the case of the second layer 104b, it is preferable that the second layer 104b is formed relatively thick in order to obtain a sufficient degree of hole injection performance. However, the second layer 104b may have a thickness of about 20 nm or less in consideration of crystallinity. In this case, as shown in FIG. 4, the closer to the electron blocking layer 105, the thicker the second layer 104b is, which is disposed relatively close to the p-type nitride semiconductor layer 106. The second layer 104b is formed thick to improve the hole injection efficiency. In addition, in terms of energy level, the closer the second layer 104b is to the electron blocking layer 105, the lower the energy level based on the valence band. By the sequential structure of the energy level, the amount of holes injected from the p-type nitride semiconductor layer 106 into the active layer 103 may be further increased.

As a structure for further improving the hole injection efficiency, a modified hole collector layer will be described. FIG. 5 schematically shows the energy level of the hole collector layer of the modified example in the embodiment of FIG. 2. Referring to FIG. 5, the hole collector layer 104 is the same as the embodiment of FIG. 2 in that the first layer 104a and the second layer 104b are alternately stacked. The difference is that the energy level of the layer 104b is varied. Specifically, the energy level of the second layer 104b is changed with a slope based on the valence band, and decreases toward the direction in which the electron blocking layer 105 is located. This change in energy level may be obtained by adjusting the In content of the second layer 104b. As in the present embodiment, when the energy level of the second layer 104b is adopted in such a manner as to decrease inclined toward the direction in which the electron blocking layer 105 is located, the holes pass over the hole collector layer 104 and the active layer 103. May be further increased.

On the other hand, the semiconductor light emitting device having the above structure can be applied in various fields. 6 is a configuration diagram schematically showing an example of use of a semiconductor light emitting device proposed in the present invention. 6, the dimming device 400 includes a light emitting module 401, a structure 404 on which the light emitting module 401 is disposed, and a power supply unit 403, and the light emitting module 401 includes the present invention. One or more semiconductor light emitting devices 402 obtained in the manner proposed by the present invention may be disposed. In this case, the semiconductor light emitting device 402 may be mounted on the module 401 or may be provided in a package form. The power supply unit 403 may include an interface 405 for receiving power and a power control unit 406 for controlling the power supplied to the light emitting module 401. In this case, the interface 405 may include a fuse that blocks overcurrent and an electromagnetic shielding filter that shields an electromagnetic interference signal.

When the AC power is input to the power source, the power control unit 406 may include a rectifying unit for converting AC into DC and a constant voltage control unit for converting into a voltage suitable for the light emitting module 401. If the power source itself is a direct current source (for example, a battery) having a voltage suitable for the light emitting module 401, the rectifying unit or the constant voltage control unit may be omitted. In addition, when the light emitting module 401 itself employs an element such as an AC-LED, AC power may be directly supplied to the light emitting module 401, and in this case, the rectifier or the constant voltage controller may be omitted. In addition, the power control unit may control the color temperature and the like to enable the illumination of the human emotion. In addition, the power supply unit 403 may include a feedback circuit device for performing a comparison between the light emission amount of the light emitting element 402 and a predetermined light amount, and a memory device in which information such as desired luminance and color rendering properties are stored.

The dimming device 400 may be used as a backlight unit used in a display device such as a liquid crystal display device having an image panel, an indoor lighting device such as a lamp, a flat panel light, or an outdoor lighting device such as a street lamp, a signboard, a sign, and the like. It can be used in various transportation lighting devices, such as automobiles, ships, aircrafts, and the like. Furthermore, it may be widely used in home appliances such as TVs and refrigerators, and medical devices.

The present invention is not limited by the above-described embodiments and the accompanying drawings, but is intended to be limited only by the appended claims. It will be apparent to those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. something to do.

101: substrate 102: n-type nitride semiconductor layer
103: active layer 104: hole collector layer
105: electron blocking layer 106: p-type nitride semiconductor layer
107a and 107b: n-type and p-type electrodes 103a: quantum barrier layer
103b: quantum well layer 104a, 104b: first and second layers

Claims (12)

an n-type nitride semiconductor layer;
p-type nitride semiconductor layer;
An active layer formed between the n-type and p-type nitride semiconductor layers, wherein an quantum well layer and a quantum barrier layer are alternately stacked;
An electron blocking layer formed between the active layer and the p-type nitride semiconductor layer; And
The energy level is formed between the active layer and the electron blocking layer, and the energy level is higher than the doping level of the p-type nitride semiconductor layer based on the first layer and the valence band of the bandgap energy higher than that of the quantum well layer. And a hole collector layer having a second layer made of In _x Ga _{1 - x} N (0 <x ≤ 1) lower than the first layer, wherein the first and second holes are located relative to a direction away from the active layer. A nitride semiconductor device, characterized in that arranged in the order of the layer.
The method of claim 1,
The first and the second layer is a nitride semiconductor device, characterized in that stacked alternately with each other.
The method of claim 2,
And the first layer is in contact with the electron blocking layer.
The method of claim 2,
The hole collector layer includes a plurality of second layers, and the plurality of second layers are closer to the electron blocking layer, and the energy level of the nitride semiconductor device is lower based on the valence band.
The method of claim 2,
The hole collector layer includes a plurality of second layers, and the plurality of second layers are thicker as they are closer to the electron blocking layer.
The method of claim 1,
The second layer is a nitride semiconductor device, characterized in that the energy level is changed with a slope relative to the valence band.
The method according to claim 6,
The second layer is a nitride semiconductor device, characterized in that the energy level is reduced toward the direction of the electron blocking layer is located on the basis of the valence band.
The method of claim 1,
The first layer is nitride semiconductor device, characterized in that made of GaN.
The method of claim 1,
The electron blocking layer is a nitride semiconductor device, characterized in that made of a material having a higher band gap energy than the active layer and the hole collector layer.
The method of claim 1,
And the first layer is in contact with the quantum well layer.
The method of claim 1,
The first layer is nitride semiconductor device, characterized in that the thickness is thinner than the second layer.
The method of claim 1,
The second layer is nitride semiconductor device, characterized in that consisting of In _x Ga _{1 - x} N (0.08 ≤ x ≤ 0.1).

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