KR20120138566A - Method for managing buffer in multi layer cell flash memory and apparatus thereof - Google Patents
Method for managing buffer in multi layer cell flash memory and apparatus thereof Download PDFInfo
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- KR20120138566A KR20120138566A KR1020110058135A KR20110058135A KR20120138566A KR 20120138566 A KR20120138566 A KR 20120138566A KR 1020110058135 A KR1020110058135 A KR 1020110058135A KR 20110058135 A KR20110058135 A KR 20110058135A KR 20120138566 A KR20120138566 A KR 20120138566A
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- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1666—Error detection or correction of the data by redundancy in hardware where the redundant component is memory or memory area
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
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- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
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Abstract
Description
The present invention relates to a solid state disk (SSD) storage, and more particularly, to a method of managing a buffer in a multi-layer cell (MLC) flash memory and a storage device thereof.
Recently, new storage markets are increasingly being utilized with flash memory. Solid state disk (SSD) storage is a storage device that increases the capacity and data transfer speed of a disk by connecting a plurality of flash memory chips to a single SSD controller. The SSD storage device is expected to replace the existing HDD storage device due to its price and speed advantages. In addition, SSD storage devices are devices in which a plurality of flash memories are attached to a parallel flash bus to increase capacity and data access speed.
The SSD storage device has a FTL (Flash Translation Layer) layer therein, and converts a logical block address (LBA) of user data sent from a host into a physical address of a flash memory. This conversion process is called address mapping. In order to perform the address mapping, the FTL stores user data and logical block addresses simultaneously in a physical page of a flash memory.
The flash memory device may be classified into a single level cell (SLC) flash memory and a multi level cell (MLC) flash memory. Single cell flash memory devices store, for example, one bit per memory cell. Multi-cell (MLC) flash memory devices, on the other hand, store more than one bit per memory cell (ie, each cell has four or more programmable states). In a multi-cell flash memory device, the amount of current or voltage is detected instead of merely detecting the presence or absence of current or voltage. In a multi-cell flash memory device, at least three threshold levels are used to define four or more different threshold states.
On the other hand, the multi-layer cell (MLC) flash memory mainly used in SSD storage device can store more than two bits of data in one cell, it can store a large amount of data at a low price. The two bits of data stored in one cell are paired with each other and are called a sibling page. This sibling page is stored in the logical block address (LSB), and then the least significant bit (LSB) is first stored in the flash memory, and then the most significant bit (MSB) is stored. However, when the most significant bit (MSB) is stored, if a power failure or a program fail occurs, not only the MSB but also the data of the previously stored LSB may be damaged.
The present invention provides a method of managing a buffer to prevent corruption and recover damaged data when data corruption occurs in a sibling page in a multi-cell flash memory. That is, the present invention is a multi-layer cells that store more than two bits of data in one memory (MLC: Multi-level Cell) in the SSD storage device using a flash memory, when data is written to the flash memory program fail (program fail), the power Data corruption may occur due to a phenomenon such as power fail or reset. At this time, not only the page currently written to the flash memory but also the data of the sibling page using a cell shared may cause loss (or damage). The present invention is to solve this technical problem, and relates to a buffer management method considering data corruption of a sibling page and a method for recovering data of a sibling page.
In order to achieve the above object, the buffer management method of a multi-layer cell flash memory according to the present invention,
As a buffer management method of a multi-layer cell (MLC) flash memory,
Store the data stored in the buffer into the flash memory;
When storing the data into a flash memory, setting a valid data pointer using a sibling distance;
Detecting whether data of the sibling page is damaged due to corruption in data stored in the flash memory;
When it is detected that the data of the sibling page is damaged due to the corruption of the data, the corrupted data and the data of the sibling page are recovered using the set valid data pointer.
Preferably, the valid data pointer is
Calculate using the formula "Vaild Data Pointer (VP) = Flush Pointer (FP)-Sibling Distance (SD)". At this time,
The flush pointer has a value of the first address indicating the data to be written to the flash memory among the valid data stored in the buffer,
The sibling distance is a distance between sibling pages in a flash memory structure of a multi-layer cell.
Preferably, when the multi-layer cell (MLC) flash memory has a parallel structure composed of a plurality of chips,
The valid data pointer is
Calculated using the formula "Vaild Data Pointer (VP) = Flush Pointer (FP)-Sibling Distance * Number of Chips".
Preferably, in the step of recovering data of the sibling page
Copy data of pages stored before the sibling page to another block of the flash memory;
The data of the sibling page stored in the buffer indicated by the valid data pointer is copied to the other block.
In addition, in order to achieve the above object, the buffer management method of a multi-layer cell flash memory according to the present invention,
As a buffer management method of a multi-layer cell (MLC) flash memory,
Storing the first data of the sibling page from the buffer to the flash memory;
Calculate a sibling distance from the sibling page;
Setting a valid data pointer to differ by the calculated sibling distance to prevent the first data of the sibling page stored in the buffer from being overwritten with other data;
When the second data of the sibling page is stored in the buffer to the flash memory, detecting whether the second data of the sibling page has been damaged;
When it is detected that the first data of the sibling page is also damaged due to the corruption of the second data of the sibling page, the set valid data pointer indicates first data of the sibling page and the sibling page of the sibling page. And recovering second data from the buffer to the flash memory.
In addition, in order to achieve the above object, the multi-layer cell flash memory storage device according to the present invention,
In the multi-layer cell (MLC) flash memory storage device comprising a host, a buffer, and a flash memory,
Set a valid data point to differ by a sibling distance such that data of the sibling page is not overwritten;
Detecting whether data corruption of the sibling page occurs when data of the sibling page is stored in the flash memory;
And detecting a corruption of data of the sibling page when the data corruption of the sibling page is detected, using the valid data point to restore the data of the sibling page from the buffer to the flash memory.
According to the present invention, in an SSD storage device using a multi-cell (MLC) flash memory, an effective data pointer differs by a sibling distance in order to prevent data corruption of a sibling page and to recover data of a damaged sibling page. By defining and managing the buffer using the same, there is an effect of preventing data loss due to a host write operation to the data of the sibling page, and an effect of increasing the reliability of the flash memory device.
1 is an example of a structure of a multilayer cell (MLC) flash memory.
FIG. 2 is a diagram illustrating a relationship between sibling pages of an MLC flash memory K9LBG08U0M in which two bits are stored in one cell.
3 is a diagram illustrating a conventional buffer management method of an SSD storage device.
4 is a block diagram illustrating a method of managing a buffer without data corruption of a sibling page in an SSD storage device according to an embodiment of the present invention.
5 is a flowchart illustrating a method of managing a buffer in an SSD storage device according to an embodiment of the present invention.
6 is a block diagram illustrating a method of recovering data in case of data corruption, according to an embodiment of the present invention.
FIG. 7 is a block diagram illustrating a buffer management policy considering a parallel bus structure in an SSD storage device having a flash memory structure of a multi-layer cell according to an embodiment of the present invention.
The present invention is applied to a memory storage device. However, the present invention is not limited thereto and may be applied to a technical field to which the technical spirit of the present invention may be applied.
As the inventive concept allows for various changes and numerous embodiments, particular embodiments will be illustrated in the drawings and described in detail in the written description. It should be understood, however, that the invention is not intended to be limited to the particular embodiments, but includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention.
Terms including ordinal numbers such as first and second may be used to describe various components, but the components are not limited by the terms. The terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as a second component, and similarly, the second component may also be referred to as a first component. The term " and / or " includes any combination of a plurality of related listed items or any of a plurality of related listed yields.
When an element is referred to as being "connected" or "connected" to another element, it may be directly connected or connected to the other element, but other elements may be present in between. On the other hand, when an element is referred to as being "directly connected" or "directly connected" to another element, it should be understood that there are no other elements in between.
The terminology used in this application is used only to describe a specific embodiment and is not intended to limit the invention. Singular expressions include plural expressions unless the context clearly indicates otherwise. In this application, the terms "comprise" or "have" are intended to indicate that there is a feature, number, step, operation, component, part, or combination thereof described on the specification, and one or more other features. It is to be understood that the present disclosure does not exclude the possibility of the presence or the addition of numbers, steps, operations, components, components, or a combination thereof.
Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art. Terms such as those defined in the commonly used dictionaries should be construed as having meanings consistent with the meanings in the context of the related art and shall not be construed in ideal or excessively formal meanings unless expressly defined in this application. Do not.
The terminal according to the present invention refers to all devices capable of performing the technical features of the present invention. That is, a mobile communication terminal (for example, a pacemaker, a vending machine, a power meter, an air pollution meter, etc.) capable of performing an MTC service function according to the present invention is a user equipment (UE), and other human-oriented devices. (E.g. mermaids, cell phones, cell phones, DMB phones, game phones, camera phones, smartphones, etc.), and other notebooks, desktop computers, laptop computers, palmtop computers, PDAs (personal digital assistant), white goods, etc., is a comprehensive meaning.
Hereinafter, technical terms used in the description of the present invention will be described.
Flash memory may be classified into a single level cell (SLC) and a single level cell (SLC) according to its structure.
Single cell flash memory is a structure that stores one bit in one cell, and multi-level cell (MLC) flash memory has two or more bits in one cell (for example, Most Significant Bit (MSB)). ) And the least significant bit (LSB).
In the sibling page, two bits of data stored in one cell of a multi-cell (MLC) flash memory device are paired with each other. It is called a sibling page.
The sibling distance refers to the interval between sibling pages.
The host write pointer points to the first address of the free space in the buffer.
The flush pointer points to the first address of valid data stored in the buffer that must be written to flash memory.
The valid data pointer points to the address of valid data among the data stored in the buffer.
"Host write operation" refers to temporarily storing data in a buffer.
The "flush operation" refers to storing data temporarily stored in a buffer in flash memory.
A ring buffer, also known as a circular buffer, refers to a buffer whose structure is to overwrite the data at the address of the first buffer when sequentially filled with data in the buffer. Pointers are required. Pointer to the beginning of the data, a pointer to the end of the data, and a pointer to the data.
The basic concept of the present invention is to recover the corrupted data when the data of the sibling page, which may occur due to a program failure (or a power failure), etc. in the multilayer cell memory structure is damaged; Set a valid data pointer to differ by a sibling distance; By setting the valid data pointer to be different by the bling distance, the overwrite operation is prevented from occurring by the host write operation in the corresponding region of the buffer where the data of the sibling page is stored; In addition, when flushing the data stored in the buffer into the flash memory, to monitor whether the data of the sibling page is damaged due to a program failure; When the data of the sibling page is corrupted, recover the data of the damaged sibling page by using a valid data pointer that points to the address of the buffer (that is, the address of the buffer where the data of the sibling page is stored) so that it differs by the sibling distance. It is.
In order to implement the basic concept of the present invention, the present invention newly defines the following equations (1) and (2) to obtain a "valid data pointer".
Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings, and in describing the present invention with reference to the accompanying drawings, the same or corresponding elements are denoted by the same reference numerals and duplicated thereto. The description will be omitted.
1 is an example of a structure of a multilayer cell (MLC) flash memory.
As shown in FIG. 1, a flash memory generally consists of hundreds of pages and thousands of blocks. The block is composed of a plurality of pages. The data is written in the flash memory in units of pages, but the data is deleted in blocks.
In addition, the flash memory of FIG. 1 has a ring buffer structure and sequentially writes them. That is, a data write operation is performed in increments of pages such as Page0, Page1, and Page2.
The multi-layer cell (MLC) flash memory of FIG. 1 stores two or more bits (eg, Most Significant Bit (MSB) and Least Significant Bit (LSB)) in one cell. In this case, one cell is, for example, 'Page 0' and 'Page4', and as another example, 'Page 2' and 'Page 6' correspond to the same cell.
That is, as shown in FIG. 1, the LSB of two bits (that is, data consisting of two bits) is first written to 'Page 0', and then the MSB of two bits is written to 'Page 4'. Therefore, 'Page 0' and 'Page4' corresponding to the same cell are called a sibling page or a paired page. In addition, 'Page 2' and 'Page 6' also correspond to the same cell, and thus, a sibling page.
FIG. 2 is a diagram illustrating a relationship between sibling pages of an MLC flash memory K9LBG08U0M in which two bits are stored in one cell.
2 shows the address of a sibling page (or paired page) of data stored in the same cell in hexadecimal. In addition, a sibling distance may be obtained through the sibling page. For example, in FIG. 2, the '00h' page and the '04h' page are sibling pages, and the sibling distance between '00h' and '04h' is four. In addition, the sibling distance between the '02h' page and the '08h' page is 6.
As shown in Figs. 1 and 2, the MLC flash memory stores two or more bits of data in one cell. In addition, data is written in the MLC flash memory according to sequential writes, in which data is first written to the LSB page, and then to the MSB page.
3 is a diagram illustrating a conventional buffer management method of an SSD storage device. In FIG. 3, "host write operation" refers to temporarily storing data in a buffer, and "flush operation" refers to storing data temporarily stored in a buffer into a flash memory.
A description with reference to FIG. 3 is as follows. When the
When a "host write operation" is performed, the host write pointer points to the first address of the free space in the buffer 30 (ie, the host write pointer in Figure 3 points to 'buffer page 9') and also the host write pointer. Increases by the amount of data recorded by the
The 'flush pointer' indicates the first address of data to be written to the flash memory among the valid data stored in the buffer 30. That is, in FIG. 3, the 'flush pointer' points to the 'buffer page 6' in the buffer 30. because,
The valid data pointer indicates an address of valid data among the data stored in the buffer 30. That is, in FIG. 3, if it is assumed that 'buffer page 9' to 'buffer page 5' of the buffer 30 is empty, the 'valid data pointer' indicates 'buffer page 6' in the buffer 30.
Meanwhile, the
"Flush operation" is a page of buffer 30 pointed to by the flush write pointer (ie,
As shown in FIG. 3, "Data K-1" to "Data K + 4" stored in "
On the other hand, in this situation, while a series of valid data currently stored in the buffer, that is, 'DataK + 5' to 'DataK + 7' is being written to 'page 6' to 'page 8' of the flash memory 40, For example, suppose that the
At this time, it is described whether the damaged data (that is, Data K + 1 and Data K + 7) during the writing to the flash memory 40 can be recovered from the data stored in the buffer 30. Among the data currently recorded in the buffer 30, 'Data K + 7' exists in the 'buffer page 8' of the buffer 30. However, 'Data K + 1' stored in the 'buffer page 2' in the buffer 30 no longer exists in the 'buffer page 2' due to the "overwrite operation" of the
The present invention addresses these technical problems. That is, the present invention proposes a buffer management policy (method) for preventing data corruption of sibling pages in a multi-layer cell (MTC) flash memory. The basic idea of the present invention is to: define a new address (location) to which a 'valid data pointer' points when flushing data in a buffer to flash memory; Data of the sibling page corresponding to data flushed from the buffer to the flash memory is overwritten by the host; Prevent the corresponding data of the sibling page from being deleted; During the flush operation from the buffer to the flash memory, the buffer of the SSD storage device having a multi-layer cell capable of recovering data deleted due to program failure or the like from the buffer is managed.
In order to implement the present invention, the 'valid data pointer' according to the present invention is defined as Equation 1:
In addition, by managing the buffer 30 of the
Hereinafter, specific embodiments of the present invention will be described with reference to FIGS. 4 to 7.
4 is a block diagram illustrating a method of managing a buffer without data corruption of a sibling page in an SSD storage device according to an embodiment of the present invention.
5 is a flowchart illustrating a method of managing a buffer in an SSD storage device according to an embodiment of the present invention.
In FIG. 4, the
In FIG. 4, in the buffer 30, data stored in 'buffer page 0' and 'buffer page 1' (that is, 'Data K-1' and 'Data K') is assumed to be in a state in which a flush operation is completed in the flash memory. do. In the buffer 30, data received from the
In this premise state, the "host write pointer" points to the first address (i.e., buffer page) at which data can be written, and therefore to "
In the precondition as described above, an embodiment of the present invention will be described with reference to FIGS. 4 and 5. In FIG. 4, under the control of the
Thereafter, under the control of the
Meanwhile, when the flush operation of the S51 process is performed, the
That is, after the flush operation of the S51 process is performed, the
Thus, when data of 'buffer page 8' (i.e., Data K + 7) is flushed to 'page 8' of flash memory 40, the
As in S52, when data of each buffer page written in the buffer 30 is stored in the flash memory 40, the
The
If the
6 is a block diagram illustrating a method of recovering data in case of data corruption, according to an embodiment of the present invention. Hereinafter, an embodiment of the present invention will be described with reference to FIG. 6.
When data corruption occurs at 'block 0' of the flash memory 40, the data is recovered to another block (for example, block 1). In other words, intact data (i.e., Data K-1 and Data K) in 'block 0' is copied to 'page 0' and 'page 1' of 'block 1', respectively. In addition, since the "effective data pointer" currently points to "
FIG. 7 is a block diagram illustrating a buffer management policy considering a parallel bus structure in an SSD storage device having a flash memory structure of a multi-layer cell according to an embodiment of the present invention.
FIG. 7 illustrates a buffer management policy in a structure in which data of the buffer 30 is distributed and stored in a plurality of chips in the
For example, data of 'buffer page 16' (that is, Data K + 15) is damaged due to a program failure or the like during
Thus, the " effective data pointer " points to 'buffer page 3' in the buffer 30. Here, the data of 'buffer page 3' (i.e., Data K + 2) stores corrupted data (i.e., 'Data K + 2') of 'page 2' of 'chip 0' of flash memory 40 have. Therefore, through the
Meanwhile, the sibling distance may be set to a case of 4 and a case of 6 as shown in FIG. 2, but for convenience, the sibling distance may be changed according to a page or may be fixed to a maximum value.
In the above-described embodiment of the present invention, the structure of the multi-layer cell flash memory has been described based on a case in which two bits are stored in one cell. This applies as is.
On the other hand, the method according to the invention described so far may be implemented in software, hardware, or a combination thereof. For example, a method in accordance with the present invention may be stored in a storage medium (e.g., mobile terminal internal memory, flash memory, hard disk, etc.) ≪ / RTI > in a software program that can be executed by a computer.
In the above, the present invention has been described with reference to the embodiments shown in the drawings, but this is merely exemplary, and those skilled in the art may realize various modifications and other equivalent embodiments therefrom. I will understand. Accordingly, the true scope of the present invention should be determined by the technical idea of the appended claims.
Claims (8)
Storing the data stored in the buffer into the flash memory;
Setting a valid data pointer using a sibling distance when storing the data to a flash memory;
Detecting whether data of the sibling page is damaged due to corruption of data stored in the flash memory;
And recovering the corrupted data and the data of the sibling page using the set valid data pointer when it is detected that the data of the sibling page is damaged due to the corruption of the data. Buffer management method of cell flash memory.
Equation
Valid Data Pointer (VP) = Flush Pointer (FP)-Sibling Distance (SD)
Is calculated using, where
The flush pointer has a value of the first address indicating the data to be written to the flash memory among the valid data stored in the buffer,
The sibling distance is a distance between sibling pages in a flash memory structure of the multi-layer cell.
The valid data pointer is
Equation
Valid Data Pointer (VP) = Flush Pointer (FP)-Sibling Distance (SD) * Number of Chips
Is calculated using, where
The flush pointer has a value of the first address indicating the data to be written to the flash memory among the valid data stored in the buffer,
The sibling distance is a distance between sibling pages in a flash memory structure of a multi-cell,
And the number of chips is the number of chips included in the flash memory of the multi-layer cell.
Copying data of pages stored before the sibling page to another block of the flash memory;
And copying the corresponding data of the sibling page stored in the buffer indicated by the valid data pointer to the another block.
Storing the first data of the sibling page from the buffer to the flash memory;
Calculating a sibling distance from the sibling page;
Setting a valid data pointer to differ by the calculated sibling distance to prevent the first data of the sibling page stored in the buffer from being overwritten with other data;
When the second data of the sibling page is stored from the buffer to the flash memory, detecting whether the second data of the sibling page has been damaged;
When it is detected that the first data of the sibling page is also damaged due to the corruption of the second data of the sibling page, the set valid data pointer indicates first data of the sibling page and the sibling page of the sibling page. Restoring second data from the buffer to the flash memory.
Equation
Valid Data Pointer (VP) = Flush Pointer (FP)-Sibling Distance (SD)
Is calculated using, where
The flush pointer has a value of the first address indicating the data to be written to the flash memory among the valid data stored in the buffer,
The sibling distance is a distance between sibling pages in a flash memory structure of the multi-layer cell.
Set a valid data point to differ by a sibling distance such that data of the sibling page is not overwritten;
Detecting whether data corruption of the sibling page occurs when data of the sibling page is stored in the flash memory;
And a flash memory controller that controls to recover the data of the sibling page from the buffer to the flash memory using the valid data point when a data corruption of the sibling page is detected. Cell flash memory storage device.
Equation
Valid Data Pointer (VP) = Flush Pointer (FP)-Sibling Distance (SD)
Compute the valid data pointer using
The flush pointer has a value of the first address indicating the data to be written to the flash memory among the valid data stored in the buffer,
And the sibling distance is a distance between sibling pages in the flash memory structure of the multi-layer cell.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9728279B2 (en) | 2013-08-14 | 2017-08-08 | Samsung Electronics Co., Ltd. | Memory system including a memory device, and methods of operating the memory system and the memory device |
| US9886379B2 (en) | 2014-06-27 | 2018-02-06 | Samsung Electronics Co., Ltd. | Solid state driving including nonvolatile memory, random access memory and memory controller |
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2011
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9728279B2 (en) | 2013-08-14 | 2017-08-08 | Samsung Electronics Co., Ltd. | Memory system including a memory device, and methods of operating the memory system and the memory device |
| US10217517B2 (en) | 2013-08-14 | 2019-02-26 | Samsung Electronics Co., Ltd. | Memory system including a memory device, and methods of operating the memory system and the memory device |
| US10714194B2 (en) | 2013-08-14 | 2020-07-14 | Samsung Electronics Co., Ltd. | Memory system including a memory device, and methods of operating the memory system and memory device |
| US9886379B2 (en) | 2014-06-27 | 2018-02-06 | Samsung Electronics Co., Ltd. | Solid state driving including nonvolatile memory, random access memory and memory controller |
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