KR20120130889A - Method for optical proximity correction - Google Patents

Method for optical proximity correction Download PDF

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Publication number
KR20120130889A
KR20120130889A KR1020110048944A KR20110048944A KR20120130889A KR 20120130889 A KR20120130889 A KR 20120130889A KR 1020110048944 A KR1020110048944 A KR 1020110048944A KR 20110048944 A KR20110048944 A KR 20110048944A KR 20120130889 A KR20120130889 A KR 20120130889A
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KR
South Korea
Prior art keywords
layer
overlay
box
optical proximity
opc
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KR1020110048944A
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Korean (ko)
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박정수
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에스케이하이닉스 주식회사
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Priority to KR1020110048944A priority Critical patent/KR20120130889A/en
Publication of KR20120130889A publication Critical patent/KR20120130889A/en

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    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70425—Imaging strategies, e.g. for increasing throughput or resolution, printing product fields larger than the image field or compensating lithography- or non-lithography errors, e.g. proximity correction, mix-and-match, stitching or double patterning
    • G03F7/70433—Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
    • G03F7/70441—Optical proximity correction [OPC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H01L21/0274—Photolithographic processes
    • H01L21/0275—Photolithographic processes using lasers

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Optics & Photonics (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

The optical proximity correction (OPC) method of the present invention includes a first step of preparing an overlay vernier in the form of a box in a box; Exposing a first layer (1 st layer) and a second layer (2 nd layer) under the same DOE condition to secure overlay reference data; A first layer (1 st layer) and second layers (2 nd layer) a third step of exposure to each other to measure the overlay infrastructure field (field overlay infra) values with different DOE condition; And a fourth step of performing an optical proximity correction (OPC) by comparing and analyzing the overlay reference data and the measured infra field overlay value.

Description

Optical proximity correction method {METHOD FOR OPTICAL PROXIMITY CORRECTION}

The present invention relates to an optical proximity correction (OPC) method, and more particularly, it is possible to improve delta distortion by using an overlay vernier in the form of a conventional box in box. Optical proximity correction (OPC) method.

The semiconductor device undergoes a complicated process in which a plurality of exposure masks are overlapped and used, and alignment between the exposure masks used step by step is performed based on a mark of a specific shape.

The mark is called an alignment key or alignment mark, and is used for layer to layer alignment or die to die alignment for one mask.

 A stepper, which is a step and repeat type exposure apparatus used in the manufacturing process of a semiconductor device, is a device in which a stage moves in the X-Y direction and repeatedly moves in alignment.

The stage is aligned with the wafer automatically or manually based on the alignment mark. Since the stage is mechanically operated, alignment errors occur during repeated processes, and when the alignment errors exceed the allowable range, device defects occur.

Meanwhile, as the degree of integration of a device increases, the cell and the measured overlay data values do not match in terms of overlay, and due to the distorted data, When cross section analysis is performed, a misalignment occurs between a cell and actual measured overlay data.

1 illustrates an overlay vernier in the form of a conventional modified box in box.

Referring to FIG. 1, the conventional modified box-in-box overlay vernier 100 has a box-shaped box that includes a mother box 110 having a box shape on the outside and a son 120 having a box shape on the inside. In the (Box in Box) form, the X-axis side of the box has a segment split, and the Y-axis side of the box has a modified form with a pitch split.

This is done by redesigning the X-axis and Y-axis sides of the box in the form of segment splits and pitch splits, which are several nanometers (nm) similar to the size of the cell. To be less affected.

However, the prior art had the following problems.

First, the prior art requires a lot of time and effort due to the modification of the overlay vernier according to the extreme DOE (Design of Experiment) exposure condition and the parallel operation of OPC (Optical Proximity Correction). There was a problem.

Second, the prior art has a problem that the production of the vernier in the reticle for each device layer (Device Layer) is complicated, difficult to manage, the production error occurs.

Third, the prior art has a problem in that the productivity of the mask is increased due to a long time for manufacturing the mask, which increases the time loss.

The technical problem to be solved by the present invention is an optical proximity correction (OPC) method that can improve the delta distortion by using an overlay vernier in the form of a conventional box in box (Box in Box) To provide.

In accordance with another aspect of the present invention, an optical proximity correction (OPC) method includes: a first step of preparing an overlay vernier in the form of a box in box; Exposing a first layer (1 st layer) and a second layer (2 nd layer) under the same DOE condition to obtain overlay reference data; a first layer (1 st layer) and a second layer a third step of exposure to the layers (2 nd layer) with different DOE conditions to measure the overlay infrastructure field (field overlay infra) values; And comparing and comparing the overlay reference data with the measured infra field overlay value to perform optical proximity correction (OPC).

The present invention does not require time and effort due to modification of the overlay vernier, not only secures a depth of focus (DOF) margin, but also enables cell and overlay data. It has the advantage of resolving liver misalignment.

1 illustrates an overlay vernier in the form of a conventional modified box in box.
2 illustrates an overlay vernier in the form of a conventional box-in-box used for optical proximity correction (OPC) of the present invention.
3 is a flowchart illustrating a process of performing an optical proximity correction (OPC) method of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

2 illustrates an overlay vernier in the form of a conventional box-in-box used for optical proximity correction (OPC) of the present invention.

Referring to FIG. 2, the overlay vernier 200 of the present invention has a box in box shape including a mother 210 having a box shape on the outside and a son 220 having a box shape on the inside. .

The mother vernier 210 and the son vernier 220 are formed on the lower (first layer) and the upper layer (second layer), respectively, and the mother 210 and the son 220 are formed by an image capture method. By measuring the distance of), the degree of overlay between the thin film (first layer) already formed on the wafer in the previous step and the thin film (second layer) to be formed in the current step is measured.

Usually, the size of the mother 210 has a size of about 20㎛ ~ 30㎛, the size of the son 220 has a size of about 1㎛ ~ 10㎛ smaller than the mother 210. The overlay vernier 200 is usually formed in the scribe area of the wafer.

According to the present invention, it is possible to stably secure a DOF (Depth of Focus) margin by using an overlay vernier in the form of a conventional box in box, which is advantageous for a process margin. Can be.

3 is a flowchart illustrating a process of performing an optical proximity correction (OPC) method of the present invention.

Hereinafter, referring to FIG. 3, a process of performing Optical Proximity Correction (OPC) using a conventional box-in-box overlay vernier of the present invention will be described in detail.

A first step S10 of preparing an overlay vernier in the form of a conventional box in box to be used for OPC (Optical Proximity Correction) correction is provided.

The first layer (1 st layer) is exposed to the device isolation region (ISO) MK (DOE: Annular), the second layer (2 nd layer) under the barrier gate (BG, barrier gate) MK (DOE: Annular) conditions, Overlay measurement and analysis to obtain overlay reference data (Slay overlay reference data) has a second step (S20).

Here, the DOE (Design of Experiment) exposure condition uses the same Annular mode for the first and second layers, which is a type of modified illumination system that allows the light incident on the reticle to be incident obliquely.

This is different from the fact that different DOE (Design of Experiment) exposure conditions are used for the 1 st layer and the 2 nd layer. This is to secure overlay reference data.

A first layer (1 st layer) The element isolation region (ISO) MK (DOE: Annular ), second layers (2 nd layer) barrier gate (BG, barrier gate) MK ( DOE: Extreme Dipole) conditions, that is, the actual production A third step S30 of exposing under different DOE (Design of Experiment) exposure conditions applied to the process to measure the infra field overlay value of the infra field area of the wafer.

The measurement of the infra field overlay value in the overlay measurement is to analyze the delta distortion value.

On the other hand, the mismatch between the cell and the overlay data due to delta distortion is analyzed by analyzing each term of the following Equation 1 caused by aberration. -match) can be improved.

To Equation 1 shows the Grid Mapper infra field 3 rd order correction model.

[Equation 1]

Figure pat00001

Where x and y are field coordinates, k is a correction factor, dx and dy are displacements for x and y, and linear process corrections are basic corrections for the first order. Infrafield higher order process corrections mean modifications to the 2nd and 3rd order.

Performs OPC (Optical Proximity Correction) by comparing and analyzing the overlay reference data obtained in the second step S20 and the infrastructure field overlay value measured in the third step S30. Has a fourth step (S40).

The model parameters for performing OPC (Optical Proximity Correction) through the fourth step (S40) are summarized in the following [Table 1].

Figure pat00002

Referring to [Table 1], the analysis of the displacement amount of the straightness (magnification), the parallelism (Trapezoid), and the rotation amount (Bow) with respect to the second order, that is, K7 (X) to K12 corresponding to each By taking the value of (X), the offset, taking into account the magnification, the trapezoid, and the rotation of the lens and the scan actuator, can be offset. Correction may be performed.

In addition, the analysis of magnification, accordion, C-shape distortion, and third rd order flow for the third order, that is, K13 (X) to K20 ( Y) to calculate the offset, taking into account the amount of magnification, accordion, distortion, and flow for some or all of the lens and scan actuators. Offset correction can be performed.

In the above description, the technical idea of the present invention has been described with the accompanying drawings. However, the present invention has been described by way of example only, and is not intended to limit the present invention. It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the scope of the present invention.

200: Box in Box overlay vernier
210: mother
220: son

Claims (6)

A first step of preparing an overlay vernier in the form of a box in a box;
Exposing a first layer (1 st layer) and a second layer (2 nd layer) under the same DOE condition to secure overlay reference data;
A first layer (1 st layer) and second layers (2 nd layer) a third step of exposure to each other to measure the overlay infrastructure field (field overlay infra) values with different DOE condition; And
And a fourth step of performing an optical proximity correction (OPC) by comparing and analyzing the overlay reference data and the measured infra field overlay value. ) Way. The method of claim 1, wherein the box in box overlay vernier,
Optical proximity correction (OPC) method characterized in that it comprises a mother having a size of 20㎛ ~ 30㎛ and a sonja having a size of 1㎛ 10㎛. The method of claim 1, wherein the DOE condition of the second step,
And optically exposing the first layer (1 st layer) and the second layer (2 nd layer) using an annular mode. The method of claim 1, wherein the DOE condition of the third step,
Exposing the first layer (1 st layer) using an annular mode, and exposing the second layer (2 nd layer) using an extreme dipole mode. Optical proximity correction (OPC) method. The method of claim 1, wherein the optical proximity correction (OPC),
Optical proximity correction (OPC) method, characterized in that performed by analyzing the infrafield higher order process corrections for the second and third order (order). 6. The method of claim 5,
The correction items for the second order include the amount of displacement for the amount of straightness, the amount of parallelism, the amount of rotation, and the amount of rotation.
The correction items for the third order include optical proximity, which includes the amount of displacement for straightness, accordion, C-shape distortion, and flow. Calibration (OPC) method.
KR1020110048944A 2011-05-24 2011-05-24 Method for optical proximity correction KR20120130889A (en)

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