KR20120110670A - Method for managing cache control record of binary tree structure - Google Patents

Method for managing cache control record of binary tree structure Download PDF

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KR20120110670A
KR20120110670A KR1020110028682A KR20110028682A KR20120110670A KR 20120110670 A KR20120110670 A KR 20120110670A KR 1020110028682 A KR1020110028682 A KR 1020110028682A KR 20110028682 A KR20110028682 A KR 20110028682A KR 20120110670 A KR20120110670 A KR 20120110670A
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South Korea
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node
cache control
tree structure
binary tree
control record
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KR1020110028682A
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Korean (ko)
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이창식
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주식회사 히타치엘지 데이터 스토리지 코리아
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Priority to KR1020110028682A priority Critical patent/KR20120110670A/en
Publication of KR20120110670A publication Critical patent/KR20120110670A/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0893—Caches characterised by their organisation or structure
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
    • G06F16/90—Details of database functions independent of the retrieved data types
    • G06F16/901—Indexing; Data structures therefor; Storage structures
    • G06F16/9027—Trees

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  • Theoretical Computer Science (AREA)
  • Databases & Information Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Data Mining & Analysis (AREA)
  • Memory System Of A Hierarchy Structure (AREA)

Abstract

In the method for managing a cache control record of a binary tree structure according to the present invention, for example, in a device driver in a host, a node key value of a cache control record generated by a cache control operation is checked to locate a specific node of the binary tree structure. In the case of adding the cache control record, the balance factor value of each node of the binary tree structure is checked, and if there is a node having a balance factor value of 2 or more, the balance factor value of each node is equal to or less than an absolute value of 1. By rebalancing the binary tree structure, any one cache control record can be retrieved more quickly in the binary tree structure, effectively reducing the time required for cache control operations.

Description

{Method for managing cache control record of binary tree structure}

The present invention relates, for example, to a cache control record management method of a binary tree structure for quickly reading application data of an SSD instead of an application data of a hard disk drive (HDD).

In general, as a large storage medium, a hard disk drive (HDD) is widely used. For example, in recent years, SNS that uses a plurality of NAND flash memories as a next generation mass storage medium. Solid State Drives (SSDs) are becoming increasingly popular and commercially available.

On the other hand, the SSD has a faster read / write speed than the hard disk drive (HDD), has low power consumption, and has a strong resistance to impact. ) Is rapidly increasing.

For example, in various types of hosts such as personal computers (PCs), a hard disk drive (HDD) is used as a large main storage medium, but a read / write speed may be used. Increasingly, the use of SSDs having advantages as sub storage media is rapidly increasing.

In addition, instead of the application data recorded on the hard disk drive (HDD), an efficient solution for quickly reading the same application data copied and written to the SSD (SD) to improve the data processing speed There is an urgent need to come up with a plan.

For example, the present invention provides a cache control record (Cache) so that application data of an SSD may be quickly read instead of application data of a hard disk drive (HDD) to improve data processing speed. It is to provide a binary tree structure cache control record management method for managing and retrieving control records more efficiently.

In the method for managing a cache control record of a binary tree structure according to the present invention, a device driver in a host identifies a node key value of a cache control record generated by a cache control operation, and stores the cache at a specific node location of a binary tree structure. Adding a control record; And checking the balance factor value of each node of the binary tree structure, and rebalancing the binary tree structure such that the balance factor value of each node is less than or equal to 1 if there is a node having a balance factor value of 2 or more. Characterized in that made,

The cache control record may include a start / end address of a hard disk drive and a start / end address of an SSD according to a cache control operation.

The node key value may be a start address of a hard disk drive included in a cache control record.

The balance factor value may be a result of subtracting a path depth below a right side from a path depth below a left side based on each node of a binary tree structure.

In addition, in the second step, when the balance factor value is 2 and the upper node A, the intermediate node B, and the lower node C are all present continuously only to the left side, the upper node A Re-adjust to the lower right of the intermediate node (B),

In addition, in the second step, when the balance factor value is -2 and the upper node A, the intermediate node B, and the lower node C are all present continuously only to the right, the upper node A ) Is readjusted to the lower left of the intermediate node (B),

In the second step, when the balance factor value is 2, the upper node A is present on the upper right side of the intermediate node B, and the lower node C is present on the lower right side of the intermediate node B. Re-adjust the upper node A to the lower right of the lower node C, and the intermediate node B to the lower left of the lower node C.

In the second step, the balance factor value is -2, and the upper node A is present on the upper left side of the intermediate node B, and the lower node C is present on the lower left side of the intermediate node B. In this case, the upper node A is readjusted to the lower left of the lower node C, and the intermediate node B is readjusted to the lower right of the lower node C.

In the binary tree structure, when searching for any one cache control record, the node key value of the cache control record to be searched is checked, and then the cache control record corresponding to the node key value is searched. Characterized in that further comprises,

In addition, when any one cache control record is searched in the binary tree structure, the start / end address of the SD contained in the found cache control record is checked, and the application data stored in the corresponding recording section of the corresponding SD is read. Characterized in that it further comprises the step of uploading.

In the method for managing a cache control record of a binary tree structure according to the present invention, for example, in a device driver in a host, a node key value of a cache control record generated by a cache control operation is checked to locate a specific node of the binary tree structure. In the case of adding the cache control record, the balance factor value of each node of the binary tree structure is checked, and if there is a node having a balance factor value of 2 or more, the balance factor value of each node is equal to or less than an absolute value of 1. By rebalancing the binary tree structure, any one cache control record can be retrieved more quickly in the binary tree structure, effectively reducing the time required for cache control operations.

1 illustrates a configuration of an embodiment of a device driver applied to a cache control record management method of a binary tree structure according to the present invention.
2 illustrates an embodiment of a cache control operation in accordance with the present invention;
3 illustrates an embodiment of a cache control table in accordance with the present invention;
4 illustrates an embodiment of a cache control record of a binary tree structure according to the present invention;
5 to 8 conceptually illustrate various embodiments in which the binary tree structure is rearranged in accordance with the present invention;
9 illustrates a specific embodiment in which the binary tree structure is readjusted in accordance with the present invention.

Hereinafter, a preferred embodiment of a cache control record management method of a binary tree structure according to the present invention will be described in detail with reference to the accompanying drawings.

First, the cache control record management method of the binary tree structure according to the present invention is applied to a device driver included in various types of hosts such as a personal computer (PC), for example, a device. As the driver, a filter driver can be used.

Meanwhile, the host 100 includes, for example, an application 101, a file system 102, an OS 103, and a device driver as shown in FIG. 1. 104, the South Bridge, and the Serial AT Attachment (SATA) interface 106 may be included in a logical hierarchy.

In addition, the hard disk drive (HDD) and the SSD (SSD) is used to connect through the SATA interface 106, for example, the hybrid drive (Hybrid Drive) used to connect through the SATA interface 106 The port 300 may include a port multiplier 301, an SD 302, an optical disc drive (ODD) 303, and the like.

In addition, the device driver 104 captures a read command transmitted from the OS 103 to the hard disk drive 200, and stores a hard disk drive start / end address (HDD) included in the read command. Start / End LBA).

In the meantime, for example, an LBA address specified by a logical block addressing (LBA) method may be used. In the device driver 104, the identified hard disk drive start / end may be used. The SD Start / End address (SSD Start / End LBA) corresponding to the address (HDD Start / End LBA) is stored or retrieved in a Cache Control Table which is stored and managed in advance.

For example, as shown in FIG. 2, application data (eg, Application #n) recorded at a specific start / end address in the hard disk drive HDD is read and uploaded to an application in the host. In this case, the device driver 104 copies and writes the uploaded application data to a specific start / end address in the SSD.

The hard disk drive start / end address (HDD Start / End LBA) and the SD start / end address (SSD Start / End LBA) may be included in the cache control table in the form of a look up table. In order to perform a series of cache control (Cache Control) operation to be stored in association with (), the hard disk drive start address (HDD Start LBA), for example, as shown in Figure 2, Serial numbers and the like are additionally recorded.

In the device driver 104, when a new read command is captured after the cache control table is stored and managed as described above, the hard disk drive start / end address included in the read command ( After checking the HDD Start / End LBA, the corresponding SD Start / End Address (SSD Start / End LBA) is searched in the cache control table.

In addition, the SDD corresponding to the searched SD start / end address is accessed, the application data copied and stored in the recording section is quickly read and uploaded to the application. As shown in FIG. 3, since a large number of addresses are stored in the cache control table in the form of a lookup table, each time the device driver 104 performs a cache control operation, the cache control table is sequentially processed from the beginning. When searching by, there is a problem that takes a long time.

Therefore, the device driver 104 can manage a cache control record of a binary tree structure, for example, as shown in FIG. 4, so that any one cache control record can be retrieved more quickly. The cache control record of the binary tree structure may be managed together with the cache control table in the form of a list described above with reference to FIG. 3, or instead of the cache control table, only the cache control record of the binary tree structure may be used. Can be managed.

On the other hand, when a new cache control record is generated by the cache control operation, the device driver 104 checks the start address (HDD_Start_LBA) of the hard disk drive included in the cache control record, and then the node key of the binary tree structure ( Node Key) value.

For example, as shown in FIG. 5, when the HDD_Start_LBA of node A is 100, if the HDD_Start_LBA of node B, which is a new cache control record, is 90 less than 100, node B is added to the lower left of node A.

Then, if HDD_Start_LBA of node C, which is another new cache control record, is 80 less than 90, node C is added to the bottom left of node B. In this case, the balance factor value of node A is left The result of subtracting the path depth Hight_Left from 2 below 0 (that is, no node below) from the path depth Hight_Left below right is 2.

On the other hand, the balance factor value of the node B is a result of subtracting 0, the path depth of the lower right, from 1, which is the path depth of the lower left, and the value 1, and the balance factor value of the node C has no path below the left / right. Since it is not present, it becomes 0. The device driver 104 readjusts the binary tree structure so that the balance factor value for each node is equal to or less than the absolute value 1.

For example, as shown in FIG. 5, when the balance factor value of the upper node A is 2 and the upper node A, the intermediate node B, and the lower node C are all present continuously only to the left side, the upper node A Is re-adjusted to the lower right of the intermediate node B, so that the left-left (LL) rotation operation is performed such that each node's balance factor value is at least an absolute value of 1 or less.

On the other hand, as shown in FIG. 6, when the balance factor value of the upper node A is -2 and the upper node A, the intermediate node B, and the lower node C are all present continuously only to the right, in the device driver, The upper node A is readjusted to the lower left of the intermediate node B to perform a right-right rotation operation such that each node has a balance factor value of at least 1 or less than an absolute value.

In addition, as shown in FIG. 7, when the balance factor value of the upper node A is 2, and the upper node A exists on the upper right side of the intermediate node B, and the lower node C exists on the lower right side of the intermediate node B, RR rotation operation and LL to readjust the upper node A to the lower right of the lower node C and the middle node B to the lower left of the lower node C so that the balance factor value for each node is at least an absolute value of 1 or less. The rotation operation is performed sequentially.

As shown in FIG. 8, while the balance factor value of the upper node A is -2, the upper node A is present on the upper left of the intermediate node B, and the lower node C is the intermediate node B. As shown in FIG. If present in the lower left, the upper node (A) is readjusted to the lower left of the lower node (C), and the intermediate node (B) to the lower right of the lower node (C) to adjust the balance factor for each node The LL rotation operation and the RR rotation operation so that the value becomes at least an absolute value 1 or less are sequentially performed.

Meanwhile, FIG. 9 illustrates a specific embodiment in which the binary tree structure is readjusted according to the present invention. For example, when the node key value 3 is present and the node key value 5 is added, the code key value Since 5 is greater than the node key value 3, 5 is added to the lower right. In this case, the balance factor value of the node key value 3 is subtracted from the path depth 0 at the lower left by 1 which is the path depth 1 at the lower right. The resultant value is -1, and the balance factor value of the node key value 5 becomes 0 as a result of subtracting 0, the path depth at the bottom right, from 0, the path depth at the bottom left.

Subsequently, when a new node key value 11 is added, the code key value 11 is greater than the node key value 5 and thus is added to the lower right side. In this case, the balance factor value of the node key value 3 is The result of subtracting 2, which is the depth of the lower right path, from 0, which is the path depth of the lower left, becomes -2, and the balance factor value of the node key value 5 is 0, which is the lower right path, from 0, the path depth of the lower left. The result of subtracting 1, the depth, is -1.

Therefore, in order to ensure that the balance factor value of the node key value 3 is equal to or less than the absolute value 1, the device driver 104 performs an RR rotation operation as shown in FIG. It will readjust to the lower left of the key value 5.

Subsequently, when a new node key value 8 is added, the code key value 8 is smaller than the node key value 11 and thus is added to the lower left side. In this case, the balance factor value of the node key value 5 is The result of subtracting 2, which is the path depth of the lower right, from 2, the path depth of the lower left, becomes -1, and the balance factor value of the node key value 11 is 1, the path of the lower right, which is 1, the path depth of the lower left. The result of subtracting the depth 0 is 1.

In addition, when a new node key value 4 is added, the code key value 4 is larger than the node key value 3, and thus is added to the lower right side. In this case, the balance factor value of the node key value 5 is left. The result of subtracting 2, which is the path depth below the right, from 2, which is the path depth below, becomes 0 as a result value, and the balance factor value of the node key value 3 is 1, which is the path depth below the right, from 0, which is the path depth below the left. The result of subtracting is -1.

On the other hand, when a new node key value 7 is added, the code key value 7 is smaller than the node key value 8 and thus is added to the lower left side. In this case, the balance factor value of the node key value 11 is left Subtracting 0, the path depth at the bottom right, from 2, the path depth below, becomes 2 as a result value, and the balance factor value of the node key value 8 is 0, the path depth at the bottom right, from 1, the path depth at the bottom left. The result of subtracting is 0.

Therefore, in the device driver 104, in order to make the balance factor value of the node key value 11 equal to or less than the absolute value 1, as shown in FIG. Since it is readjusted to the lower right of the key value 8, the balance factor value for each node for the cache control record of the binary tree structure is all less than or equal to the absolute value 1.

On the other hand, when the device driver 104 searches for any one cache control record in the binary tree structure, the device driver 104 starts the hard disk drive included in the read command as a node key value of the cache control record to be searched. After checking the address (HDD_Start LBA), the corresponding cache control record is searched in the binary tree structure.

For example, in the binary tree structure of FIG. 9, when a node value 7 is searched, a sequence of searching for a node value 8 at the lower right and a lower left of the node value 8 at the highest node value 5 is operated. It can be performed quickly.

In the binary tree structure, when any one cache control record is searched, the start / end address of the SD contained in the searched cache control record is checked, and the application data stored in the corresponding recording period of the SD is read. By uploading the data, the time required for the cache control operation can be shortened efficiently.

Or more, preferred embodiments of the present invention described above, for the purpose of illustration, those skilled in the art, within the technical spirit and the technical scope of the present invention disclosed in the appended claims below, to further improve various other embodiments Changes, substitutions or additions will be possible.

100: host 101: application
102: file system 103: OS
104: device driver 105: South Bridge
106: SATA interface 200: hard disk drive
300: hybrid drive 301: port multiplier
302: ss 303: optical disk drive

Claims (10)

In a device driver in a host, identifying a node key value of a cache control record generated by a cache control operation and adding the cache control record to a specific node position of a binary tree structure; And
Checking a balance factor value of each node of the binary tree structure, and if there is a node having a balance factor value of 2 or more, reconstructing the binary tree structure such that the balance factor value of each node is less than or equal to an absolute value of 1; Cache control record management method of the binary tree structure, characterized in that consisting of. The method of claim 1,
And the cache control record comprises a start / end address of a hard disk drive and a start / end address of an SDD according to a cache control operation. The method of claim 1,
And the node key value is a start address of a hard disk drive included in a cache control record. The method of claim 1,
The balance factor value is a result of subtracting a path depth at the bottom right from a path depth at the bottom left based on each node of the binary tree structure. The method of claim 4, wherein
In the second step, when the balance factor value is 2 and the upper node A, the intermediate node B, and the lower node C are all present continuously only to the left side, the upper node A is intermediate. A method for managing a cache control record in a binary tree structure, characterized in that it is readjusted to the lower right of the node (B). The method of claim 4, wherein
In the second step, when the balance factor value is -2 and the upper node A, the intermediate node B, and the lower node C are all present on the right side only, the upper node A is determined. The cache control record management method of the binary tree structure characterized by the readjustment to the lower left of the intermediate node (B). The method of claim 4, wherein
In the second step, when the balance factor value is 2, the upper node A is present on the upper right side of the intermediate node B, and the lower node C is present on the lower right side of the intermediate node B, And realigning the upper node (A) to the lower right side of the lower node (C), and the intermediate node (B) to the lower left side of the lower node (C). The method of claim 4, wherein
In the second step, when the balance factor value is -2 and the upper node A exists above the left side of the intermediate node B, and the lower node C exists below the left side of the intermediate node B, A method of managing a cache control record of a binary tree structure, wherein the upper node A is readjusted to the lower left of the lower node C, and the intermediate node B is readjusted to the lower right of the lower node C. . The method of claim 1,
In the binary tree structure, if retrieving any one cache control record, checking the node key value of the cache control record to be retrieved, and then retrieving a corresponding cache control record in the binary tree structure; Cache control record management method of the binary tree structure, characterized in that made by. The method of claim 9,
In the binary tree structure, if any one cache control record is searched, the SD start / end address included in the retrieved cache control record is checked, and the application data stored in the corresponding recording period of the SD is read and uploaded. The cache control record management method of the binary tree structure, characterized in that further comprising the step of.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113407111A (en) * 2020-03-17 2021-09-17 慧荣科技股份有限公司 Flash memory controller, method of flash memory controller and memory device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113407111A (en) * 2020-03-17 2021-09-17 慧荣科技股份有限公司 Flash memory controller, method of flash memory controller and memory device
CN113407111B (en) * 2020-03-17 2024-03-29 慧荣科技股份有限公司 Flash memory controller, method of flash memory controller and memory device

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