KR20120093723A - Method for correction of overlay error in semiconductor device - Google Patents
Method for correction of overlay error in semiconductor device Download PDFInfo
- Publication number
- KR20120093723A KR20120093723A KR1020110013467A KR20110013467A KR20120093723A KR 20120093723 A KR20120093723 A KR 20120093723A KR 1020110013467 A KR1020110013467 A KR 1020110013467A KR 20110013467 A KR20110013467 A KR 20110013467A KR 20120093723 A KR20120093723 A KR 20120093723A
- Authority
- KR
- South Korea
- Prior art keywords
- reticle
- overlay error
- overlay
- pattern
- light source
- Prior art date
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/70—Microphotolithographic exposure; Apparatus therefor
- G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
- G03F7/70605—Workpiece metrology
- G03F7/70616—Monitoring the printed patterns
- G03F7/70633—Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
Abstract
An overlay correction method of a semiconductor device of the present invention includes measuring an overlay error of a reticle including a first pattern to be formed on a wafer; Introducing an optical module including a slit for changing a path of a light source irradiated to a portion where an overlay error occurs on the reticle; And arranging the reticle into which the optical module is introduced, in the optical equipment and irradiating the light source to transfer the second pattern having the overlay error corrected to the wafer by the light source passing through the slit in which the path of the light source is changed.
Description
The present invention relates to semiconductor device manufacturing, and more particularly, to an overlay correction method of a semiconductor device.
A lithography process is performed to transfer shapes of different patterns formed on a plurality of reticles onto a wafer in the process of manufacturing a semiconductor device. The patterns of the patterns formed on the plurality of reticles may be sequentially transferred onto the wafer by applying a photoresist film on the wafer and then performing exposure and development to implement a circuit pattern required for the operation of the semiconductor device.
1 is a view schematically showing the optical equipment for pattern formation used in the lithography process.
Referring to FIG. 1, the optical equipment for forming a pattern includes a
However, due to defects in the reticle, such as defects in the manufacturing of the reticle, defects in the process of adjusting the line width uniformity, or the tilt angle of the stage where the reticle is placed is off the target. When the overlay error of the intrafield is induced, the overlay error is measured at different values at the upper and lower portions of the field, thereby making it difficult to correct the correction. In addition, the overlay error of the intrafield caused by the distortion of the lens of the exposure equipment is also difficult to correct. In the case where an overlay error occurs as described above, if the correction is not performed, the overlay error is transferred onto the wafer, which may lead to wafer defects. Thus, a method of correcting the overlay error is required.
SUMMARY OF THE INVENTION The present invention provides an overlay correction method of a semiconductor device capable of improving an overlay error of a wafer by controlling an intrafield overlay error, which is an overlay error in a field due to a defective reticle or a component of an exposure apparatus. It is.
An overlay correction method of a semiconductor device according to the present invention includes measuring an overlay error of a reticle including a first pattern to be formed on a wafer; Introducing an optical module including a slit on the reticle to change a path of a light source irradiated to a portion where the overlay error occurs; And disposing a reticle into which the optical module is introduced, in optical equipment, and irradiating a light source to transfer a second pattern having an overlay error corrected to a wafer by a light source passing through a slit in which the path of the light source is changed. It features.
In the present invention, the measuring of the overlay error may include measuring an alignment state of the first pattern; Comparing the alignment of the first pattern with the alignment of the reference pattern to be formed on the wafer; And measuring the degree and the position of deviation of the first pattern from the alignment of the reference pattern and defining the residual value as a residual value.
The overlay error of the reticle is preferably measured in rectangular field units.
The overlay error measured in the field unit may include an overlay error in which the upper and lower portions of the field are asymmetric with each other or an overlay error in which the upper and lower portions except the center of the field are symmetrically generated. Do.
The optical module may include a first plate having a first inclined plane that primarily changes the path of the light source in a portion corresponding to the first area where the overlay error of the reticle is measured, and the first in the plane facing the first inclined plane. It is preferable to include a second plate having a second inclined surface that secondary changes the path of the changed light source.
Preferably, the optical module has a flat surface on the reticle where the overlay has a normal value.
Preferably, the optical module is attached to the reticle or attached to a stage of the optical equipment in which the reticle is disposed.
Transferring the second pattern having the overlay error corrected may be corrected by selectively changing a path of a light source in a portion where an overlay error occurs in the reticle.
According to the present invention, a defect occurs in the process of manufacturing the reticle, a defect occurs in the process of adjusting the line width uniformity, or an intra caused by the defect of the lens of the exposure apparatus or the defect of the reticle due to the inclination of the reticle stage. Overlay error in the field can be controlled. Accordingly, the yield error can be improved by improving the overlay error of the wafer.
1 is a view schematically showing the optical equipment for pattern formation used in the lithography process.
2 and 3 illustrate the types of overlay errors generated on a wafer.
4 is a flowchart illustrating a method for correcting an inter-field overlay according to the present invention.
5A through 5C are diagrams for explaining the inter-field overlay correction method according to an embodiment of the present invention.
6 and 7 illustrate a method of correcting an overlay error generated in various forms by applying the optical module of the present invention.
Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein.
2 and 3 illustrate the types of overlay errors generated on a wafer. Referring to FIGS. 2 and 3, the overlay can analyze the error in two forms, for example, when analyzing in a state implemented on a wafer, as shown in FIG. It can be detected as an intrafield overlay error and an interfield overlay error which is an error due to the shape in the field shown in FIG. 3. Referring back to FIG. 2, the overlay error can be measured residually. "Residual" is defined as the remaining value to remove the overlay error that can be corrected by grasping the alignment between the layer formed in the previous process and the layer formed through the current process. To do this, first measure the alignment of the pattern formed on the reticle, compare the alignment of the pattern formed on the reticle with the degree of alignment of the reference pattern to be formed on the wafer, and then remove the pattern formed on the reticle from the alignment of the reference pattern. The accuracy and position are measured and defined as residual values. Here, the residual value may determine the degree and position of deviation from the pattern to be originally formed in the direction and size of the arrow. Specifically, in the
The overlay error in the trapezoidal shape is caused by a tilt angle of the stage on which the reticle is disposed, or is identified as a reticle registration error generated in manufacturing the reticle. In addition, the intrafield overlay error is controlled by the laser irradiation on the quartz substrate of the reticle to adjust the line width (CD) in the field to secure the line width uniformity. It is observed to occur. In the case where an overlay error occurs as described above, if the correction is not performed, the overlay error is transferred onto the wafer, which may lead to wafer defects. Thus, a method of correcting the overlay error is required.
Accordingly, the present invention intends to improve the intrafield overlay by correcting the overlay error generated differently in each field in the field.
4 is a flowchart illustrating a method for correcting an inter-field overlay according to the present invention. 5A through 5C are diagrams for explaining the inter-field overlay correction method according to an embodiment of the present invention.
4 and 5A, a
Next, the overlay error of the reticle is measured (S410). Referring to FIG. 5B, in which a
When an overlay error occurs as described above, an optical module for correcting the generated overlay error is attached to the reticle (S420). Specifically, referring to FIG. 5C, an
Next, the
By introducing an optical module that can selectively perform optical correction only on the areas where overlay errors have occurred, overlay errors asymmetrically generated in the reticle, overlay errors generated in an asymmetric trapezoidal shape at the top and bottom, or on the quartz substrate of the reticle It is also applicable to the intrafield overlay error caused by applying the method of securing the linewidth uniformity by adjusting the linewidth CD in the field by adjusting the transmittance by irradiating the laser. Hereinafter, a description will be given with reference to FIGS. 6 and 7.
6 and 7 illustrate a method of correcting an overlay error generated in various forms by applying the optical module of the present invention. Referring to FIG. 6, which shows an overlay error generated in a trapezoidal shape, an overlay error is observed in a trapezoidal shape as an intrafield overlay error, which is an error caused by a shape in a field. The above-mentioned intrafield overlay error is based on the
In addition, referring to FIG. 7, which shows an intrafield overlay error caused by applying a method of securing line width uniformity by adjusting line width (CD) in a field by irradiating a laser to a quartz substrate of a reticle and adjusting transmittance, As an error caused by an intrafield overlay, a reduced overlay error is observed at the top and bottom of the field based on a normal overlay configuration. In this case, as a general linear analysis, a correction is performed on the upper and lower portions of the
500: reticle 510: mask pattern
500a: field 525: first plate
530: second plate 535: optical module
545: slit
Claims (8)
Introducing an optical module including a slit on the reticle to change a path of a light source irradiated to a portion where the overlay error occurs; And
And disposing a reticle into which the optical module is introduced to the optical equipment and irradiating a light source to transfer a second pattern having an overlay error corrected to a wafer by a light source passing through a slit in which the path of the light source is changed. Overlay correction method.
The measuring of the overlay error may include measuring an alignment state of the first pattern;
Comparing the alignment of the first pattern with the alignment of the reference pattern to be formed on the wafer; And
And measuring a degree and a position at which the first pattern deviates from the alignment of the reference pattern and defining the residual value as a residual value.
The overlay error of the reticle is measured in the field of a rectangular field (overlay) correction method of the semiconductor device.
The overlay error measured by the field unit includes an overlay error in which the upper and lower portions of the field are asymmetric with each other, or an overlay error in which the upper and lower portions except the center of the field are symmetrically generated. Overlay correction method.
The optical module may include a first plate having a first inclined plane that primarily changes the path of the light source in a portion corresponding to the first area where the overlay error of the reticle is measured, and the first in the plane facing the first inclined plane. And a second plate having a second inclined surface that quadratically changes the path of the changed light source.
And the optical module forms a flat surface on the reticle where the overlay has a normal value.
And the optical module is directly attached to the reticle or attached to a stage of the optical equipment in which the reticle is disposed.
The transferring of the second pattern of which the overlay error is corrected may include correcting the path of the light source by selectively changing a portion of the reticle where the overlay error has occurred.
Priority Applications (1)
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KR1020110013467A KR20120093723A (en) | 2011-02-15 | 2011-02-15 | Method for correction of overlay error in semiconductor device |
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KR1020110013467A KR20120093723A (en) | 2011-02-15 | 2011-02-15 | Method for correction of overlay error in semiconductor device |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20160138778A (en) * | 2015-05-26 | 2016-12-06 | 삼성전자주식회사 | Methods of Revising an Overlay Correction Data |
US11796923B2 (en) | 2020-12-03 | 2023-10-24 | Samsung Electronics Co., Ltd. | Overlay correction method, method of evaluating overlay correction operation, and method of fabricating semiconductor device using the overlay correction method |
-
2011
- 2011-02-15 KR KR1020110013467A patent/KR20120093723A/en not_active Application Discontinuation
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20160138778A (en) * | 2015-05-26 | 2016-12-06 | 삼성전자주식회사 | Methods of Revising an Overlay Correction Data |
US11796923B2 (en) | 2020-12-03 | 2023-10-24 | Samsung Electronics Co., Ltd. | Overlay correction method, method of evaluating overlay correction operation, and method of fabricating semiconductor device using the overlay correction method |
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