KR20120083713A - Light emitting device package - Google Patents

Light emitting device package Download PDF

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Publication number
KR20120083713A
KR20120083713A KR1020110005009A KR20110005009A KR20120083713A KR 20120083713 A KR20120083713 A KR 20120083713A KR 1020110005009 A KR1020110005009 A KR 1020110005009A KR 20110005009 A KR20110005009 A KR 20110005009A KR 20120083713 A KR20120083713 A KR 20120083713A
Authority
KR
South Korea
Prior art keywords
light emitting
emitting chips
device package
chips
emitting device
Prior art date
Application number
KR1020110005009A
Other languages
Korean (ko)
Inventor
박희석
이수환
이희영
Original Assignee
삼성엘이디 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성엘이디 주식회사 filed Critical 삼성엘이디 주식회사
Priority to KR1020110005009A priority Critical patent/KR20120083713A/en
Publication of KR20120083713A publication Critical patent/KR20120083713A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64—Heat extraction or cooling elements

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Led Device Packages (AREA)

Abstract

PURPOSE: A light emitting device package is provided to reduce the manufacturing costs by expecting the estimated quality result of a light emitting device package in advance by testing individual light emitting chip from the manufacturing stage. CONSTITUTION: A plurality of light emitting chips(11-14) are electrically connected in series. A plurality of bypass circuits include a plurality of zener diodes(21-24) respectively connected with a plurality of light emitting chips one to one. A plurality of test elements are connected to each side of a plurality of light emitting chips. A substrate includes the plurality of light emitting chips and bypass circuits. The substrate includes an electric connecting element to connect a plurality of light emitting chips and test elements.

Description

A light emitting device package

The present disclosure relates to a light emitting device package, and more particularly, to a light emitting device package in which a plurality of light emitting chips are arranged.

Light emitting devices such as light emitting diodes (LEDs) and laser diodes (LDs), such as light emitting diodes (LDs), constitute a light emitting source through a PN junction of a compound semiconductor, thereby realizing various colors of light. Say. Such a light emitting device has a long lifespan, can be downsized and lightened, and has a strong directivity of light to enable low voltage driving. In addition, such a light emitting device is resistant to shock and vibration, does not require preheating time and complicated driving, and can be packaged in various forms, and thus can be applied to various applications.

Typically, in order to secure the amount of light and improve light distribution characteristics, two or more light emitting chips are connected and packaged in an array form. Since the light emitting device package is important not only for optical characteristics but also for reliability, a method for securing reliability of individual light emitting chips forming an array is required.

Two or more light emitting chips are connected in an array to secure reliability of the packaged light emitting device package.

A light emitting device package according to an aspect of the present invention, a plurality of light emitting chips; A plurality of bypass circuits provided in each of the plurality of light emitting chips, wherein the plurality of bypass circuits become conductive when the voltage across both ends is above a predetermined value; A plurality of test terminals connected to both ends of each of the plurality of light emitting chips; And a substrate on which a plurality of light emitting chips and a plurality of bypass circuits are mounted, the substrate including an electrical connection element for connecting the plurality of light emitting chips and the plurality of test terminals. The bypass circuit provided for each light emitting chip allows the remaining light emitting chips to operate normally when the light emitting chip is broken or broken.

The plurality of bypass circuits may be closed circuits including a plurality of zener diodes connected one-to-one with each of the plurality of light emitting chips. This bypass circuit not only enables the remaining light emitting chips to operate normally when the light emitting chip is broken or broken, but also protects the light emitting chips 11, 12, 13, and 14 from ESD.

The plurality of light emitting chips may be connected in series with each other. In some cases, light emitting chips connected in parallel may be additionally provided.

The plurality of light emitting chips may be disposed on one surface of the substrate, and the plurality of test terminals may be disposed on the other surface of the substrate. Further, a heat dissipation layer may be provided in one region of the other surface of the substrate corresponding to the position where the plurality of light emitting chips are mounted, to emit heat generated by the plurality of light emitting chips.

At least some of the plurality of test terminals may be external terminals for applying power to the plurality of light emitting chips. If all the light emitting chips are connected in series, the external terminal will be a test terminal connected to the first light emitting chip and a test terminal connected to the last light emitting chip.

The light emitting device package according to the disclosed embodiments can measure individual light emitting chips forming an array from a manufacturing stage, and even if one light emitting chip is short-circuited, another light emitting chip is normally operated to suddenly turn off the entire unit of the light emitting device package. Can prevent work.

1 is a perspective view of a light emitting device package according to an embodiment of the present invention.
FIG. 2 illustrates a bottom surface of the light emitting device package of FIG. 1.
3 illustrates a bottom surface of the light emitting device package of FIG. 1.
4 is a circuit diagram of the light emitting device package of FIG. 1.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the drawings, like reference numerals refer to like elements, and the size and thickness of each element may be exaggerated for clarity of explanation.

1 is a perspective view of a light emitting device package according to an embodiment of the present invention, FIG. 2 shows a top surface of the light emitting device package, and FIG. 3 shows a bottom surface of the light emitting device package. 4 is a circuit diagram of a light emitting device package.

1 to 4, in the light emitting device package according to the present embodiment, bonding pads 31, 32, 33, 34, and 35 are provided on one surface of the substrate 10, and bonding pads 31 and 32 are provided. The plurality of light emitting chips 11, 12, 13, and 14 and Zener diodes 21, 22, 23, and 24 are mounted on the light emitting diodes 33, 34, and 35. The other surface of the substrate 10 is provided with a plurality of test terminals 41, 42, 43, 44, and 45 for testing each of the plurality of light emitting chips 11, 12, 13, and 14. In addition, the substrate 10 may include an electrical connection element such as a via hole connecting the plurality of test terminals 41, 42, 43, 44, and 45 to the plurality of bonding pads 31, 32, 33, 34, and 35 in a one-to-one manner. Not shown) is provided.

The light emitting chips 11, 12, 13, and 14 may be configured by forming light emitting sources through PN bonding of compound semiconductors such as light emitting diodes (LEDs) or laser diodes (LDs). A semiconductor device capable of realizing color light.

The plurality of light emitting chips 11, 12, 13, and 14 are electrically connected in series with each other, and the plurality of zener diodes 21, 22, 23, and 24 are one-to-one to each of the light emitting chips 11, 12, 13, and 14. To form a closed circuit. In this case, the plurality of zener diodes 21, 22, 23, and 24 are connected to the plurality of light emitting chips 11, 12, 13, and 14 so that voltage is applied in the reverse direction. Such electrical wiring may be made by known means such as wire bonding or flip chip bonding. For example, the plurality of light emitting chips 11, 12, 13, and 14 and the plurality of zener diodes 21, 22, 23, and 24 may be bonded pads 31, 32, 33, 34, and 35 to a wire (not shown). Can be wired. For example, the + electrode of the first light emitting chip 11 of the plurality of light emitting chips 11, 12, 13, and 14 is directly connected to the first bonding pad 31 of the plurality of bonding pads 31, 32, 33, 34, and 35. The electrode of the first light emitting chip 11 may be connected to the second bonding pad 32 by wire bonding. In addition, the negative electrode of the first zener diode 21 of the plurality of zener diodes 21, 22, 23, 24 is connected to the first bonding pad 31 by wire bonding, and the + electrode of the first zener diode 21 is provided. May be directly attached to the second bonding pad 32.

The closed circuit formed by the zener diodes 21, 22, 23, and 24 becomes a bypass circuit for each of the plurality of light emitting chips 11, 12, 13, and 14. Zener diodes (21, 22, 23, 24) is a device that current flows in the reverse direction when a breakdown voltage of a predetermined value or more is applied in the reverse direction, unlike the characteristics of the general diode. Thus, for example, when the first light emitting chip 11 fails or is disconnected, current flows in the reverse direction while the voltage across both ends of the first zener diode 21 exceeds a predetermined value. 13, 14) can operate normally.

As described above, the bypass circuit provided for each of the light emitting chips 11, 12, 13, and 14 may operate normally even if any one of the plurality of light emitting chips 11, 12, 13, and 14 is broken or disconnected. This prevents the light emitting device package from turning off entirely. Such a circuit configuration of the light emitting device package can ensure the reliability required for the headlights of the automobile. Meanwhile, the Zener diodes 21, 22, 23, and 24 constituting the bypass circuit may protect the light emitting chips 11, 12, 13, and 14 from electrostatic discharge (ESD).

In the light emitting device package of the present embodiment, the bonding pads 31, 32, 33, 34, 35 are already tested on the substrate 10 before the light emitting chips 11, 12, 13, and 14 are mounted on the substrate 10. Terminals 41, 42, 43, 44, and 45 may be provided. Meanwhile, since the test terminals 41, 42, 43, 44, 45 and the plurality of bonding pads 31, 32, 33, 34, 35 are connected in a one-to-one manner, the test terminals 41, 42, 43, Two adjacent terminals among the 44 and 45 may correspond to two electrodes of each of the light emitting chips 11, 12, 13, and 14. Therefore, after the light emitting chips 11, 12, 13, and 14 are mounted on the substrate 10 in the manufacturing process of the light emitting device package, the light emitting chips 11, 12, 13, and 14 may be individually tested. 43, 44, 45). This individual test during the manufacturing process enables to determine the good quality of the light emitting device package in advance, thereby reducing the manufacturing cost. Furthermore, individual testing during the manufacturing process enables the replacement of the defective light emitting chip.

Meanwhile, the first test terminal 41 of the plurality of test terminals 41, 42, 43, 44, and 45 is connected to the + electrode of the first light emitting chip 11 of the plurality of light emitting chips 11, 12, 13, and 14. The last test terminal 45 of the plurality of test terminals 41, 42, 43, 44, and 45 is connected to the negative electrode of the last light emitting chip 14 of the plurality of light emitting chips 11, 12, 13, and 14. Thus, the first test terminal 41 and the last test terminal 45 become external terminals for applying power to the plurality of light emitting chips 11, 12, 13, and 14. Thus, at least the first test terminal 41 and the last test terminal 45 are exposed to the outside in the final light emitting device package.

The heat dissipation layer 50 may be provided in a predetermined region of the other surface of the substrate 10 corresponding to the position where the plurality of light emitting chips 11, 12, 13, and 14 are mounted. The heat dissipation layer 50 may be a metal layer formed together with the plurality of test terminals 41, 42, 43, 44, and 45. The heat dissipation layer 50 may be attached to itself or a separate heat dissipation member so that heat generated from the plurality of light emitting chips 11, 12, 13, and 14 is released.

In the above-described embodiment, the case in which the plurality of light emitting chips 11, 12, 13, and 14 are four is described as an example, but is not limited thereto. In addition, although the plurality of light emitting chips 11, 12, 13, and 14 are all described in the case of serial connection only as an example, light emitting chips connected in parallel may be additionally provided.

The above-described light emitting device package of the present invention has been described with reference to the embodiment shown in the drawings for clarity, but this is only an example, and those skilled in the art may have various modifications and equivalent embodiments therefrom. I understand that it is possible. Accordingly, the true scope of the present invention should be determined by the appended claims.

10: substrate 11, 12, 13, 14: light emitting chip
21, 22, 23, 24: Zener diodes 31, 32, 33, 34, 35: bonding pads
41, 42, 43, 44, 45: test terminal 50: heat dissipation layer

Claims (6)

A plurality of light emitting chips;
A plurality of bypass circuits provided in each of the plurality of light emitting chips, wherein the plurality of bypass circuits become conductive when the voltage across both ends is above a predetermined value;
A plurality of test terminals connected to both ends of each of the plurality of light emitting chips; And
And a substrate on which the plurality of light emitting chips and the plurality of bypass circuits are mounted, the substrate including an electrical connection element for connecting the plurality of light emitting chips and the plurality of test terminals. The method according to claim 1,
The plurality of bypass circuits are closed circuits including a plurality of zener diodes connected one-to-one with each of the plurality of light emitting chips. The method according to claim 1 or 2,
The light emitting device package of the plurality of light emitting chips are connected in series. The method according to claim 1 or 2,
The plurality of light emitting chips are disposed on one surface of the substrate, the plurality of test terminals are disposed on the other surface of the substrate. 5. The method of claim 4,
And a heat dissipation layer provided at one region of the other surface of the substrate corresponding to a position where the plurality of light emitting chips are mounted, for dissipating heat generated by the plurality of light emitting chips. The method according to claim 1 or 2,
At least some of the plurality of test terminals are external terminals for applying power to the plurality of light emitting chips.
KR1020110005009A 2011-01-18 2011-01-18 Light emitting device package KR20120083713A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020110005009A KR20120083713A (en) 2011-01-18 2011-01-18 Light emitting device package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020110005009A KR20120083713A (en) 2011-01-18 2011-01-18 Light emitting device package

Publications (1)

Publication Number Publication Date
KR20120083713A true KR20120083713A (en) 2012-07-26

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020110005009A KR20120083713A (en) 2011-01-18 2011-01-18 Light emitting device package

Country Status (1)

Country Link
KR (1) KR20120083713A (en)

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