KR20120077425A - Apparatus for image processing of interlaced and progressive complementary data - Google Patents

Abstract

PURPOSE: An image processing device of an interlaced or progressive scan is provided to process an image in both an existing interlaced scanning method and a progressive scanning method. CONSTITUTION: A 2x1 multiplexer(513) selects a CCD(Charge Coupled Device) input of an interlaced scanning mode in case of the interlaced scanning mode. The 2x1 multiplexer selects output data of a data format converting unit in case of a progressive scanning mode. A five line buffer(514) stores the output data of the 2x1 multiplexer. A 5x3 multiplexer(515) selects data of three lines of a five line buffer. The 5x3 multiplexer outputs the selected data to a brightness processing unit and a chroma processing unit.

Description

Apparatus For Image Processing Of Interlaced and Progressive Complementary Data}

The present invention relates to an image processing technology, and more particularly, to an image processing apparatus of interlaced scanning / sequential scanning.

In general, there are two methods of displaying an image on the screen: an interlaced scan method and a progressive scan method.

The sequential scanning method displays one image by displaying an entire frame at a time by using one image frame as a frame unit, and is used for a computer monitor, a digital TV, a digital video recorder (DVR), and the like.

The interlaced scanning method divides one image frame into two fields and sequentially displays one image by alternately displaying them on a screen, and is used in general TVs and surveillance cameras.

The interlaced scan outputs 525 scan lines consisting of 525 NTSCs and 625 PALs on the screen at even intervals of 1/60 second, and then the odd scan lines on the screen. In this case, each screen at 1/60 second intervals is called a field, and the two fields are called a frame.

On the other hand, a device for acquiring a subject image includes an optical device such as a camcorder or a camera.

The optical device is equipped with a Charge Coupled Device (CCD) or Complementary Metal Oxide Semiconductor (CMOS) image sensor. In general, a color filter is attached to the image sensor to recognize color of a color image.

The color filter includes a primary color filter (hereinafter referred to as a "primary color filter") and a complementary color filter (hereinafter referred to as a "complementary color filter").

Generally, as shown in FIG. 1, four color components of Cy (Cyan), Mg (Magenta), Ye (Yellow), and G (Green) are Cy-Ye-G-Mg or Ye-Cy-. Pixel arrays such as Mg-G or Gr-Mg-Cy-Ye or Mg-Gr-Ye-Cy (horizontal 2 * length 2 = 4) are sequentially arranged in basic units. Cy, Mg, and Ye as color components are complementary to R, G and B as color components constituting the primary color filter.

The complementary color filter absorbs only one of the color components of R, G, and B and passes through two color components, that is, the Ye filter region passes the color components of R and G (Ye = R + G), and the Cy filter region. Passes the color components of G and B (Cy = G + B), and the Mg filter region passes the color components of R and B (Mg = R + B), so that the primary color signal incident on the image sensor The amount of light is increased.

In other words, the complementary color filter increases luminance intensity by passing about twice as many color components as the primary color filter, so that even when photographing a dark subject, a bright image signal output is obtained and the image is amplified for compensation of incident light amount. In this case, there is an advantage that a low noise image can be obtained.

In addition, since the complementary color filter can extract the primary color (R, G, B) information from the four pixels Cy, Mg, Ye, and Gr similarly to the primary color filter, the complementary color filter has an advantage in that there is almost no resolution reduction.

Accordingly, a complementary color filter, rather than a primary color filter, is applied to a video camera or a digital camera applied to security fields recently.

On the other hand, in order to restore the image signal from the image sensor with a complementary color filter, the interpolation scanning image processing technology is adopted to convert the complementary color signals Cy, Mg, Ye, Gr into the primary color signals R, G, and B. This is explained as follows.

First, as an example, a CCD input equipped with a single-plate complementary color filter, as shown in FIG. 1, alternately selects an even / odd line while skipping the sum of two adjacent upper and lower lines one by one ( Cy + G)-> (Ye + Mg)…. -> (Cy + Mg)-> (Ye + G)... By sequentially inputting the data, the same data as the arrangement of FIG. 2 is input.

Accordingly, a conventional method of processing interlaced CCD data is luminance using data output through three lines N-1, N, and N + 1 of the buffer 310, as shown in FIG. The processor 320 generates luminance Y data and the chroma processor 330 generates chroma (Cb / Cr) data.

The interlaced CCD data processing method as described above is widely used in the existing SD class image signal processing (ISP) technology.

However, the demand for high-definition cameras and high-definition monitors that can monitor them in the security market is increasing rapidly.

However, since the data output form of HD CCD with complementary color filter (Cy / Mg / Ye / G) is different from that of the existing SD CCD, the existing SD class ISP can be used as it is for the HD CCD data processing. There is no problem.

Therefore, as the demand for high-definition ISPs emerges as the demand for high resolution in the security market increases, the development of HD-level ISPs is actively progressing. In the future, ISP-based processing of sequential scanning is expected to be the trend.

SUMMARY OF THE INVENTION In order to solve the above problems, an object of the present invention is to create an interlaced / sequential scan type image processing apparatus capable of processing an image of a progressive scan type as well as a conventional interlaced scan type.

That is, an object of the present invention is to enable the image processing of the high-definition sequential scanning method while using the existing SD-class interlaced image processing method as it is.

In order to achieve the above object, the present invention provides a line buffer for delaying the progressive scan CCD input by one line, an adder for adding the progressive scan CCD input and the output data of the line buffer, and the interlaced scan processing. Is a 2x1 multiplexer that selects the interlaced CCD input and selects the output data of the adder, a 5-line buffer that stores the output data of the multiplexer, and the interlaced processing. In this case, the data of n-2, n, n + 2 lines of the 5-line buffer is output to the luminance processing unit and the chroma processing unit, and in the case of sequential scanning, n-2, n, n + 2 lines of the 5-line buffer. And a 5x3 multiplexer for outputting data of n-1, n, n + 1 lines and the luminance processing unit and the chroma processing unit, respectively.

The 5x3 multiplexer may be configured by replacing two 3x3 multiplexers.

The present invention of the above configuration has the advantage that it can respond quickly to various demands of the market by proposing an ISP structure that can handle both the interlaced CCD input and the progressive scan CCD input.

In particular, the present invention can solve the burden of additional hardware development by adding a line memory (line memory) to the conventional interlaced CCD ISP device to implement the HD-level sequential scanning CCD ISP device The effect of eliminating the rise in manufacturing costs will be exerted.

In addition, the present invention has the advantage of being able to flexibly cope with the activation of the future HD security market by preoccupying the CCD-oriented ISP technology of the HD progressive scanning method.

1 is a structural diagram showing a typical single plate complementary color filter CCD input array.
2 is a structural diagram of interlaced input data for the CCD input arrangement of FIG.
3 is a block diagram of a conventional interlaced scanning image processing apparatus.
4 is a structural diagram of sequential scan input data for the CCD input array of FIG. 1 in an embodiment of the present invention; FIG.
5 is a block diagram of an image processing apparatus according to an embodiment of the present invention.

Hereinafter, the present invention will be described in detail with reference to the drawings.

In the embodiments of the present invention, in order to clearly describe the technical spirit and essential characteristics of the present invention will be omitted a detailed description of the technology known to those skilled in the art.

As shown in the configuration of FIG. 5, the image processing apparatus according to an exemplary embodiment of the present invention includes a line buffer 511 for delaying a sequential scanning CCD input by one line, a sequential scanning CCD input, and the line buffer. An adder 512 for summing output data of 511 and an interlaced CCD input for interlaced processing; and for output data of the adder 512 for progressive scanning. A 2x1 multiplexer 513, a 5-line buffer 514 for storing the output data of the multiplexer 513, and n-2, n, n + 2 of the 5-line buffer 514 for interlaced processing; The data of the line is output to the luminance processing unit 516 and the chroma processing unit 517, and in the case of the sequential scanning method, the data of the n-2, n, n + 2 lines and n-1 of the 5-line buffer 514. outputs data of n, n + 1 lines to the luminance processor 516 and the chroma processor 517, respectively. A 5x3 multiplexer 515 is included.

Referring to the operation and effect of the embodiment of the present invention configured as described above in detail.

First, in the case of the interlaced scanning method for a CCD input equipped with a single-plate complementary color filter as shown in FIG. 1, even / odd skips the sum of two adjacent up and down lines by one line as in the conventional method. Alternately select (Cy + G)-> (Ye + Mg)… -> (Cy + Mg)-> (Ye + G)... By sequentially inputting, the data as shown in FIG. 4 is stored in the 5-line buffer 514 through the 2x1 multiplexer 513.

At this time, only data of n-2, n, n + 2 lines among the data stored in the 5-line buffer 514 is used as the CCD interpolation data.

Accordingly, when the 5x3 multiplexer 515 selects CCD data of n-2, n, n + 2 lines of the 5-line buffer 514 and inputs them to the luminance processor 516 and the chroma processor 517, the luminance processor In operation 516, luminance Y data is generated, and the chroma processing unit 517 generates chroma (Cb / Cr) data.

Therefore, the luminance (Y) data and the chroma (Cb / Cr) data are processed to generate primary color (R, G, B) data, thereby displaying a color image on the display device.

In addition, in the case of the sequential scanning method for the CCD input equipped with the single-plate complementary color filter of FIG. The CCD inputs of the one-line delayed sequential scanning method are summed in the adder 512 and then stored in the five-line buffer 514 in the arrangement as shown in FIG. 4 through the 2x1 multiplexer 513.

In other words, the progressive scan CCD input is converted into the same data format as the interlaced CCD input and stored in the 5-line buffer 514.

Here, the sequential scanning CCD input is input data which sequentially reads all the pixel data of the array of FIG. 1, and n-1, n, n + 1 of the data stored in the 5-line buffer 514 for the sequential scanning method. The data of the line and the data of the n-2, n, n + 2 lines are all used separately.

Accordingly, the 5x3 multiplexer 515 selects the CCD data of n-1, n, n + 1 lines of the 5-line buffer 514 to the luminance processor 516, and n-2, n, n-2. When the CCD data of the line is selected and input to the saturation processor 517, the luminance processor 516 generates luminance Y data, and the saturation processor 517 generates chroma (Cb / Cr) data. .

In the above, the luminance processor 516 processes the CCD data of the n-1, n, and n + 1 lines of the five-line buffer 514 to compensate for image quality degradation occurring in the vertical direction, thereby improving resolution.

Therefore, the luminance (Y) data and the chroma (Cb / Cr) data are processed to generate primary color (R, G, B) data, thereby displaying a color image on the display device.

Meanwhile, in the above interlaced image processing and sequential scanning image processing, only three lines of data of the 5-line buffer 514 are required to generate luminance data and saturation data. It can also be configured as an alternative to 3x3 multiplexers.

In conclusion, the present invention can implement the HD ISP circuit by adding only a simple logic circuit to the existing SD ISP circuit as shown in FIG.

Although the embodiments of the present invention have been described in detail above, it will be understood that the present invention can be embodied in various forms without departing from the spirit and essential characteristics of the present invention by those skilled in the art. Could be.

511, 514: line buffer 512: adder
513, 515: multiplexer 516: luminance processing unit
517: chroma processing unit

Claims (4)

Data format converting means for converting the progressive scan CCD input into an interlaced CCD input;
A 2x1 multiplexer for selecting interlaced CCD input for interlaced processing and for selecting output data of the data format converting means for progressive scanning;
A five-line buffer for storing output data of the multiplexer;
And a 5x3 multiplexer for selecting data of three lines of the 5-line buffer and outputting the data to the luminance processor and the chroma processor. The data format conversion means according to claim 1,
A line buffer that delays the progressive scanning CCD input by one line,
An interlaced scanning / sequential scanning type image processing apparatus, comprising: an adder for sequential scanning type CCD input and an output data of the line buffer. The system of claim 1, wherein the 5x3 multiplexer
In the case of interlaced processing, the data of n-2, n, n + 2 lines of the 5-line buffer is output to the luminance processing unit and the chroma processing unit,
The interlaced scanning / sequential scanning type image processing apparatus according to claim 1, wherein the data of n-1, n, n + 1 lines of the five-line buffer is output to the luminance processing unit and the chroma processing unit in the case of the progressive scanning method. 4. The interlaced / sequential scan image processing method according to claim 1 or 3, wherein the 5x3 multiplexer is replaced by two 3x3 multiplexers so as to select interlaced data and sequential scan data respectively. Device.

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