KR20120077278A - Micro-controller in semiconductor device - Google Patents

Micro-controller in semiconductor device Download PDF

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Publication number
KR20120077278A
KR20120077278A KR1020100139178A KR20100139178A KR20120077278A KR 20120077278 A KR20120077278 A KR 20120077278A KR 1020100139178 A KR1020100139178 A KR 1020100139178A KR 20100139178 A KR20100139178 A KR 20100139178A KR 20120077278 A KR20120077278 A KR 20120077278A
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KR
South Korea
Prior art keywords
option
signals
control signals
metal
outputting
Prior art date
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KR1020100139178A
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Korean (ko)
Inventor
유병성
Original Assignee
에스케이하이닉스 주식회사
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Priority to KR1020100139178A priority Critical patent/KR20120077278A/en
Publication of KR20120077278A publication Critical patent/KR20120077278A/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4247—Bus transfer protocol, e.g. handshake; Synchronisation on a daisy chain bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7839—Architectures of general purpose stored program computers comprising a single central processing unit with memory
    • G06F15/7842—Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers)
    • G06F15/7853—Architectures of general purpose stored program computers comprising a single central processing unit with memory on one IC chip (single chip microcontrollers) including a ROM
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/78—Architectures of general purpose stored program computers comprising a single central processing unit
    • G06F15/7896—Modular architectures, e.g. assembled from a number of identical packages

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE: A microcontroller of a semiconductor device is provided to reduce the operation of a microcontroller by outputting one control signal as a plurality of output control signals according to a connection state of a metal wire. CONSTITUTION: A command decoder(300) outputs a plurality of control signals by decoding ROM data according to a decoder control signal. An output register(400) outputs a plurality of inner control signals after the plurality of control signals are temporarily stored. A metal option unit(500) outputs a plurality of option signals by selectively connecting control lines for inputting the inner control signals to control lines for outputting the option signals. A glue logic unit(600) outputs micro control signals in response to the plurality of option signals.

Description

Micro-controller in semiconductor device

The present invention relates to a microcontroller of a semiconductor device, and more particularly to a microcontroller of a semiconductor device that can reduce the operating time.

The micro controller includes arithmetic units and peripherals necessary for system control. The microcontroller outputs a plurality of control signals for controlling the operation of the system as the operation control program is executed.

The microcontroller controls the output of control signals using a single latch or dual latch to simultaneously process one or two instructions. Therefore, as the number of simultaneous control signals increases, the number of output registers must be increased to be equal to the number of control signals. Therefore, the area and power consumption of the microcontroller increase rapidly, and the control for generating a plurality of control signals is performed. By repeatedly performing the signal generation operation, the operation time of the microcontroller is increased.

SUMMARY OF THE INVENTION The present invention has been made in an effort to provide a microcontroller of a semiconductor device capable of reducing an operation time of a microcontroller by outputting one control signal as a plurality of output control signals according to a metal wiring connection state.

A microcontroller of a semiconductor device according to an embodiment of the present invention includes an operation unit for outputting a ROM address and a decoder control signal according to an external input signal and a command signal, and a storage for outputting ROM data according to the ROM address. A command decoder for decoding the ROM data according to the decoder control signal and outputting a plurality of control signals, an output register for temporarily storing the plurality of control signals and then outputting a plurality of internal control signals; A metal option unit configured to output a plurality of option signals by selectively connecting the control lines to which the plurality of internal control signals are input and the control lines to which the option signals are output, and an internal circuit in response to the plurality of option signals. Glue for outputting micro control signals for controlling It includes.

A microcontroller of a semiconductor device according to an embodiment of the present invention may include an operation unit for outputting a ROM address and a decoder control signal according to an input signal and a command signal input from an external device, and a storage for outputting ROM data according to the ROM address. A command decoder for decoding the ROM data according to the decoder control signal and outputting a plurality of control signals, an output register for temporarily storing the plurality of control signals and then outputting a plurality of internal control signals; Generate a plurality of option signals according to the plurality of internal control signals, at least one of the plurality of internal control signals according to the connection state of the metal wiring at least two of the same activation interval of the plurality of option signals A metal option unit for outputting option signals, and the plurality of options In response to calls include glue logic for outputting a micro-control signals.

According to an exemplary embodiment of the present disclosure, the operation time of the microcontroller may be reduced by outputting one control signal as a plurality of output control signals according to the metal wire connection state.

1 is a configuration diagram showing a microcontroller of a semiconductor device according to the present invention.
FIG. 2 is a diagram illustrating a metal option part of FIG. 2.
3 is a circuit diagram illustrating a first metal option of FIG. 2.
4 is a circuit diagram illustrating a second metal option of FIG. 2.
5 is a waveform diagram of signals for explaining a control signal output operation of the microcontroller according to the present invention.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be implemented in various forms, and the scope of the present invention is not limited to the embodiments described below. Only this embodiment is provided to complete the disclosure of the present invention and to fully inform those skilled in the art, the scope of the present invention should be understood by the claims of the present application.

1 is a configuration diagram showing a microcontroller of a semiconductor device according to the present invention.

Referring to FIG. 1, the microcontroller 1000 of the semiconductor device may include an operation unit 100, a ROM 200, a command decoder 300, an output register 400, a metal option unit 500, and glue logic ( 600).

The calculation unit 100 outputs a ROM address signal ROMADD and a decoder control signal CMP in response to an external input signal and a command signal CTLBUS.

The ROM 200 stores an algorithm program for controlling the operation of the semiconductor device, and outputs ROM data ROMDATA in response to the ROM address signal ROMADD output from the calculator 100. .

The command decoder 300 decodes the ROM data ROMDATA according to the decoder control signal CMP output from the calculator 100 and outputs the ROM data ROMDATA as a plurality of internal control signals MC_BUS_A and MC_BUS_B.

The output register 400 receives and temporarily stores a plurality of internal control signals MC_BUS_A and MC_BUS_B, and outputs them as a plurality of control signals MC_OUT <255: 0>. The output register 400 includes a dual latch 410 and a single latch 420. The dual latch 410 receives a plurality of internal control signals MC_BUS_A and MC_BUS_B through two input ports (for example, the A and B ports) and temporarily stores the plurality of control signals MC_OUT <63: 0>. ) The single latch 420 receives a plurality of internal control signals MC_BUS_A through one input port (for example, A port) and temporarily stores them, and then outputs a plurality of control signals MC_OUT <255: 64>. do. The dual latch 410 and the single latch 420 are composed of a plurality of registers.

The metal option unit 500 receives a plurality of control signals MC_OUT <255: 0> and outputs a plurality of option signals MC_OUT_X <255: 0> according to the metal wire connection state therein. That is, at least one option signal is activated when one control signal is activated according to the metal wire connection state therein.

The glue logic 600 receives a plurality of option signals MC_OUT_X <255: 0> and receives a plurality of micro control signals for controlling internal circuits of the semiconductor device, for example, a decoder, a page buffer, and a data path control circuit. MC_CS) is output.

FIG. 2 is a diagram illustrating a metal option part of FIG. 2.

Referring to FIG. 2, the metal option unit 500 includes first to nth metal options 510 to 540. Each of the first to n-th metal options 510 to 540 receives a plurality of control signals MC_OUT <255: 0> and outputs a plurality of option signals MC_OUT_X <255: 0> according to an internal wiring connection state. do. The first metal option 510 may receive one control signal and output up to three option signals. The second metal option 520 may receive one control signal and output up to five option signals. The third metal option 530 may receive one control signal and output up to seven option signals. According to each metal option, when one control signal is activated, the number of option signals that are activated can be adjusted. For example, when the control signal MC_OUT <0> is output as four option signals, the metal wire connection relationship of the second metal option 520 is adjusted, and then the control signal MC_OUT <0> is converted to the second metal option. If input to 520, the metal option 520 outputs the number of option signals.

3 is a circuit diagram illustrating a first metal option of FIG. 2.

Referring to FIG. 3, the first metal option 510 includes first to third wire connection parts 511 to 513. Each of the first to third wire connection parts 511 to 513 includes one input terminal and two output terminals. An input terminal receives a control signal (for example, MC_OUT <0>), and one of the two output terminals outputs an option signal (for example, MC_OUT_X <0> or MC_OUT_X <1> or MC_OUT_X <2>). And the other output terminal is floating. For example, when one control signal MC_OUT <0> is output as three option signals MC_OUT_X <2: 0>, each input terminal of the first to third wire connection parts 511 to 513 may be formed. One of the output terminals of the first to third wire connection units 511 to 513 is connected to a wire for outputting an option signal. Therefore, when one control signal MC_OUT <0> is activated, it is output as three option signals MC_OUT_X <2: 0>.

4 is a circuit diagram illustrating a second metal option of FIG. 2.

Referring to FIG. 4, the second metal option 520 includes first to fifth wire connection parts 521 to 525. Each of the first to fifth wire connection parts 521 to 525 includes one input terminal and two output terminals. The input terminal receives a control signal (for example MC_OUT <k>), and one of the two output terminals is an optional signal (for example, MC_OUT_X <k> or MC_OUT_X <k + 1> or MC_OUT_X <k + 2> or MC_OUT_X <k + 3> or MC_OUT_X <k + 4>) is connected to the wiring, and the other output terminal is floating. For example, if one control signal MC_OUT <k> is output as four option signals MC_OUT_X <k>, MC_OUT_X <k + 2>, MC_OUT_X <k + 3>, and MC_OUT_X <k + 4>, Each input terminal of the first and third to fifth wire connection parts 521 and 523 to 525 outputs an option signal among the output terminals of the first and third to fifth wire connection parts 521 and 523 to 525. It is connected to the wiring. Also, the input terminal of the second wiring connection part is connected to the output terminal in the floating state. Therefore, when one control signal MC_OUT <k> is activated, four option signals MC_OUT_X <k>, MC_OUT_X <k + 2>, MC_OUT_X <k + 3>, and MC_OUT_X <k + 4> are activated and output. And the option signal MC_OUT_X <k + 1 is deactivated (floating state).

5 is a waveform diagram of signals for explaining a control signal output operation of the microcontroller according to the present invention.

1 to 5, when the input signal and the command signal CTLBUS are attracted to the operation unit 100, the operation unit 100 outputs the ROM address signal ROMADD and the decoder control signal CMP. . The ROM 200 outputs ROM data ROMDATA corresponding to an algorithm program in response to the ROM address signal ROMADD output from the calculator 100. The command decoder 300 decodes the ROM data ROMDATA according to the decoder control signal CMP output from the calculator 100 and outputs the ROM data ROMDATA as a plurality of internal control signals MC_BUS_A and MC_BUS_B.

The output register 400 receives and temporarily stores a plurality of internal control signals MC_BUS_A and MC_BUS_B, and then outputs a plurality of control signals MC_OUT <255: 0>.

The metal option unit 500 receives a plurality of control signals MC_OUT <255: 0> and outputs a plurality of option signals MC_OUT_X <255: 0> according to the metal wire connection state therein. In this case, when the metal option is configured as shown in FIG. 4, a plurality of option signals MC_OUT_X <k, k + 2, k + 3, and k + 4> are activated in response to one control signal MC_OUT <k>. do.

The glue logic 600 receives a plurality of option signals MC_OUT_X <255: 0> and receives a plurality of micro control signals for controlling internal circuits of the semiconductor device, for example, a decoder, a page buffer, and a data path control circuit. MC_CS) is output.

According to the present invention described above, the microcontroller is configured to generate a plurality of option signals MC_OUT_X <k, k + 2, k + 3, and k + 4 according to one control signal (for example, MC_OUT <k>) generated during one cycle. >) And by outputting a plurality of micro control signals MC_CS for controlling the internal circuits of the semiconductor device using a plurality of option signals, thereby reducing the operating time for the microcontroller to output the plurality of control signals. do. In addition, since the number of registers included in the control signal latch unit can be reduced, the area can be reduced.

100: control signal generating unit 200: control signal latching unit
300: metal option unit 400: control signal output unit

Claims (12)

A calculation unit for outputting a ROM address and a decoder control signal according to an input signal and a command signal input from an external device;
A storage unit for outputting ROM data according to the ROM address;
A command decoder for decoding the ROM data according to the decoder control signal and outputting a plurality of control signals;
An output register for outputting a plurality of internal control signals after temporarily storing the plurality of control signals;
A metal option unit configured to selectively connect control lines to which the plurality of internal control signals are input and control lines to which the option signals are output and output a plurality of option signals; And
And glue logic for outputting micro control signals for controlling internal circuitry of the semiconductor device in response to the plurality of option signals.
The method of claim 1,
And the metal option unit outputs at least two option signals having the same activation period among the plurality of option signals according to at least one of the plurality of internal control signals.
The method of claim 1,
And the storage unit is configured to output the ROM data corresponding to an algorithm program according to the ROM address.
The method of claim 1,
And the metal option unit includes a plurality of metal option units.
The method of claim 4, wherein
And each of the plurality of metal option units outputs any one of the plurality of control signals as at least two of the plurality of option signals according to a connection state of a metal wiring.
The method of claim 4, wherein
Each of the plurality of metal option units includes a plurality of metal wire connection units, and the number of the plurality of option signals output according to a connection state of the input terminal and the output terminal of the plurality of metal wire connection units is controlled.
The method of claim 4, wherein
And each of the plurality of metal option units outputs the plurality of control signals as three, five, seven or less of the plurality of option signals.
A calculation unit for outputting a ROM address and a decoder control signal according to an input signal and a command signal input from an external device;
A storage unit for outputting ROM data according to the ROM address;
A command decoder for decoding the ROM data according to the decoder control signal and outputting a plurality of control signals;
An output register for outputting a plurality of internal control signals after temporarily storing the plurality of control signals;
Generate a plurality of option signals according to the plurality of internal control signals, at least one of the plurality of internal control signals according to the connection state of the metal wiring at least two of the same activation interval of the plurality of option signals A metal option unit for outputting option signals; And
And glue logic for outputting micro control signals for controlling internal circuitry of the semiconductor device in response to the plurality of option signals.
The method of claim 8,
And the storage unit is configured to output the ROM data corresponding to an algorithm program according to the ROM address.
The method of claim 8,
And the metal option unit includes a plurality of metal option units.
11. The method of claim 10,
Each of the plurality of metal option units includes a plurality of metal wire connection units, and the number of the plurality of option signals output according to a connection state of the input terminal and the output terminal of the plurality of metal wire connection units is controlled.
The method of claim 3, wherein
And each of the plurality of metal option units outputs the plurality of control signals as three, five, seven or less of the plurality of option signals.
KR1020100139178A 2010-12-30 2010-12-30 Micro-controller in semiconductor device KR20120077278A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20200042358A (en) * 2018-10-15 2020-04-23 에스케이하이닉스 주식회사 Memory device and operating method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20200042358A (en) * 2018-10-15 2020-04-23 에스케이하이닉스 주식회사 Memory device and operating method thereof

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