KR20110089975A - Memory apparatus and method for initialization - Google Patents

Memory apparatus and method for initialization Download PDF

Info

Publication number
KR20110089975A
KR20110089975A KR1020100009508A KR20100009508A KR20110089975A KR 20110089975 A KR20110089975 A KR 20110089975A KR 1020100009508 A KR1020100009508 A KR 1020100009508A KR 20100009508 A KR20100009508 A KR 20100009508A KR 20110089975 A KR20110089975 A KR 20110089975A
Authority
KR
South Korea
Prior art keywords
data
substrips
trim command
memory device
substrip
Prior art date
Application number
KR1020100009508A
Other languages
Korean (ko)
Inventor
김진규
백승훈
Original Assignee
삼성전자주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자주식회사 filed Critical 삼성전자주식회사
Priority to KR1020100009508A priority Critical patent/KR20110089975A/en
Publication of KR20110089975A publication Critical patent/KR20110089975A/en

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076Parity data used in redundant arrays of independent storages, e.g. in RAID systems
    • G06F11/108Parity data distribution in semiconductor storages, e.g. in SSD
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629Configuration or reconfiguration of storage systems
    • G06F3/0632Configuration or reconfiguration of storage systems by initialisation or re-initialisation of storage systems
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/40Specific encoding of data in memory or cache
    • G06F2212/403Error protection encoding, e.g. using parity or ECC codes

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Quality & Reliability (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE: A memory initialization apparatus and a method thereof are provided to rapidly initialize a memory by reducing the number of sub scrip reading and writing operation. CONSTITUTION: An interface unit(110) receives a trim command from a host device. A first storage(130) includes a plurality of disk which is composed of a plurality of sub strips. A first storage divides data to a plurality of sub strips and records the divided data. A controller(120) determines the support of a trim command. The controller invalidates the sub strip in which data corresponding to the trim command is recorded.

Description

Memory device and its initialization method {MEMORY APPARATUS AND METHOD FOR INITIALIZATION}

Embodiments of the present invention relate to a memory device and a method for initializing the data thereof, and more particularly, to a memory device for initializing a storage space by invalidating a substrip using a trim command and a method of initializing the same.

In general, a RAID (Redundant Arrays of Inexpensive Disks) memory device is a technology that treats multiple disk drivers as a single device, but operates independently for each other. Such a RAID memory device can replace one large and expensive driver by connecting a plurality of small and inexpensive disk drivers, and have an advantage of preserving data in case of failure. In order to use the storage function of the RAID memory device, an initialization operation for the entire storage area is required.

A conventional HDD (Hard Disk Drive) based RAID memory device performs an initialization operation by using a zeroing method of overwriting an entire storage area with "0". In addition, when writing new data to the storage area, reading the substrip of the data storage area and the substrip of the parity storage area, the exclusive OR operation operation, and writing the new data to the data strip and corresponding to the new data. Parity must be generated and written to the parity strip.

However, since the SSD (Solid State Drive) based RAID memory device composed of flash memory is difficult to overwrite, the performance is degraded when initializing using a zeroing method such as a HDD (Hard Disk Drive) based RAID memory device. there was. In addition, in order to record new data, since a number of steps must be taken, there is a problem that the overhead is increased and the life of the SDD is reduced.

A memory device according to an embodiment of the present invention includes an interface unit for receiving a trim command from a host device, a plurality of disks including a plurality of substrips, and divided and recorded data in the plurality of substrips. And a controller configured to determine whether to support the trim command and to invalidate the plurality of substrips.

In the meantime, in the initialization method of a memory device including a plurality of disks composed of a plurality of substrips, the method includes receiving a trim command from a host device and determining whether the trim command function is supported. And invalidating the plurality of substrips if the trim command is supported.

According to an embodiment of the present invention, the storage space may be initialized by invalidating the substrips constituting each disk by using the trim command. Accordingly, the number of times of reading and writing a plurality of substrips is reduced compared to the conventional zeroing method, so that the initialization operation can be performed quickly, and the writing performance and lifespan of the memory device can be improved.

1 is a diagram illustrating a disk structure of a memory device according to an embodiment of the present invention.
2 is a block diagram illustrating a configuration of a memory device according to an embodiment of the present invention.
3 is a block diagram illustrating a method of initializing a memory device according to an embodiment of the present invention.
4 is a diagram illustrating a data initialization form according to an embodiment of the present invention.
5 is a diagram illustrating a response form of a read request according to an exemplary embodiment of the present invention.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. In describing the present invention, when it is determined that detailed descriptions of related known functions or configurations may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted. Terminology used herein is a term used to properly express a preferred embodiment of the present invention, which may vary depending on a user, an operator's intention, or a custom in the field to which the present invention belongs. Therefore, the definitions of the terms should be made based on the contents throughout the specification. Like reference numerals in the drawings denote like elements.

1 is a diagram illustrating a structure of a memory device according to an embodiment of the present invention. The memory device 100 illustrated in FIG. 1 is mounted on the host device 10 and reads or writes data and initializes a storage space according to commands received from the host device 10. In addition, the memory device 100 is a RAID disk based on a solid state drive (SSD) configured of a flash memory, and includes a plurality of first to fourth disks 150, 160, 170, and 180. In this case, each of the first to fourth disks 150, 160, 170, and 180 may be formed by grouping several flash memories, which are nonvolatile memory devices.

In addition, the memory device 100 shown in FIG. 1 has a disk structure corresponding to the RAID-4 level of the RAID disks. That is, the first to third disks 150, 160, and 170 are disks for storing data, and the fourth disk 180 is a disk for storing parity for checking and correcting data errors.

Each of the first to fourth disks 150, 160, 170, and 180 includes a sub strip that is a data storage space, and a set of sub strips may be viewed as one strip. For example, the first disk 150 includes the first to fourth sub strips 151a, 151b, 151c, and 151d, and the first to fourth substrips 151a, 151b, 151c, and 151d are one. It may be a strip 151. In addition, each of the first to fourth sub-strips 151a, 151b, 151c, and 151d may be composed of pages of a predetermined size.

Meanwhile, the memory device 100 undergoes an initialization process of a storage space in order to record data on the first to third disks 150, 160, and 170. In detail, when the trim command is received from the host device 10, the memory device 100 determines whether the trim command is supported. If the memory device 100 supports a trim command, the corresponding substrip on which data corresponding to the trim command is written is invalidated.

On the other hand, if the memory device 100 does not support the trim command, a zeroing method of physically changing the storage space to “0” is used. In this case, the zeroing method is not applied to the entire storage space as conventionally, but reads a plurality of substrips constituting the first to third disks 150, 160, 170, and is not initialized, that is, " Only a substrip in which data other than 0 "is recorded is initialized to" 0 ". When the substrip is initialized as described above, an exclusive logical OR (XOR) operation of the substrips existing in the same row of the first to third disks 150, 160, and 170 generates parity, and the parity of the fourth disk 180 is determined. Record on the substrip. In this case, when the data of the substrips existing in the same row of the first to third disks 150, 160, and 170 are all "0", the parity generated by the exclusive OR operation may also be "0". Can be.

Meanwhile, in the memory device 100, a read command of predetermined data from the host device 10 is executed while the storage spaces of the first to fourth disks 150, 160, 170, and 180 are initialized by the above-described methods. When received, it is determined whether the substrip in which the data is stored is in an invalid state. If the sub strip is in an invalid state, the memory device 100 transmits specific data to the host device 10 in response to the read command. In this case, the specific data may be data in which a value of "0" or "1" is listed, and preferably "0". This is because the memory device 100 transmits the data of "0" to the host device 10 when the substrip is initialized to "0" rather than the invalidated state.

On the other hand, in the memory device 100 in the state that the storage space of the first to fourth disks (150, 160, 170, 180) by the above-described method is initialized, the write command of the predetermined data from the host device 10 When received, data is written onto the invalidated substrip or substrip initialized to "0". Therefore, in the initialization process of the storage space, the memory device 100 may reduce the number of times of reading and writing the plurality of sub strips so that the initialization operation may be performed quickly. In addition, as the number of reading and writing of the plurality of sub strips is reduced, overhead may be reduced, thereby improving performance of the memory device.

In FIG. 1, only the first to fourth disks 150, 160, 170, and 180 which are storage spaces are illustrated, but the memory device 100 controls interface means and disks for communication with the host device 10. Control means, and the like, which will be described in detail with reference to FIG. 2. In addition, although the disk structure according to the RAID-4 level is shown in FIG. 1, this is only an embodiment, and the number or structures of the disks may be different.

2 is a block diagram illustrating a configuration of a memory device according to an embodiment of the present invention. The memory device 100 shown in FIG. 2 includes an interface unit 110, a first storage unit 130, a second storage unit 140, and a controller 130.

The interface unit 110 is connected to the host device 10 to receive a trim command, a data read command, and a data write command from the host device 10. In this case, the interface unit 110 may use a SATA standard interface that has a high data processing speed.

Meanwhile, when there is a deletion request for data that is no longer used by the file system of the host device 10, the host device 10 issues a trim command to the memory device 100 to invalidate a substrip in which the data is stored. Will be sent. Accordingly, the interface unit 110 may receive a trim command.

The first storage unit 130 is a storage medium for recording data, and includes first to fourth disks 150, 160, 170, and 180 grouped into a plurality of flash memories. In this case, the first to third disks 150, 160, and 170 provide a space for storing data, and the fourth disk 180 provides a space for storing parity for data. In addition, the first to fourth disks 150, 160, 170, and 180 each include a strip composed of a plurality of sub strips, as shown in FIG. 1.

In addition, the second storage unit 140 stores mapping information and metadata. In this case, the mapping information is information indicating a mapping relationship between logical addresses corresponding to data and physical addresses, that is, which logical addresses are mapped to which physical addresses.

The meta data is information including invalidation information for a plurality of substrips. In this case, the meta data has a recognition position corresponding to each of the plurality of sub strips, and if the recognition position is marked, the corresponding sub strip is invalidated. In addition, mapping information and metadata may be managed by a flash translation layer (FTL), which is a kind of firmware.

The controller 120 controls an initialization operation, a data read operation, a data write operation, and the like of the memory device 100. When the trim command is received through the interface unit 110, the controller 120 checks whether the trim command is supported.

If the trim command is supported, the controller 120 cancels the mapping between the logical address corresponding to the data and the physical address and invalidates the logical address and the physical address. In this case, as the physical address is invalidated, the substrip corresponding to the physical address is also invalidated, and the data recorded in the substrip is also changed to invalid data. Invalid data is data which cannot be read, and valid data is data which can be read. As the substrip is invalidated as described above, the controller 120 no longer manages the substrip.

In order to use the storage function of the memory device 100, the first storage unit 130 used as the storage medium must be initialized. Therefore, when the trim command is received, the controller 120 invalidates the substrip in which data corresponding to the trim command is recorded in the first storage unit 130. In this case, as the substrip is invalidated, valid data recorded on the substrip is also changed to invalid data. In addition, even if the substrip is invalidated, the valid data recorded in the substrip is not deleted, but no longer managed by the memory device 100.

The invalidation of the substrip can be accomplished by invalidating the mapping information between the logical address for the valid data and the physical address corresponding to the storage space in which the valid data is recorded. Specifically, the logical address for valid data corresponding to the trim command and the physical address mapped to the logical address are invalidated. In addition, when the mapping between the logical address and the physical address is invalidated, the controller 120 deletes the mapping information corresponding to the mapping from the second storage 140.

When the substrip is invalidated in the above-described manner, the controller 120 records invalidation information for the substrip on the metadata stored in the second storage 140. As described above, the meta data includes recognition positions corresponding to each of the plurality of sub strips, and the invalidation information is recorded by marking the recognition positions corresponding to the invalidated sub strips.

If the trim command is not supported, the controller 120 uses a zeroing method of physically changing the storage space to “0”. In this case, the zeroing method reads a plurality of substrips constituting the first to third disks 150, 160, 170, and selectively initializes only the substrips in which data other than "0" is recorded to "0". Is done in a way. When the substrip is initialized in this manner, an exclusive logical OR (XOR) operation of the substrips existing in the same row of the first to third disks 150, 160, and 170 generates parity, and the parity is defined as the fourth disk ( Write to the sub-strip of 180).

Meanwhile, when a data read command is received through the interface unit 110, the controller 120 checks whether the substrip in which the corresponding data is stored is initialized. That is, it is checked whether the substrip is in the invalid state, in the valid state, or recorded as "0". If the substrip is in an invalid state, the controller 120 controls the interface unit 110 to transmit a specific data value to the host device 10 in response to the read command. In this case, the specific data value may be data in which a value of "0" or "1" is listed, and preferably data in which a value of "0" is listed.

In addition, when the substrip in which the corresponding data is stored is recorded as "0", the controller 120 controls the interface unit 110 to transmit "0" to the host device 10 in response to the read command. When the substrip in which the data is stored is in the valid state, the controller 120 controls the interface unit 110 to transmit valid data recorded in the substrip to the host device 10.

Meanwhile, when a data recording command is received through the interface unit 110, the controller 120 controls the first storage unit 130 to record data in the substrip initialized according to the recording command. When data is recorded on the substrip as described above, the controller 120 stores the mapping information between the logical address and the physical address corresponding to the data and deletes the invalidation information of the substrip from the metadata. To control.

In the memory device 100 shown in FIG. 2, the number of times of reading and writing a plurality of substrips is reduced during the initialization of the storage space, so that the initialization operation can be quickly performed. In addition, as the number of times of reading and writing the plurality of sub strips is reduced, overhead can be reduced, thereby improving the recording performance and the life of the memory device.

3 is a block diagram illustrating a method of initializing a memory device according to an embodiment of the present invention. Referring to FIG. 3, when a trim command is received from the host device 10 (step 310), the memory device 100 determines whether the trim command is supported (step 315).

If the trim command is supported (step 315: YES), the memory device 100 invalidates the sub strip corresponding to the trim command to initialize the storage space (step 320). In this case, the substrip may be a substrip in which data corresponding to a trim command is stored. In order to invalidate this substrip, the mapping between the logical address for the data and the physical address mapped to the logical address is terminated. When the substrip is invalidated as described above, the memory device 100 reflects invalidation information of the substrip in the meta data (step 325).

On the other hand, if the trim command is not supported (step 315: NO), the memory device 100 reads the plurality of sub strips to initialize the storage space (step 330). If there is a substrip not recorded as "0" among the plurality of substrips (step 335: YES), "0" is recorded in the corresponding substrip (step 340). In operation 345, an exclusive OR is performed on the corresponding substrip and other substrips, and the generated parity is stored in the parity storage disk (step 350). Then, it is checked whether all the substrips are initialized (step 355), and if not, the steps 335 to 350 are repeated.

On the other hand, when a data write command is received from the host device 10 (step 360), the memory device 100 writes data to the invalidated substrip (step 365). In this case, when data is recorded on the substrip, the mapping information and the meta data are corrected.

Although not shown in the drawing, when a data read command is received from the host device 10, the memory device 100 refers to metadata to determine whether the substrip on which the data is written is in an invalid state or an invalid state. Or check if it is recorded as "0". In the invalid state, specific data "0" is transmitted to the host device 10. When the data is enabled, the data recorded in the sub strip is transmitted to the host device 10.

4 is a diagram illustrating an initialization form of a substrip according to an exemplary embodiment of the present invention. The memory device 100 is an SSD-based RAID storage medium. In this case, the memory device 100 includes a plurality of disks in which several flash memories are grouped together, and each disk is composed of a plurality of sub strips to divide and record data in the plurality of sub strips. In this case, the plurality of substrips may consist of a plurality of pages.

When the trim command for data is received from the host device 10, the memory device 100 invalidates a logical address for the data and a physical address mapped to the logical address. In this case, the logical addresses for the data are mapped to the physical addresses where the data is physically stored. In this case, the physical addresses are divided into page units constituting the substrip.

As shown in FIG. 4, when a trim command for a given data is received, a logical page number (LPN), LPN1, and LPN2, which are logical addresses for the data, and a PPN, which is a physical address mapped to each of LPN0, LPN1, and LPN2, is shown. (Physical Page Number) 3, PPN0 and PPN5 are invalidated. In this case, mapping information of LPN0, LPN1 and LPN2 and PPN3, PPN0 and PPN5 is deleted. Further, as PPN3, PPN0 and PPN5 are invalidated, the data recorded in PPN3, PPN0 and PPN5 also change from valid data to invalid data.

As shown in the right side of Figure 4, LPN0, LPN1 and LPN2 and PPN3, PPN0 and PPN5 is shown in the invalidation state after the mapping is terminated, it can be seen that the data recorded in PPN3, PPN0 and PPN5 has been changed to invalid data .

5 is a diagram illustrating a response form of a read request according to an exemplary embodiment of the present invention. In a state in which the storage space is initialized in the same manner as in FIG. 4, when a read command is received from the host device 10, the memory device 100 invalidates a logical address corresponding to data and a physical address mapped to the logical address. Check if the status is valid or valid. In this case, the validation of the invalidation state and the validation state can be made using meta data.

If the logical addresses corresponding to the data are LPN0, LPN1 and LPN2, and it is determined that the PPN3, PPN0 and PPN5 mapped to the LPN0, LPN1 and LPN2 and LPN0, LPN1 and LPN2 are invalidated, the memory device 100 Data # 1 listed as a value of "0" or data # 2 listed as a value of "1" are transmitted to the host device 10.

As described above, although the present invention has been described with reference to the limited embodiments and the drawings, the present invention is not limited to the above embodiments, and those skilled in the art to which the present invention pertains various modifications and variations from such descriptions. This is possible.

Therefore, the scope of the present invention should not be limited to the described embodiments, but should be determined not only by the claims below but also by the equivalents of the claims.

100: memory device 110: interface unit
120: control unit 130: first storage unit
140: second storage unit

Claims (8)

An interface unit to receive a trim command from a host device;
A first storage unit including a plurality of disks formed of a plurality of substrips and dividing and recording data in the plurality of substrips; And
A control unit which determines whether to support the trim command and invalidates a substrip on which data corresponding to the trim command is recorded;
Memory device comprising a.
The method of claim 1,
A second storage unit which stores mapping information between a logical address and a physical address corresponding to the data,
The control unit,
And invalidating the mapping information in response to the trim command.
The method of claim 2,
A second storage unit which stores metadata in which invalidation information of the plurality of sub strips is marked,
The control unit,
The memory device reflects the recognition position corresponding to the plurality of substrips in the metadata based on the invalidated mapping information.
The method of claim 1,
The control unit,
If the trim command is not supported, the plurality of substrips are read to initialize an uninitialized substrip among the plurality of substrips, and an XOR operation of the initialized substrips generates parity, And write the parity in a parity storage area.
The method of claim 1,
The control unit,
And when receiving a data read command from the host device, determining whether the plurality of substrips on which the data is written are in an invalid state.
The method of claim 5,
The control unit,
And transmitting the specific data to the host device in response to the read command when the plurality of substrips are invalidated.
The method of claim 1,
The control unit,
And writing data into the plurality of invalidated substrips when a data write command is received from the host device.
In the initialization method of a memory device including a plurality of disks consisting of a plurality of substrips,
Receiving a trim command from a host device;
Determining whether the trim command function is supported; And
If the trim command is supported, invalidating a substrip on which data corresponding to the trim command is recorded;
Initialization method of a memory device comprising a.
KR1020100009508A 2010-02-02 2010-02-02 Memory apparatus and method for initialization KR20110089975A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020100009508A KR20110089975A (en) 2010-02-02 2010-02-02 Memory apparatus and method for initialization

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020100009508A KR20110089975A (en) 2010-02-02 2010-02-02 Memory apparatus and method for initialization

Publications (1)

Publication Number Publication Date
KR20110089975A true KR20110089975A (en) 2011-08-10

Family

ID=44927843

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020100009508A KR20110089975A (en) 2010-02-02 2010-02-02 Memory apparatus and method for initialization

Country Status (1)

Country Link
KR (1) KR20110089975A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12007884B2 (en) 2021-11-08 2024-06-11 Samsung Electronics Co., Ltd. Method of allocating and protecting memory in computational storage device, computational storage device performing the same and method of operating storage system using the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US12007884B2 (en) 2021-11-08 2024-06-11 Samsung Electronics Co., Ltd. Method of allocating and protecting memory in computational storage device, computational storage device performing the same and method of operating storage system using the same

Similar Documents

Publication Publication Date Title
US9104334B2 (en) Performance improvements in input/output operations between a host system and an adapter-coupled cache
US7930499B2 (en) Method to accelerate block level snapshots in archiving storage systems
KR101528714B1 (en) A method for operating a memory unit, and a memory controller
JP5841056B2 (en) Stripe-based memory operation
US9785575B2 (en) Optimizing thin provisioning in a data storage system through selective use of multiple grain sizes
US10776153B2 (en) Information processing device and system capable of preventing loss of user data
US9684591B2 (en) Storage system and storage apparatus
US8006027B1 (en) Method of staging small writes on a large sector disk drive
US8762622B2 (en) Enhanced MLC solid state device
US9304685B2 (en) Storage array system and non-transitory recording medium storing control program
US9514055B2 (en) Distributed media cache for data storage systems
US9923562B1 (en) Data storage device state detection on power loss
US9798623B2 (en) Using cache to manage errors in primary storage
TWI531963B (en) Data storage systems and their specific instruction enforcement methods
TW201024994A (en) Storage ststem snapshot assisted by SSD technology
US20140143476A1 (en) Usage of cache and write transaction information in a storage device
JP2019074897A (en) Storage control device, and program
US9158478B2 (en) Storage system and storage control method
US10031689B2 (en) Stream management for storage devices
US20130179634A1 (en) Systems and methods for idle time backup of storage system volumes
CN108304139B (en) Method and device for realizing space release in solid-state disk array
US10162573B2 (en) Storage management system, storage management method, storage medium and information processing system
KR20110089975A (en) Memory apparatus and method for initialization
US9639417B2 (en) Storage control apparatus and control method
US10452306B1 (en) Method and apparatus for asymmetric raid

Legal Events

Date Code Title Description
WITN Withdrawal due to no request for examination