KR20110080890A - Dc offset voltage correction apparatus and method in rfid system - Google Patents

Dc offset voltage correction apparatus and method in rfid system Download PDF

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KR20110080890A
KR20110080890A KR1020100001319A KR20100001319A KR20110080890A KR 20110080890 A KR20110080890 A KR 20110080890A KR 1020100001319 A KR1020100001319 A KR 1020100001319A KR 20100001319 A KR20100001319 A KR 20100001319A KR 20110080890 A KR20110080890 A KR 20110080890A
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signal
value
filter
offset
input signal
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윤석준
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삼성테크윈 주식회사
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/0723—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/07773—Antenna details
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K7/00—Methods or arrangements for sensing record carriers, e.g. for reading patterns
    • G06K7/10—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation
    • G06K7/10009—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation sensing by radiation using wavelengths larger than 0.1 mm, e.g. radio-waves or microwaves
    • G06K7/10297—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation sensing by radiation using wavelengths larger than 0.1 mm, e.g. radio-waves or microwaves arrangements for handling protocols designed for non-contact record carriers such as RFIDs NFCs, e.g. ISO/IEC 14443 and 18092
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K7/00—Methods or arrangements for sensing record carriers, e.g. for reading patterns
    • G06K7/10—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation
    • G06K7/10009—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation sensing by radiation using wavelengths larger than 0.1 mm, e.g. radio-waves or microwaves
    • G06K7/10316—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation sensing by radiation using wavelengths larger than 0.1 mm, e.g. radio-waves or microwaves using at least one antenna particularly designed for interrogating the wireless record carriers
    • G06K7/10336—Methods or arrangements for sensing record carriers, e.g. for reading patterns by electromagnetic radiation, e.g. optical sensing; by corpuscular radiation sensing by radiation using wavelengths larger than 0.1 mm, e.g. radio-waves or microwaves using at least one antenna particularly designed for interrogating the wireless record carriers the antenna being of the near field type, inductive coil
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00—Networks using digital techniques
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00—Networks using digital techniques
    • H03H2017/0072—Theoretical filter design
    • H03H2017/0081—Theoretical filter design of FIR filters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H17/00—Networks using digital techniques
    • H03H2017/0072—Theoretical filter design
    • H03H2017/009—Theoretical filter design of IIR filters

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  • General Health & Medical Sciences (AREA)
  • Artificial Intelligence (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Security & Cryptography (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

The present invention relates to an apparatus and method for correcting a DC offset voltage in a radio frequency identification (RFID) system, and more particularly, to a binary phase shift key (BPSK), a binary amplitude shift key (BASK), and a binary frequency shift key (FSK). The present invention relates to a DC offset voltage correction device and method in a binary digital RFID communication system.
The DC offset voltage correction device and method in the RFID system according to the present invention employs a digital average filter to improve the speed of signal processing, and at the same time, a finite impulse response (FIR) digital average filter for band limitation and DC offset removal By designing the Infinite Impulse Response (IRR) filter in parallel, we designed a structure that does not require a delay.
The apparatus and method for correcting a DC offset voltage in an RFID system according to the present invention has the advantage of performing low frequency noise removal at the same time as removing DC offset, and determining a sign value of a DC offset of an input signal to determine a positive value or a negative value. By performing the correction with the value, the problem that the offset correction was performed only with the negative value in the conventional apparatus was solved.

Figure P1020100001319

Description

DC offset voltage correction apparatus and method in RFID system

The present invention relates to an apparatus and method for correcting a DC offset voltage in an RFID system, and more particularly, to binary digital RFID such as a binary phase shift key (BPSK), a binary amplitude shift key (BASK), and a binary frequency shift key (BFSK). The present invention relates to an apparatus and method for compensating a DC offset voltage in a communication system.

RFID-Radio-Frequency IDentification (RFID) system is a system that communicates using frequency and consists of a reader and a tag.

When a reader requests information stored in a tag, it is a system that wirelessly receives and transmits power of a reader that requests communication, unlike other communication systems.

The communication method between reader and tag uses mutual induction method and electromagnetic wave method, and it uses the band of long wave, medium wave, short wave, ultra-short wave and ultra-short wave according to frequency band and it is used according to frequency band. And a communication method.

RFID system, a core technology of ubiquitous sensor network, is a non-contact identification technology that can collect and utilize information and surrounding environment information by attaching tag to things.

In particular, the 900MHz band RFID system is expected to bring about a significant change in distribution logistics, so the RFID standard ISO / IEC 18000-6B / C in the 900MHz ultrahigh frequency (UHF) band is expected to be widely used.

Amplification-shift keying (ASK) or phase-shift keying (PSK) scheme is used as a wireless communication modulation scheme from a tag of an RFID of a UHF (ultrahigh frequency) band to a reader.

In addition, the tag data encoding method is FM0 (Frequency Modulation 0) or Miller subcarrier (Miller Sub-carrier) method in 18000-6C, and the transmission method is Manchester in 18000-6B. Use the same FM0 (Frequency Modulation 0) method as -6C.

The receiver structure of RFID Reader is largely composed of digital ASK (Amplitude Shift Shift) demodulator and digital decoder.

The signal received from the antenna becomes a baseband signal through the downconverter MIXER and is converted into a digital signal through the AD converter.

The I-channel signal and Q-channel signal converted to digital signals are measured and demodulated by the ASK demodulation formula (Equation 1). The demodulated signal extracts data by detecting a preamble representing the start point of the signal by a digital sampling method. .

Figure pat00001

here,

Figure pat00002
Means the I axis,
Figure pat00003
Means Q axis. The DC component is included as the 1 + S [n] input signal, and the carrier component appears at the demodulator output.

The receiver of an RFID reader requires an IQ modulator, which requires a block to remove direct current components before producing an analytical signal.

In addition, the receiver suffers from deterioration of characteristics such as IQ imbalance and L0 feedthrough.

Conventional DC offset cancellation method removes DC offset by using a combination of a Finite Impulse Response (FIR) average filter and an Infinite Impulse Response (IIR) filter without using a digital filter as a filter for removing noise. Method was used.

1 is a schematic diagram of a method of removing a conventional DC offset.

In FIG. 1, the ADC 110 samples a signal input from a tag and converts the signal into a digital signal.

The decimation filter 120 removes harmonic components from the converted digital signal.

The matched filter 130 determines whether there is a pulse, emphasizes a required signal, suppresses noise, and reduces an error.

The finite impulse response (FIR) average filter 150 is a band limiting filter and outputs one sample at a clock.

The Infinite Impulse Response (IRR) average filter 160 obtains an absolute value of the input signal to obtain a DC offset value.

Conventionally, the delay unit 140 of the input signal is required to correct the DC offset.

The delay unit 140 is used to synchronize an input signal with a signal passed through a Finite Impulse Response (FIR) average filter 150 and an Infinite Impulse Response (IIR) average filter 160, and is a Finite Impulse Response (FIR) average filter. This is a problem caused by connecting the 150 and the Infinite Impulse Response (IRR) average filter 160 in series.

The adder 170 subtracts the signal output from the delayer 140 and the signal output from the IIR (Infinite Impulse Response) average filter 160 which estimates the DC offset, thereby removing the DC DC offset. Output the generated signal.

In the method shown in FIG. 1, the DC offset is estimated by obtaining filtering for many symbols when the DC offset is removed. However, the logic is complicated by using a large amount of computation and a digital filter that takes up a large area when implementing the ASIC. have.

In the RFID reader system, a strong transmission signal is leaked to the receiving end, and when the metal tag is used, the difference between the low frequency filtered level value and the DC value of inherent characteristics is applied to the system in a conventional manner. The addition of the signal does not attenuate the effects of the DC offset during calibration, but rather makes it larger.

Another conventional DC offset removal method includes a primary correction unit and a secondary correction unit, and FIG. 2 is a view showing another embodiment of the conventional DC offset removal method.

In FIG. 2, the primary compensator 210 corrects a receiver-specific DC offset to a preset fixed value or performs a calibration operation to an initial value set during an initial calibration operation.

The second correction unit 240 may generate a signal substantially synchronized with the received signal based on the synchronization information input from the outside.

Since the synchronization generated by the second correction unit 240 does not include the frequency distortion and the DC component of the signal, the DC component of the input signal is removed by the addition operation of the signal and the generated signal input to the DC component estimator 230. Use the method.

In the method of removing the DC offset in FIG. 2, a signal generator circuit of the same level is additionally input by the channel estimator and the frequency phase recovery, and the feedback is corrected by giving feedback to the input signal after the first estimation.

The method of reproducing a signal generated for signal distortion and DC offset correction based on a received signal has two disadvantages in that signal analysis is performed twice and system complexity increases.

Therefore, there is a problem that acts as a factor that increases the price of the system when applied to the RFID system.

The technical problem to be solved by the present invention is ASIC (application in binary digital RFID communication system, such as Binary Phase Shift Key (BPSK), Binary Amplitude Shift Key (BASK), Binary Frequency Shift Key (BFSK), etc.) The present invention relates to a DC offset voltage correction device and method that can be implemented with fewer gates and can eliminate DC offset in real time.

One embodiment of a DC offset voltage correction device in an RFID system according to the present invention for solving the above technical problem is a matched filter for correcting the distortion area of the input signal; A finite impulse response (FIR) digital average filter configured to limit and output a frequency band with respect to the signal corrected by the matched filter; A low frequency digital average filter connected in parallel with the finite impulse response (FIR) digital average filter and outputting a signal corrected by the matched filter according to an input clock signal; An Infinite Impulse Response (IIR) filter configured to determine a DC offset value of the input signal by taking an absolute value and then averaging the signal output from the low frequency digital average filter; And a signal code determiner configured to determine whether the DC offset value is a positive value or a negative value based on the integral value of the input signal analyzed by the matched filter.

One embodiment of the DC offset voltage correction method in the RFID system according to the present invention for solving the above technical problem, in the DC offset voltage correction method in the RFID system, a signal correction step of correcting the distortion region of the input signal ; A band limited filtering step of passing the corrected signal through a finite impulse response (FIR) digital average filter to limit and output a frequency band; A low frequency filtering step of outputting the corrected signal according to an input clock signal using a low frequency digital average filter connected in parallel with the finite impulse response (FIR) digital average filter; Determining a DC offset of the input signal by taking an absolute value and averaging the signal output from the low-frequency digital average filter; And a signal code determining step of determining a sign whether the DC offset value is a positive value or a negative value based on the integral value of the input signal.

An apparatus and method for correcting a DC offset voltage in an RFID system according to the present invention employs a digital averaging filter to double the speed of signal processing and at the same time, a finite impulse response (FIR) digital averaging filter for band limitation and a DC offset removal. By operating an Infinite Impulse Response (IRR) filter in parallel, a problem that required a conventional delayer was solved.

The apparatus and method for correcting a DC offset voltage in an RFID system according to the present invention has the advantage of performing low frequency noise removal at the same time as removing DC offset, and determining a sign value of a DC offset of an input signal to determine a positive value or a negative value. By performing the correction with the value, the problem that the offset correction was performed only with the negative value in the conventional apparatus was solved.

1 is a schematic diagram of a method of removing a conventional DC offset.
2 shows another embodiment of a method for removing a conventional DC offset.
3 is a schematic view of a DC offset voltage correction device in an RFID system according to the present invention.
4 is a flowchart illustrating a DC offset voltage correction method in an RFID system according to the present invention.
5 is a view showing a distortion signal correction result in the matching filter of the DC offset voltage correction device in the RFID system according to the present invention.
FIG. 6 is a diagram illustrating logic analyzer measurement result data from which a DC DC offset of a DC offset voltage correction device is removed in an RFID system according to the present invention.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3 is a schematic view of a DC offset voltage correction device in an RFID system according to the present invention.

The DC offset voltage correction device in the RFID system according to the present invention can simultaneously perform low frequency noise removal.

In the receiver of the RFID system, the ADC 310 extracts the digital sample signal by sampling the input analog signal.

The decimation filter 320 removes harmonics components of the digital sampling signal output from the ADC 310.

The matched filter 330 is characterized by using an estimation algorithm of signal distortion recovery and an absolute value addition method.

Conventional matched filters (matched filter) was a filter having the function to emphasize the required signal, suppress the noise to reduce the possibility of error and accurately determine the presence of the pulse.

However, the matched filter 330 in the DC offset voltage corrector of the present invention corrects only a distortion point of a signal using a half-cycle LUT (Look-up Table).

The receiver of the RFID system according to the present invention uses a signal encoded by FM0 (Frequency Modulation 0) or Miller Sub-carrier method to communicate between the tag and the reader. (matched filter) 330 is to correct only the distortion point of the signal using a look-up table (LUT) without applying the method used for the periodic signal.

The matched filter 330 uses the integral value of the input signal which is additionally calculated in the correlation calculation.

The matched filter 330 determines a DC offset value by integrating the sample value of the signal of one period and subtracting the +, − value of the signal and the integral value of the + and − region signals of the half period signal.

In a conventional RFID system receiver, a signal passed through a decimation filter is filtered through a bandpass filter and then passed through an interpolation filter to increase the number of samples. As a characteristic, signal distortion is increased.

In order to solve the problems of the conventional RFID receiver, the present invention includes a received signal restoration function using correlation to a matched filter 330 after a decimation filter stage, thereby restoring signal distortion and reducing signal distortion. By measuring and correcting the timing and duty of the frequency in order to restore the signal, the signal analysis result is provided to the signal code determiner 370 so that the signal in one of the positive and negative directions through the width of the positive and negative portions in one period signal is obtained. Has the characteristic that can determine whether it has a fixed direct current component.

The signal output from the matched filter 330 passes through a Finite Impulse Response (FIR) digital average filter 340, which is a bandpass filter, and is connected in parallel at the same time. Infinite Impulse Response) filter 360 is passed through.

The passed signal removes the DC offset component through the ADDER (380) operation.

The finite impulse response (FIR) digital average filter 340 in the DC offset voltage corrector of the present invention removes noise components of the signal output from the matched filter 330.

The finite impulse response (FIR) digital averaging filter 340 is a band limiting digital filter, and is designed with a high tap so that distortion of the filtered signal due to the linearity of the phase does not occur.

The characteristic of the RFID communication signal according to the present invention is that the frequency of the signal representing '0' is encoded by the frequency modulation 0 (FM0) method or the Miller sub-carrier method, which is 1/2 of the frequency indicating the '1'. It is low frequency by ship.

The low pass digital average filter 350 receives a signal output from the matched filter 330 as a low pass filter and outputs one sample according to a clock.

Infinite Impulse Response (IRR) filter 360 is simpler in structure than the FIR digital average filter 340 and is implemented as a general DIGITAL IIR filter.

The Infinite Impulse Response (IRR) filter 360 takes an absolute value of the signal output from the low pass digital average filter 350 to determine a DC offset value.

Infinite Impulse Response (IIR) filter 360 is designed with low frequency and DC signal low-pass structure, and the phase characteristics of the signal are not important and are for low system size.

Infinite Impulse Response (IIR) filter 360 according to the present invention is designed to operate at a speed more than twice that of the FIR filter, and outputs sample values in the same manner as the FIR filter even when absolute value calculation and sign bits are added.

In the present invention, the adder operation of the ADDER 380 operator differs from the characteristics of the conventional communication system, and the value of the average filter output signal for DC removal caused by the feedback of the transmission signal and the fixed DC offset due to RF mis-match is It is not always negative.

Accordingly, the signal sign determiner 370 determines the sign value of the DC offset based on the result of the signal analysis made through the correlation in the matched filter 330.

The signal sign determiner 370 performs an ADD operation on the output value of the FIR digital average filter 340 and the output value of the Infinite Impulse Response (IIR) filter 360 based on the sign value of the DC offset.

The signal passing through the ADDER operator 380 is interpreted by interpolation in the interpolation filter 390 so as to be suitable for signal identification of the equalizer.

The ADDER operator 380 compares 1/2 of the difference of the +,-area value calculated by the matched filter 330 with the output value of the IIR filter 360 and compares the difference of the +,-area value calculated by the matched filter 330. If the 1/2 signal is large, an add operation is performed, and if the signal is small, only the output value of the FIR digital filter 340 is input to the interpolator filter 390 without performing an add operation.

As described above, in the DC offset voltage device according to the present invention, the FIR digital average filter 340 is used for band limiting as a bandpass filter and the IIR filter 360 is used for DC offset.

In addition, since the FIR digital average filter 340 and the IIR filter 360 are connected in parallel, there is an advantage that a delay that is required for synchronizing the input signal with the conventional DC offset correction is unnecessary.

Conventionally, the FIR average filter 150 and the IIR filter 160 are connected in series, so that the delay time as long as the FIR average filter passes through the FIR digital average filter 340 and the IIR filter 360 are parallel. I solved it by connecting with parallel.

 The DC offset voltage device according to the present invention may simultaneously remove a DC offset of a signal including a DC offset coming from a tag attached to a metal and a tag signal coming together with a strong low frequency noise signal without being connected to the metal.

In the conventional method, the corrected signal is fed back to the input decimation filter and corrected by inverse operation. However, the DC offset correction method according to the present invention performs offset correction processing on the input signal in real time while passing through the correction device block. The structure of the modem can be simplified, and the implementation of ASIC, DSP, FPGA can be implemented with less GATE than the existing method.

4 is a flowchart illustrating a DC offset voltage correction method in an RFID system according to the present invention.

The matched filter corrects the distortion point of the signal using a half-cycle LUT (LUT) (Step 410).

A matched filter determines a DC offset value by integrating the sample value of a signal of one period and subtracting the +,-value of the signal and the integral value of the + and-region signals of the half period signal.

The finite impulse response (FIR) digital average filter outputs a limited frequency band for the signal corrected by the matched filter (Step 440).

The low frequency digital averaging filter is connected in parallel with a finite impulse response (FIR) digital averaging filter and outputs a signal corrected by the matching filter according to an input clock signal (Step 430).

An Infinite Impulse Response (IIR) filter takes an absolute value and averages the signal output from the low frequency digital average filter to determine a DC offset value of the input signal (Step 450).

The signal sign determiner determines whether the DC offset value is a positive value or a negative value based on the integral value of the input signal analyzed by the matched filter (Step 460).

The integral value of the input signal is a value obtained by subtracting a negative region integral value from a positive region integral value of one period input signal.

A multiplication calculator compares the integral value of the input signal analyzed by the matched filter with the DC offset value, and if the integral value of the input signal is large (Step 465), it is output from the finite impulse response (FIR) digital average filter. The DC offset value determined by the signal sign determiner is multiplied to the signal (Step 470).

The multiplication operator compares the integral value of the input signal analyzed by the matched filter with the DC offset value, and if the integral value of the input signal is small, the addition operation in the multiplication operator is passed without performing (Step 480). ).

5 is a view showing a distortion signal correction result in the matching filter of the DC offset voltage correction device in the RFID system according to the present invention.

In the DC offset voltage compensator matched filter (330) of the present invention, only the distortion point of the signal is corrected using a look-up table (LUT).

The result of correcting the signal distortion of the frequency range where the input signal is low is corrected (520).

FIG. 6 is a diagram illustrating logic analyzer measurement result data from which a DC DC offset of a DC offset voltage correction device is removed in an RFID system according to the present invention.

In FIG. 6, the data a measured at the output terminal of the signal sign determiner 710 shows that the sign of the DC offset is positive.

Data b measured at the output of the FIR digital averaging filter 720 shows that the input signal contains a positive DC offset value.

The result c of the DC offset removal 730 in FIG. 6 is the result at the output of the multiplication operator (ADDER) 380.

That is, DC offset in the RFID reader receiver is performed by adding a negative offset value from the output signal of the FIR digital average filter 720 to remove the positive offset value determined by the signal sign determiner 710. To remove it.

In the RFID system, the difference between the DC offset, that is, the SNR, drops sharply as the level of the received signal decreases as the distance increases.

In addition, the low frequency component of the feedback of the transmission signal also affects the near field recognition coefficient, thereby inducing the performance improvement of the reader receiver depending on whether the DC DC offset correction device is operated.

When the DC DC offset correction device according to the present invention is used, the number of tag recognitions is significantly increased at near and far distances.

Although the present invention has been described with reference to one embodiment shown in the accompanying drawings, it is merely an example, and those skilled in the art may realize various modifications and equivalent other embodiments therefrom. I can understand. Accordingly, the true scope of protection of the present invention should be determined only by the appended claims.

Claims (10)

A matched filter to correct a distortion area of the input signal;
A finite impulse response (FIR) digital average filter configured to limit and output a frequency band with respect to the signal corrected by the matched filter;
A low frequency digital average filter connected in parallel with the finite impulse response (FIR) digital average filter and outputting a signal corrected by the matched filter according to an input clock signal;
An Infinite Impulse Response (IIR) filter configured to determine a DC offset value of the input signal by taking an absolute value and then averaging the signal output from the low frequency digital average filter; And
And a signal code determiner configured to determine whether the DC offset value is a positive value or a negative value based on the integral value of the input signal analyzed by the matched filter. Offset voltage correction device. The method of claim 1, wherein the low frequency digital average filter
And a low pass filter for removing low frequency noise of the signal corrected by the matching filter. The method of claim 1,
When the integral value of the input signal is large by comparing the integral value of the input signal analyzed by the matched filter with the DC offset value,
DC offset voltage correction in the RFID system, characterized in that it further comprises; a multiplier for calculating the DC offset value determined by the signal code determiner to the signal output from the finite impulse response (FIR) digital average filter Device. The method of claim 1,
The matched filter is a DC offset voltage correction device for an RFID system, characterized in that for correcting the distortion region of the input signal using a look-up table (LUT). The method according to claim 1 or 3,
The integrated value of the DC offset voltage correcting device in the RFID system, characterized in that the divided value after subtracting the negative region integral value from the positive region integral value of one period input signal. In the DC offset voltage correction method in the RFID system,
A signal correction step of correcting a distortion area of the input signal;
A band limited filtering step of passing the corrected signal through a finite impulse response (FIR) digital average filter to limit and output a frequency band;
A low frequency filtering step of outputting the corrected signal according to an input clock signal using a low frequency digital average filter connected in parallel with the finite impulse response (FIR) digital average filter;
Determining a DC offset of the input signal by taking an absolute value and averaging the signal output from the low-frequency digital average filter; And
And a signal code determining step of determining whether the DC offset value is a positive value or a negative value based on the integral value of the input signal. 7. The low frequency digital average filter of claim 6, wherein
The DC offset voltage correction method of the RFID system, characterized in that the low pass filter (Low Pass) filter to remove the low frequency noise of the corrected signal. The method according to claim 6,
If the integral value of the input signal is large by comparing the integral value of the input signal with the direct current offset value,
And a subtraction calculation step of subtracting the direct current offset value to a signal output from the finite impulse response (FIR) digital averaging filter. The method of claim 6 or 8,
The integrated value of the DC offset voltage correction method of the RFID system, wherein the integral value of the input signal is obtained by subtracting the negative area integral value from the positive area integral value of one cycle input signal. The method according to claim 6,
The DC offset voltage correction method of the RFID system, characterized in that for correcting the distortion area of the input signal in the signal correction step using a look-up table (LUT).
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US9118370B2 (en) 2013-04-17 2015-08-25 Electronics And Telecommunications Research Institute Method and apparatus for impulsive noise mitigation using adaptive blanker based on BPSK modulation system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9118370B2 (en) 2013-04-17 2015-08-25 Electronics And Telecommunications Research Institute Method and apparatus for impulsive noise mitigation using adaptive blanker based on BPSK modulation system

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