KR20110062393A - Optical waveguide device using bulk silicon wafer and fabrication method thereof - Google Patents

Abstract

PURPOSE: An optical waveguide device using a bulk silicon wafer and a manufacturing method thereof are provided to achieve high speed signal transmission, low power consumption, large capacity and compactness, by using optical interconnection technology. CONSTITUTION: A trench region(12) is formed on a part of a bulk silicon wafer(10). A bottom clad layer(14) is formed in the trench region. An optical waveguide core layer(22a) is formed on the bottom clad layer, far from one side of the trench region. A top clad layer(24) is formed to cover the optical waveguide core layer.

Description

Optical waveguide device using bulk silicon wafer and fabrication method

The present invention relates to an optical waveguide device and a method of manufacturing the same, and more particularly, to an optical waveguide device using a bulk silicon wafer and a method of manufacturing the same.

In general, an optical waveguide device is formed using a silicon on insulator (SOI) substrate. The SOI substrate is composed of a silicon support layer, a silicon oxide layer, and a single crystal silicon layer. The SOI substrate has a silicon oxide layer already formed under the single crystal silicon layer to be used as the lower clad layer. Accordingly, the SOI substrate may implement an optical waveguide by etching a single crystal silicon layer using a photoresist pattern to form a core layer and forming an upper clad layer on the core layer.

However, since SOI substrates are very expensive compared to bulk silicon wafers, there are limitations in commercialization. In addition, when implementing an optical waveguide device implemented in an SOI substrate, it is difficult to integrate electronic devices such as an optical waveguide device implemented in an SOI substrate and a DRAM implemented in a bulk silicon wafer on a single substrate. Therefore, in the case of integrating the optical waveguide device and the electronic device, it is difficult to economically and technically to manufacture a photoelectric integrated circuit device by separately packaged on a package substrate.

An object of the present invention is to provide an optical waveguide device using a bulk silicon wafer.

In addition, another object of the present invention is to provide a method of manufacturing an optical waveguide device using a bulk silicon wafer.

In order to solve the above problems, an optical waveguide device according to an embodiment of the present invention is a bulk silicon wafer, a trench region formed in a portion of the bulk silicon wafer, a lower clad layer formed in the trench region, and from one side wall of the trench region. And an optical waveguide core layer formed on the lower cladding layer and an upper clad layer formed to cover the optical waveguide core layer.

The lower clad layer may be configured to be completely embedded in the trench region. The optical waveguide core layer may be formed on the lower clad layer coplanar with the surface of the bulk silicon wafer. The lower clad layer may be composed of a recess lower clad layer embedded in a portion of the trench region and formed lower than the bulk silicon wafer. An optical waveguide core layer may be formed on the recessed lower clad layer to form lower than the surface of the bulk silicon wafer.

The optical waveguide core layer may be composed of a single crystal silicon layer, and the lower clad layer and the upper clad layer may be composed of a silicon oxide layer, a silicon oxynitride layer, or a silicon nitride layer having a lower refractive index than the single crystal silicon layer constituting the optical waveguide core layer. . And a peripheral core layer formed on the bulk silicon wafer away from the optical waveguide core layer.

According to another embodiment of the present invention, an optical waveguide device includes a bulk silicon wafer, a trench region formed in a portion of the bulk silicon wafer, a recessed lower clad layer formed below the surface of the bulk silicon wafer by filling a portion of the trench region, and the trench region. An optical waveguide core layer formed on the recessed lower clad layer away from one side wall of the substrate, a peripheral core layer formed on the bulk silicon wafer away from the optical waveguide core layer, and an upper clad layer formed to cover the optical waveguide core layer. Is done. The optical waveguide core layer may be formed lower than the surface of the bulk silicon wafer.

In order to solve the above-mentioned other problem, an optical waveguide device manufacturing method according to an embodiment of the present invention includes preparing a bulk silicon wafer, etching the bulk silicon wafer to form a trench region on a portion of the bulk silicon wafer. . The lower clad layer is formed to fill at least a portion of the trench region. A core layer is formed on the lower clad layer and the bulk silicon wafer. The core layer is selectively etched to form an optical waveguide core layer on the lower clad layer away from one side wall of the trench region. An optical waveguide device is manufactured by forming an upper clad layer to cover the core layer of the optical waveguide.

Forming the core layer may include forming an amorphous silicon layer on the lower clad layer and the bulk silicon wafer, and crystallizing the amorphous silicon layer to form a core layer with a single crystal silicon layer.

Forming a core layer with an optical waveguide forms a mask pattern on the core layer,

The core pattern may be selectively etched using the mask pattern as an etch mask to form a core layer with an optical waveguide, and the mask pattern may be removed. When selectively etching the core layer, a peripheral core layer may be further formed on the bulk silicon wafer away from the optical waveguide core layer.

The optical waveguide core layer may be formed coplanar with the surface of the bulk silicon wafer or be lower than the surface of the bulk silicon wafer.

Since the present invention implements an optical waveguide device using a bulk silicon wafer instead of an expensive SOI substrate, an optical waveguide device or an optical integrated circuit device can be implemented at low cost.

According to the present invention, an electronic device using a bulk silicon wafer can be easily integrated on a single substrate by using a MOS process, and therefore, a photoelectric integrated circuit device can be implemented at low cost.

According to the present invention, optical interconnection can be used instead of electrical interconnection in an optoelectronic integrated circuit device, so that signal transmission can be made faster, lower power, larger capacity, and smaller.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the embodiments of the present invention illustrated in the following may be modified in many different forms, and the scope of the present invention is not limited to the embodiments described below, but may be implemented in various different forms. Embodiments of the present invention are provided to more fully describe the present invention to those skilled in the art. In the following figures, like reference numerals refer to like elements.

Hereinafter, an example of an optical waveguide device, that is, an optical integrated circuit device according to the present invention, is implemented using a bulk silicon wafer. Bulk silicon wafers may be referred to as bulk silicon substrates. The optical waveguide device of the present invention implements a Morse process on a bulk silicon wafer. The Mohs process described below can be variously changed. Since the MOS process is used when manufacturing an electronic device, the electronic device and the optical waveguide device can be simultaneously integrated on a bulk silicon wafer. However, only the configuration of the optical waveguide device and a manufacturing method thereof will be described below.

Example 1

First, an optical waveguide device according to a first embodiment of the present invention will be described with reference to FIG. 7.

Specifically, the optical waveguide device 100 includes a bulk silicon wafer 10 having a surface 10a and a back surface 10b. A trench region 12 is formed in a portion of the bulk silicon wafer 10. The trench region 12 is formed in the bulk silicon wafer 10 by selectively etching the bulk silicon wafer 10. The trench region 12 has sidewalls 12a and 12b formed therein.

The lower clad layer 14 is formed in the trench region 12. The lower clad layer 14 is formed to completely fill the trench region 12. The width of the lower clad layer 14 is designated TW. An optical waveguide core layer 22a is formed on the lower clad layer 14 away from one side wall 12a of the trench region 12. The optical waveguide core layer 22a is formed on the lower cladding layer 14 coplanar with the surface of the bulk silicon wafer 10. The width of the optical waveguide core layer 22a is denoted by W. The optical waveguide core layer 22a is composed of a single crystal silicon layer having a higher refractive index than the lower cladding layer 14 and the upper cladding layer 24. The optical waveguide core layer 22a is positioned away from the sidewalls 12a and 12b of the trench region 12 by d1 or d2 where light is transmitted.

If necessary, the peripheral core layer 22b may be formed on the bulk silicon wafer 10 away from the optical waveguide core layer 22a. The peripheral core layer 22b is composed of a single crystal silicon layer similarly to the optical waveguide core layer 22a. The peripheral core layer 22b is positioned away from the optical waveguide core layer 22a by d3 or d4.

The upper cladding layer 24 covering the optical waveguide core layer 22a is formed. The upper clad layer 24 is formed to cover the peripheral core layer 22b and the bulk silicon wafer 10. The lower cladding layer 14 and the upper cladding layer 24 are composed of a silicon oxide layer, a silicon oxynitride layer, or a silicon nitride layer having a lower refractive index than the single crystal silicon layer constituting the optical waveguide core layer. If necessary, the upper cladding layer 24 may be formed of an air layer having a lower refractive index than the single crystal silicon layer constituting the optical waveguide core layer 22a.

The optical waveguide core layer 22a is where light is transmitted and should not be subjected to optical interference with other components. The formation position of the optical waveguide core layer 22a is determined by the crystallinity of the optical waveguide core layer 22a. In FIG. 7, although the distances d1 and d2 from the sidewalls 12a and 12b of the trench region 12 are the same, the optical waveguide core layer 22a is formed in the middle portion on the lower clad layer 14, but is required. Accordingly, the optical waveguide core layer 22a may be formed to be biased toward one side of the upper cladding layer 14.

In order to prevent leakage of light through the bulk silicon wafer 10, the optical waveguide core layer 22a should be located at a suitable distance from the sidewalls 12a and 12b of the trench region 12, i.e., d1 or d2. In addition, in order to prevent leakage of light through the adjacent core layer 22b, the optical waveguide core layer should be located at a suitable distance from the adjacent core layer 22b, that is, d3 or d4. The formation positions of the optical waveguide core layer 22a and the peripheral core layer 22b will be described later in more detail.

Next, a method of manufacturing the optical waveguide device according to the first embodiment of the present invention will be described.

1 to 7 are cross-sectional views illustrating an optical waveguide device and a method of manufacturing the same according to a first embodiment of the present invention.

Referring to FIG. 1, a bulk silicon wafer 10 is prepared. Bulk silicon wafer 10 has a surface 10a and a back 10b. The bulk silicon wafer 10 is selectively etched to form trench regions 12 in portions of the bulk silicon wafer 10. Trench region 12 has sidewalls 12a and 12b. The depth of the trench region 12 is related to the thickness of the lower cladding layer to be formed later, and is formed at a depth at which the optical signal can be well guided.

Referring to FIG. 2, the lower clad layer 14 is formed to fill the trench region 12. The lower clad layer 14 is formed of a silicon oxide layer (SiO), a silicon oxynitride layer (SiON), or a silicon nitride layer (SiN) having a lower refractive index than the single crystal silicon layer constituting the optical waveguide core layer formed later. The lower clad layer 14 may be formed by forming a lower clad material layer on the entire surface of the bulk silicon wafer 10 while filling the trench region 12, followed by chemical mechanical polishing.

Referring to FIG. 3, an amorphous silicon layer 16 is formed on the entire surface of the lower clad layer 14 and the bulk silicon wafer 10. An amorphous silicon layer 16 is formed on the lower clad layer 14 and the bulk silicon wafer 10. The amorphous silicon layer 16 is later converted into a crystalline silicon layer and used as a core layer.

Referring to FIG. 4, the amorphous silicon layer 16 is crystallized to form a core layer 18 as a single crystal silicon layer. Crystallization of the amorphous silicon layer 16 is performed by laser epitaxial growth (LEG), solid phase epitaxy (SPE), epitaxial lateral overgrowth (ELO), selective epitaxial growth (SEG), or solid phase crystallization (SPC). In the crystallization method of the amorphous silicon layer 16 described above, the amorphous silicon layer 16 is crystallized into a single crystal silicon layer by applying energy such as thermal energy or laser energy to the amorphous silicon layer 16. The core layer 18 is formed on the lower clad layer 14 and the bulk silicon wafer 10. The core layer 18 later becomes an optical waveguide core layer through selective etching.

Referring to FIG. 5, a mask pattern 20 is formed on the core layer 18. The mask pattern 20 is formed over the lower clad layer 14 and over the upper portion of the bulk silicon wafer 10. The mask pattern 20 is formed of a soft mask pattern such as a photoresist pattern or a hard mask pattern such as a silicon oxide layer or a silicon nitride layer. The mask pattern 20 exposes some surfaces of the core layer 18.

 Referring to FIG. 6, the core layer 18 is selectively etched using the mask pattern 20 as an etch mask to form an optical waveguide core layer 22a and a peripheral core layer 22b. According to the selective etching of the core layer 18, the optical waveguide core layer 22a and the peripheral core layer 22b remain only under the mask pattern 20. The peripheral core layer 22b may not be formed when necessary to adjust the formation position of the mask pattern 20.

 Referring to FIG. 7, the mask pattern 20 is removed. In this case, the optical waveguide core layer 22a is formed on the lower clad layer 14 by falling to one side wall 12a of the trench region 12, and the bulk silicon wafer 10 is separated from the optical waveguide core layer 22a. The peripheral core layer 22b is formed on (). The upper cladding layer 24 is formed to cover the optical waveguide core layer 22a and the peripheral core layer 22b.

The upper cladding layer 24 may be formed of a silicon oxide layer, a silicon oxynitride layer, or a silicon nitride layer having a lower refractive index than the single crystal silicon layer constituting the optical waveguide core layer 22a. The upper clad layer 24 may be formed of an air layer having a lower refractive index than the single crystal silicon layer constituting the optical waveguide core layer 22a, as necessary.

Example 2

First, an optical waveguide device according to a second embodiment of the present invention will be described with reference to FIG.

Specifically, the optical waveguide device 200 according to the second embodiment of the present invention forms the recess lower clad layer 44 and the optical waveguide on the recess lower clad layer 44 as compared with the first embodiment. The same is true except that the core layer 52a is formed. Since the lower clad layer 44 is recessed lower than the surface 10a of the bulk silicon wafer 10, it is referred to as the recess lower clad layer 44.

In the optical waveguide device 200 according to the second embodiment of the present invention, a bulk silicon wafer 10 having a surface 10a and a back surface 10b and a trench region 12 are formed as in the first embodiment. . The recessed bottom cladding layer 44 of the optical waveguide device 200 according to the second embodiment of the present invention is formed by partially filling the trench region 12 without completely filling the bottom cladding, or completely filling the trench region 12. After forming the layer, it may be formed by etching below the surface of the bulk silicon wafer. The width of the recess lower clad layer 44 is designated TW.

An optical waveguide core layer 52a is formed on the recess lower cladding layer 44 away from sidewalls 12a and 12b of the trench region 12, for example, one side wall 12a. The optical waveguide core layer 52a is formed on the recess lower clad layer 44 lower than the surface of the bulk silicon wafer 10 so as to be lower than the surface 10a of the bulk silicon wafer 10. The width of the optical waveguide core layer 52a is denoted by W. The optical waveguide core layer 52a is composed of a single crystal silicon layer. The optical waveguide core layer 52a is located at a distance d5 or d6 from the sidewalls 12a and 12b of the trench region 12 where light is transmitted.

If necessary, the peripheral core layer 52b may be formed on the bulk silicon wafer 10 away from the optical waveguide core layer 52a. The peripheral core layer 52b is composed of a single crystal silicon layer similarly to the optical waveguide core layer 52a.

An upper cladding layer 54 covering the optical waveguide core layer 52a is formed. The upper cladding layer 54 is formed to cover the peripheral core layer 52b and the bulk silicon wafer 10. The lower cladding layer 44 and the upper cladding layer 54 are made of the same material as the lower cladding layer 14 and the upper cladding layer 24 of the first embodiment, and have a lower refractive index than the optical waveguide core layer 52a. To form. If necessary, the upper cladding layer 54 may be formed of an air layer having a lower refractive index than the single crystal silicon layer constituting the optical waveguide core layer 52a.

The optical waveguide core layer 52a is where light is transmitted and should not be subjected to optical interference with other components. The formation position of the optical waveguide core layer 52a is determined by the crystallinity of the optical waveguide core layer 52a. In FIG. 13, although the distances d5 and d6 from the sidewalls 12a and 12b of the trench region 12 are the same, the optical waveguide core layer 52a is formed in the middle portion on the recess lower cladding layer 44. If necessary, the optical waveguide core layer 52a may be formed to be biased toward one side of the upper portion of the recess lower clad layer 44.

In order to prevent leakage of light through the bulk silicon wafer 10, the optical waveguide core layer 52a should be located at a suitable distance from the sidewalls 12a and 12b of the trench region 12, i.e., d5 or d6. The formation positions of the optical waveguide core layer 52a and the peripheral core layer 52b will be described later in more detail.

Next, a method of manufacturing the optical waveguide device according to the second embodiment of the present invention will be described.

8 to 13 are cross-sectional views illustrating an optical waveguide device and a method of manufacturing the same according to a second embodiment of the present invention.

Referring to FIG. 8, a bulk silicon wafer 10 having a surface 10a and a back surface 10b is prepared as in the first embodiment. The bulk silicon wafer 10 is selectively etched to form trench regions 12 in portions of the bulk silicon wafer 10. Trench region 12 has sidewalls 12a and 12b. The recess lower clad layer 44 is formed to fill a portion of the trench region 12.

The recessed lower cladding layer 44 is formed of the same material as the lower cladding layer 14 of the first embodiment. The recess lower clad layer 44 may be formed by forming a material layer for the recess lower cladding so as to fill a portion of the trench region 12. In addition, the recess lower cladding layer 44 forms a recess lower cladding material layer to completely fill the trench region 12, and then partially etches the recess lower cladding material layer formed in the trench region 12. It can also be formed.

Referring to FIG. 9, an amorphous silicon layer 46 is formed on an entire surface of the recess lower clad layer 44 and the bulk silicon wafer 10. An amorphous silicon layer 46 is formed on the recess lower clad layer 44 and the bulk silicon wafer 10. The amorphous silicon layer 46 is later converted into a crystalline silicon layer and used as a core layer.

Referring to FIG. 10, the amorphous silicon layer 46 is crystallized to form a core layer 48 with a single crystal silicon layer. Crystallization of the amorphous silicon layer 46 is performed in the same manner as in the first embodiment. The core layer 48 is formed on the recess lower clad layer 44 and the bulk silicon wafer 10. The core layer 48 later becomes an optical waveguide core layer through selective etching.

Referring to FIG. 11, a mask pattern 50 is formed on the core layer 48. The mask pattern 50 is formed over the recess lower clad layer 44 and over the upper portion of the bulk silicon wafer 10. The mask pattern 50 is formed of the same material as in the first embodiment. The mask pattern 50 exposes some surfaces of the core layer 48.

Referring to FIG. 12, the core layer 48 is selectively etched using the mask pattern 50 as an etch mask to form an optical waveguide core layer 52a and a peripheral core layer 52b. According to the selective etching of the core layer 48, the optical waveguide core layer 52a and the peripheral core layer 52b remain only under the mask pattern 50. The peripheral core layer 52b may not be formed when necessary to adjust the formation position of the mask pattern 50.

Referring to FIG. 13, the mask pattern 50 is removed. In this case, the optical waveguide core layer 52a is formed on the recess lower cladding layer 44 by falling to one side wall 12a of the trench region 12, and is separated from the optical waveguide core layer 52a to form a bulk silicon wafer ( A peripheral core layer 52b is formed on 10). The upper clad layer 54 is formed to cover the optical waveguide core layer 52a and the peripheral core layer 52b.

The upper cladding layer 54 is formed of the same material as the upper cladding layer 24 of the first embodiment. The upper clad layer 54 may be formed of an air layer having a lower refractive index than the single crystal silicon layer constituting the optical waveguide core layer 52a, as necessary.

Formation position of optical waveguide core layer and surrounding core layer

Hereinafter, the formation positions of the optical waveguide core layer and the peripheral core layer of the optical waveguide elements of the first and second embodiments will be described in detail.

FIG. 14 is a cross-sectional view illustrating the formation position of the optical waveguide core layer of the optical waveguide device according to the first embodiment of the present invention, and FIG. 15 is a light leakage loss according to the formation position of the optical waveguide core layer of FIG. 14. Figure is a diagram.

Referring to FIG. 14, FIG. 14 corresponds to FIG. 7 of the first embodiment, and mainly displays only the optical waveguide core layer 22a. A bulk silicon wafer 10 having a surface 10a and a back surface 10b and a trench region 12 are formed in a portion of the bulk silicon wafer 10. The lower clad layer 14 is buried in the trench region 12. The width of the lower clad layer 14 is designated TW.

An optical waveguide core layer 22a is formed on the lower clad layer 14 of the surface 10a of the trench region 12. The optical waveguide core layer 22a is formed by a distance d1 from one side wall 12a of the trench region 12. The width of the optical waveguide core layer 22a is denoted by W. The optical waveguide core layer 22a is formed by a distance d2 from the other side wall of the trench region. In FIG. 14, the distance d2 is configured differently from the distance d1 from the one side wall 12a of the trench region 12 and the other side wall 12b of the trench region 12.

Referring to FIG. 15, FIG. 15 illustrates light leakage loss of the optical waveguide core layer 22a according to a distance d1 from one side wall 12a of the trench region 12. When the distance d1 from the side wall 12a of the trench region 12 is 0.1 mu m. Since the bulk silicon wafer 10 and the optical waveguide core layer 22a optically interfere, the optical leakage loss is very large at about -24 dB / mm.

When the optical leakage loss is 1 dB / mm, the distance of the optical waveguide core layer 12a from one side wall 12a of the trench region 12 is 0.27 mu m. When the light leakage loss is 10 dB / mm, the distance of the optical waveguide core layer 12a from one side wall 12a of the trench region 12 is 0.15 탆. The reference value of the light leakage loss may be 10 dB / mm, and more preferably the reference value of the light leakage loss may be 1 dB / mm.

Based on the above, when the optical leakage loss is 10 dB / mm reference, d1, which is a distance of the optical waveguide core layer 12a from one side wall 12a of the trench region 12, satisfies the following expression (1).

Equation 1

0.15 μm <d1 <TW-W-0.15 μm

Here, d1 is a distance from the optical waveguide core layer 22a away from one side wall of the trench region, TW is the width of the lower clad layer 14, and W is the width of the optical waveguide core layer 22a.

Referring to Equation 1, when the optical leakage loss is 10dB / mm reference distance of the optical waveguide core layer 22a from one side wall 12a of the trench region 12 is greater than 0.15㎛. When the leakage loss is 10 dB / mm, the distance from which the optical waveguide core layer 22a is separated from the other side wall 12b of the trench region 12 is also larger than 0.15 mu m. When the optical waveguide core layer 22a is positioned on the lower clad layer 14 while satisfying the two conditions, the optical waveguide device 100 according to the first embodiment of the present invention may be completed.

Further, when the optical leakage loss is 1 dB / mm reference, the distance from the one side wall 12a of the trench region 12 to the optical waveguide core layer 22a is larger than 0.27 mu m. When the leakage loss is 1 dB / mm, the distance from which the optical waveguide core layer 22a is separated from the other side wall 12b of the trench region 12 is also larger than 0.27 mu m. When the optical waveguide core layer 22a is disposed on the lower clad layer 14 while satisfying the two conditions, the optical waveguide device 100 according to the first embodiment of the present invention may be completed.

FIG. 16 is a cross-sectional view for explaining the positions of formation of the optical waveguide core layer and the peripheral core layer of the optical waveguide device according to the first embodiment of the present invention.

Referring to FIG. 16, FIG. 16 corresponds to FIG. 7 of the first embodiment, and mainly displays only the optical waveguide core layer 22a and the peripheral core layer 22b. As described with reference to FIG. 14, a bulk silicon wafer 10 having a surface 10a and a back 10b, a trench region 12 having sidewalls 12a and 12b, a lower clad layer 14, and an optical waveguide core Layer 22a and peripheral core layer 22b are shown.

The width of the lower clad layer 14 is designated TW. The width of the optical waveguide core layer 22a is denoted by W. The peripheral core layer 22b is formed to be d3 from one side of the optical waveguide core layer 22a. And the peripheral core layer 22b is formed d4 from the other side of the optical waveguide core layer 22a. In FIG. 16, the distance d3 of the peripheral core layer 22b from one side of the optical waveguide core layer 22a and the distance d4 of the peripheral core layer 22b from the other side of the optical waveguide core layer 22a are configured differently.

As a result of the inventors' confirmation, since the optical waveguide core layer 22a and the peripheral core layer 22b have optical interference, when the optical leakage loss is 1 dB / mm, d3 or d4 is larger than at least 0.35 mu m. In this manner, the optical waveguide device of the present invention can be completed while eliminating optical interference between the optical waveguide core layer 22a and the peripheral core layer 22b.

FIG. 17 is a cross-sectional view illustrating the formation position of the optical waveguide core layer of the optical waveguide device according to the second exemplary embodiment of the present invention, and FIG. 18 is a light leakage loss according to the formation position of the optical waveguide core layer of FIG. 17. Figure is a diagram.

Referring to FIG. 17, FIG. 17 corresponds to FIG. 13 of the second embodiment, and mainly displays only the optical waveguide core layer 52a. A bulk silicon wafer 10 having a surface 10a and a back surface 10b and a trench region 12 are formed in a portion of the bulk silicon wafer 10. The recess lower clad layer 44 is buried in the trench region 12. The width of the recess lower clad layer 44 is designated TW.

An optical waveguide core layer 52a is formed on the recess lower cladding layer 44 of the trench region 12. The optical waveguide core layer 52a is formed lower than the surface 10a of the bulk silicon wafer 10. The optical waveguide core layer 52a is formed by a distance d5 from one side wall 12a of the trench region 12. The width of the optical waveguide core layer 52a is denoted by W. The optical waveguide core layer 52a is formed by d6 from the other side wall of the trench region. In FIG. 17, a distance d6 is configured differently from the distance d5 from the one side wall 12a of the trench region 12 and the other side wall 12b of the trench region 12.

Referring to FIG. 18, FIG. 18 illustrates light leakage loss of the optical waveguide core layer 52a according to a distance d5 from one side wall 12a of the trench region 12. When the distance d5 from the one side wall 12a of the trench region 12 is 0.15 mu m. Since the bulk silicon wafer 10 and the optical waveguide core layer 52a optically interfere, the optical leakage loss is very large at about -22 dB / mm.

When the optical leakage loss is 1 dB / mm, the distance of the optical waveguide core layer 52a from one side wall 12a of the trench region 12 is 0.35 mu m. When the optical leakage loss is 10 dB / mm, the distance of the optical waveguide core layer 52a from one side wall 12a of the trench region 12 is 0.2 탆. The reference value of the light leakage loss may be 10 dB / mm, and more preferably, the reference value of the light leakage loss may be 1 dB / mm.

Based on the above, d5, the distance of the optical waveguide core layer 52a from one side wall 12a of the trench region 12 when the light leakage loss is 10 dB / mm, satisfies the following expression (2).

Equation 2

0.2 μm <d5 <TW-W-0.2 μm

Here, d1 is the distance from the optical waveguide core layer 52a away from one side wall of the trench region, TW is the width of the lower clad layer 14, and W is the width of the optical waveguide core layer 52a.

Referring to Equation 2, when the optical leakage loss is 10dB / mm reference distance of the optical waveguide core layer 52a from one side wall 12a of the trench region 12 is greater than 0.2㎛. When the leakage loss is 10 dB / mm, the distance from which the optical waveguide core layer 52a is separated from the other side wall 12b of the trench region 12 is also larger than 0.2 mu m. If the optical waveguide core layer 52a is positioned on the recess lower clad layer 44 while satisfying the two conditions, the optical waveguide device 200 according to the second embodiment of the present invention may be completed.

Further, preferably, the distance from the optical waveguide core layer 52a away from one side wall 12a of the trench region 12 when the light leakage loss is 1 dB / mm reference is greater than 0.35 mu m. Preferably, the distance from the optical waveguide core layer 52a from the other side wall 12b of the trench region 12 when the leakage loss is 1 dB / mm reference is larger than 0.35 µm. If the optical waveguide core layer 52a is positioned on the recess lower clad layer 44 while satisfying the two conditions, the optical waveguide device 200 according to the second embodiment of the present invention may be completed.

Hereinafter, application examples of the optical waveguide device of the present invention will be described. Although the optical waveguide device of the present invention can be applied in various ways, an example will be described an optoelectronic integrated circuit device in which an electronic device and an optical waveguide device are integrated on a bulk silicon wafer.

Photoelectric integrated circuit devices

FIG. 19 is a block diagram illustrating an optoelectronic integrated circuit device to which the optical waveguide device of the present invention is applied.

Specifically, the optoelectronic integrated circuit device 300 includes the optical waveguide device 100 and the electronic devices 64 and 72 described above. The electronic devices 64 and 72 may be memory devices such as DRAM. In FIG. 19, a reference number of an optical waveguide device is denoted by 100 for convenience. In FIG. 19, only two optical waveguide devices 100 and electronic devices 64 and 72 are shown for convenience, but may include more.

Communication from the optical waveguide device 100 to the electronic devices 64 and 72 is performed using the photoelectric devices 62 and 70. The photoelectric elements 62 and 70 receive an optical signal to generate an electrical signal. Communication of the optical waveguide device 100 from the electronic devices 64 and 72 is performed using the all-optical device 66. The all-optical element 66 receives an electric signal and generates an optical signal. In Fig. 19, optical signals are indicated by reference numerals 74, 80, 82, and electrical signals are indicated by 76, 78, 84.

The photonic integrated circuit device 300 of the present invention may be implemented in the bulk silicon wafer 10 as described above. Accordingly, in the photoelectric integrated circuit device of the present invention, since the optical waveguide device 100 and the electronic device can communicate with each other by using an optical signal, signal transmission can be made faster, smaller, lower power, and large capacity, and lower cost. Can be implemented.

As mentioned above, although the present invention has been described in detail with reference to preferred embodiments, the present invention is not limited to the above-described embodiments, and various modifications may be made by those skilled in the art within the spirit and scope of the present invention. And changes are possible.

1 to 7 are cross-sectional views illustrating an optical waveguide device and a method of manufacturing the same according to a first embodiment of the present invention.

8 to 13 are cross-sectional views illustrating an optical waveguide device and a method of manufacturing the same according to a second embodiment of the present invention.

FIG. 14 is a cross-sectional view for explaining the formation position of the optical waveguide core layer of the optical waveguide device according to the first embodiment of the present invention.

FIG. 15 is a view illustrating light leakage loss depending on a formation position of the optical waveguide core layer of FIG. 14.

FIG. 16 is a cross-sectional view for explaining the positions of formation of the optical waveguide core layer and the peripheral core layer of the optical waveguide device according to the first embodiment of the present invention.

FIG. 17 is a cross-sectional view for explaining the formation position of the optical waveguide core layer of the optical waveguide device according to the second embodiment of the present invention.

FIG. 18 is a diagram illustrating light leakage loss depending on a formation position of the optical waveguide core layer of FIG. 17.

FIG. 19 is a block diagram illustrating an optoelectronic integrated circuit device to which the optical waveguide device of the present invention is applied.

Claims (10)

Bulk silicon wafers; Trench regions formed in portions of the bulk silicon wafer; A lower clad layer formed in the trench region; An optical waveguide core layer formed on the lower clad layer away from one side wall of the trench region; And And an upper cladding layer formed to cover the core of the optical waveguide core. The optical waveguide device of claim 1, wherein the lower clad layer is completely embedded in the trench region. The optical waveguide device according to claim 2, wherein the optical waveguide core layer is formed away from one side wall of the trench region so as to satisfy the following expression 1 when the optical leakage loss is 10 dB / mm reference. Equation 1 0.15 탆 <d1 <TW-W-0.15 탆, d1 is the distance the optical waveguide core layer is away from one side wall of the trench region, TW is the width of the lower clad layer, and W is the width of the optical waveguide core layer. to be. The optical waveguide device according to claim 1, wherein the lower clad layer is formed of a recess lower clad layer embedded in a portion of the trench region and formed lower than the bulk silicon wafer. The optical waveguide device according to claim 4, wherein the optical waveguide core layer is formed away from one side wall of the trench region so as to satisfy the following expression 2 when the optical leakage loss is 10 dB / mm reference. Equation 2 0.2 μm <d5 <TW-W−0.2 μm, where d5 is the distance the optical waveguide core layer is away from one side wall of the bulk silicon wafer, TW is the width of the lower clad layer, and W is the optical waveguide core layer Is the width of. The optical waveguide device according to claim 1, further comprising a peripheral core layer formed on the bulk silicon wafer away from the optical waveguide core layer. Bulk silicon wafers; Trench regions formed in portions of the bulk silicon wafer; A recess lower clad layer filling a portion of the trench region lower than a surface of the bulk silicon wafer; An optical waveguide core layer formed on the recess lower clad layer away from one side wall of the trench region; A peripheral core layer formed on the bulk silicon wafer away from the optical waveguide core layer; And And an upper cladding layer formed to cover the core of the optical waveguide core. Preparing a bulk silicon wafer; Etching the bulk silicon wafer to form a trench region in a portion of the bulk silicon wafer; Forming a lower clad layer to fill at least a portion of the trench region; Forming a core layer on the lower clad layer and the bulk silicon wafer; Selectively etching the core layer to form an optical waveguide core layer on the lower clad layer to fall to one side wall of the trench region; And And forming an upper clad layer so as to cover the core layer of the optical waveguide. The method of claim 8, wherein forming the core layer, Forming an amorphous silicon layer on the lower clad layer and the bulk silicon wafer; And crystallizing the amorphous silicon layer to form a core layer with a single crystal silicon layer. The method of claim 8, wherein the optical waveguide core layer is formed on the same plane as the surface of the bulk silicon wafer or lower than the surface of the bulk silicon wafer.

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