KR20110050091A - Image sensor and method for manufacturing the same - Google Patents

Image sensor and method for manufacturing the same Download PDF

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Publication number
KR20110050091A
KR20110050091A KR1020090106933A KR20090106933A KR20110050091A KR 20110050091 A KR20110050091 A KR 20110050091A KR 1020090106933 A KR1020090106933 A KR 1020090106933A KR 20090106933 A KR20090106933 A KR 20090106933A KR 20110050091 A KR20110050091 A KR 20110050091A
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South Korea
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substrate
hole
forming
insulating layer
pad part
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KR1020090106933A
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Korean (ko)
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박성형
최선
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주식회사 동부하이텍
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Priority to KR1020090106933A priority Critical patent/KR20110050091A/en
Publication of KR20110050091A publication Critical patent/KR20110050091A/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/1463Pixel isolation structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14632Wafer-level processed structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14634Assemblies, i.e. Hybrid structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14687Wafer level processing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/1469Assemblies, i.e. hybrid integration

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

Embodiments relate to an image sensor and a method of manufacturing the same. An image sensor according to an embodiment includes a pixel area and a peripheral circuit area formed on a front side of a first substrate; An optical sensing unit and a readout circuit formed in the pixel area; An interlayer insulating layer formed on the entire surface of the first substrate; A wire formed in the pixel area and connected to the lead-out circuit; A pad part formed in the interlayer insulating layer of the peripheral circuit area; A through-hole penetrating the first substrate and the interlayer insulating layer from the back side of the first substrate to open the pad part; And a passivation layer pattern formed on the sidewall of the through hole and exposing the pad part.

Description

Image sensor and method for manufacturing the same

Embodiments relate to an image sensor and a method of manufacturing the same.

An image sensor is a semiconductor device that converts an optical image into an electrical signal, and is a charge coupled device (CCD) image sensor and a CMOS image sensor (CIS). Separated by.

In the prior art, a photodiode is formed on a substrate by ion implantation. As the size of the photodiode decreases for the purpose of increasing the number of pixels without increasing the chip size, the image quality decreases due to the reduction of the area of the light receiver.

In addition, since the stack height is not reduced as much as the area of the light receiving unit is reduced, the number of photons incident on the light receiving unit is also decreased due to the diffraction phenomenon of light called Airy Disk.

As an alternative to overcome this, an attempt is made to receive light through the wafer back side to minimize the step difference in the upper part of the light receiving unit and to eliminate the interference of light due to metal routing (back light receiving image sensor). ought.

Meanwhile, according to the related art, a photodiode is deposited in amorphous Si, or a readout circuitry is formed on a silicon substrate, and a photodiode is formed on another wafer, and then wafer-to-wafer bonding. (Wafer-to-Wafer Bonding), an image sensor (hereinafter, referred to as "3D image sensor") is formed in which a photodiode is formed on the lead-out circuit. The photodiode and lead-out circuit are connected via a metal line.

However, according to the prior art of the 3D image sensor, a wafer bonding with a lead-out circuit-formed wafer to a photodiode is inevitably carried out. In this case, it is difficult to properly connect the lead-out circuit and the photodiode due to the bonding problem. There is a point. For example, according to the prior art, wiring is formed on a lead-out circuit and wafer-to-wafer bonding is performed so that the wiring and the photodiode contact each other, and the contact between the wiring and the photodiode is difficult, and furthermore, Ohmic contact between the wiring and the photodiode is difficult. In addition, according to the prior art, there is a problem that a short is generated in the wiring for electrically connecting the photodiode, and there is a research to prevent the short, but there is a problem in that a complicated process is required.

Embodiments provide a back light receiving image sensor and a method of manufacturing the same, which can significantly reduce manufacturing cost.

In addition, the embodiment can maximize the amount of incident light by forming a light sensing unit and a lead-out circuit on the same substrate while minimizing the stack on the light receiving unit, and the interference and reflection of light due to metal routing The present invention provides a rear light-receiving image sensor and a method of manufacturing the same.

In addition, the embodiment provides an image sensor and a method of manufacturing the same by opening the pad portion at the back of the substrate to wire-bond directly to the pad portion.

An image sensor according to an embodiment includes a pixel area and a peripheral circuit area formed on a front side of a first substrate; An optical sensing unit and a readout circuit formed in the pixel area; An interlayer insulating layer formed on the entire surface of the first substrate; A wire formed in the pixel area and connected to the lead-out circuit; A pad part formed in the interlayer insulating layer of the peripheral circuit area; A through-hole penetrating the first substrate and the interlayer insulating layer from the back side of the first substrate to open the pad part; And a passivation layer pattern formed on the sidewall of the through hole and exposing the pad part.

In another embodiment, a method of manufacturing an image sensor includes: defining a pixel area and a peripheral circuit area on a front side of a first substrate; Forming a light sensing unit and a readout circuit in the pixel area; Forming an interlayer insulating layer on the entire surface of the first substrate; Forming pads in the peripheral circuit area and the wires connected to the lead-out circuit in the pixel area; Forming through-holes through the first substrate and the interlayer insulating layer to open the pad part at the back side of the first substrate; And forming a passivation layer pattern on the sidewall of the through hole and exposing the pad part.

According to an embodiment, a back light receiving image sensor and a method of manufacturing the same may use a wafer including an epitaxial layer as a donor wafer, and a light sensing unit and a circuit unit may be formed together on one wafer to significantly reduce manufacturing costs.

In addition, according to the embodiment, a wafer including an epitaxial layer may be used as a donor wafer, and since the light sensing unit and the circuit unit may be formed together on the epi wafer, the 3D image forming the photodiode on the upper side of the circuit. It is easy to manufacture without the need for a bonding process in the sensor, and thus there is an advantage that there is no bonding problem, no contact problem, and the like. On the other hand, since the bonding of the handle wafer and the donor wafer is bonded by interposing an insulating layer by an interlayer insulating layer or the like, there is almost no issue with bonding.

In addition, according to the embodiment, the amount of incident light may be maximized by minimizing the stack of the upper part of the light receiving unit, and the light characteristic of the image sensor may be maximized by eliminating interference and reflection of light due to metal routing.

In addition, in the embodiment, since the pad portion is opened at the rear surface of the substrate and wire-bonded directly to the pad portion, it is not necessary to form a super via in a front-end-of-line (FEOL) process, thereby securing process stability and reliability. It is effective.

Hereinafter, a back light receiving image sensor and a method of manufacturing the same according to an embodiment will be described in detail with reference to the accompanying drawings.

In the description of the embodiments, where it is described as being formed "on / under" of each layer, it is understood that the phase is formed directly or indirectly through another layer. It includes everything.

The present invention is not limited to the CMOS image sensor, and can be applied to any image sensor such as a CCD image sensor.

8 is a rear light receiving image sensor according to the first embodiment.

Referring to FIG. 8, the rear light receiving image sensor according to the first exemplary embodiment may include a device isolation region 110, a pixel region, and a peripheral circuit region Peri formed on the front side of the first substrate 100. Area), light sensing unit 120 and lead-out circuit 130, interlayer insulating layer 160, wiring 150 and pad unit 300, second substrate 200, microlens 180 and through hole (10).

The light sensing unit 120 and the lead-out circuit 130 are formed in the pixel area, and the interlayer insulating layer 160 and the wiring 150 are formed on the front surface of the first substrate 100. The pad part 300 is formed in the interlayer insulating layer 160 of the peripheral circuit area.

The second substrate 200 is bonded to the front surface of the first substrate 100 on which the wiring 150 is formed, and the microlens 180 is configured to sense the light on the back side of the first substrate. It is formed on the portion 120.

The through hole 10 opens the pad part 300 through the first substrate 100 in the peripheral circuit region.

The through hole 10 has a protective film pattern 400 formed on the sidewall to isolate the first substrate 100.

The pad part 300 may be formed of a metal wire and a bonding 600 through the through hole 10.

Hereinafter, a method of manufacturing the rear light receiving image sensor according to the first embodiment will be described in more detail with reference to FIGS. 1 to 8.

First, as shown in FIG. 1, a device isolation region 110 is formed on an epitaxial layer 100b of a first substrate 100, which is a silicon on insulator (SOI) substrate including an epitaxial layer 110b, and a pixel. An optical sensing unit 120 is formed in the epi layer 100b in the pixel area.

The device isolation region 110 may further include a dummy device isolation region 110a as a dummy pattern in the peripheral circuit region where the pad is formed. As a result, the process conditions of each pad may be the same at the time of pad opening, and thus the reliability of the pad opening process may be improved. On the other hand, the formation of the dummy device isolation region 110a is optional, the dummy device isolation region 110a may not be formed, or may be formed as an active layer instead of the dummy device isolation region.

The light sensing unit 120 may be a photodiode, but is not limited thereto.

The light sensing unit 120 may form an N-type ion implantation region on the P-type first substrate 100 and form a Po region on the N-type ion implantation region of the first substrate 100, but is not limited thereto. It doesn't happen.

Excess electrons and the like can be prevented by the Po region.

In addition, according to the embodiment, the charge dumping effect may be obtained by forming the PNP X-ray.

Subsequently, as shown in FIG. 2, the lead-out circuit 130 is formed on the first substrate 100 on which the light sensing unit 120 is formed.

The readout circuit 130 may include a transfer transistor, a reset transistor, a drive transistor, a select transistor, and the like, but is not limited thereto.

Thereafter, an interlayer insulating layer 160 is formed on the first substrate 100, and a wiring 150 is formed on the interlayer insulating layer 160.

The wiring 150 may include a first metal M1, a second metal M2, a third metal M3, and the like, but is not limited thereto.

Meanwhile, in an embodiment, the pad part 300 may be formed in the peripheral circuit area.

The pad part 300 may include a first pad 301, a second pad 302, a third pad 303, and a via metal 305 that is a connection metal between the pads, but is not limited thereto. It may include at least one of the metals.

The pad part 300 may form the first pad 301 at the same level and process as the first metal M1.

The pad part 300 may form the second pad 302 at the same level and process as the second metal M2.

The pad part 300 may form the third pad 303 at the same level and process as the third metal M3.

The pad part 300 may include at least one of first pads and third pads electrically connected to each other.

As shown in FIG. 3, the second substrate 200 may be bonded to the front surface of the first substrate 100 on which the wiring 150 is formed.

For example, the second substrate 200, which is a handle wafer, may be bonded to correspond to the wiring 150 side of the first substrate 100.

According to the exemplary embodiment, a bonding force with the first substrate 100 may be increased by forming the first insulating layer 210 on the upper surface of the second substrate 200 bonded with the first substrate 100.

The first insulating layer 210 may include at least one of an oxide film and a nitride film, but is not limited thereto.

Bonding is performed by contacting the first insulating layer 210 with the interlayer insulating layer 160, which is the front surface of the first substrate 100, thereby significantly increasing the bonding force between the first substrate 100 and the second substrate 200. You can.

That is, since the bonding of the handle wafer and the donor wafer is bonded by interposing an insulating layer by an interlayer insulating layer or the like, there is almost no issue with bonding.

Subsequently, as illustrated in FIG. 4, the silicon substrate 100a formed below the first substrate 100 is removed from the bonded first substrate 100.

That is, back grinding or etch-back may be performed on the first substrate 100, which is a donor wafer, for backside thinning.

In this case, when the silicon substrate 100a is removed, only the silicon substrate 100a can be easily removed because the oxide film 100c formed between the silicon substrate 100a0 and the epi layer 100b is used as an etch stop layer. have.

Since the first substrate 100, which is a donor wafer remaining after the silicon substrate 100a is removed, is thin, a second substrate 200, which is a handle wafer, is required to smoothly perform a color filter process.

In addition, according to the prior art of the 3D image sensor, there is a problem in that the electrical connection between the lead-out circuit and the photodiode is difficult to be made properly, and there is a problem in that a short occurs in the wiring for the electrical connection with the photodiode.

On the other hand, according to the embodiment, an epi wafer may be used as the first substrate 100 which is a donor wafer, and the light sensing unit 120 and the lead-out circuit 130 may be the first substrate 100. Can be formed together.

Therefore, it is easy to manufacture because there is no need for a bonding process between the substrate on which the light sensing unit is formed and the circuit formed substrate in the 3D image sensor forming the light sensing unit 120 on the upper side of the circuit. There is no problem, etc.

Thereafter, a first photoresist pattern 901 is formed on the oxide film 100c.

The first photoresist pattern 901 covers the remaining areas of the wafer except for the pad open area.

By using the first photoresist pattern 901 as a mask, the oxide layer 100c, the epi layer 100b, and the interlayer insulating layer 160 are etched to form a through hole 10, thereby opening the pad part 300. have.

The through hole 10 may have a width (a) of 40 μm to 100 μm, but the present invention is not limited thereto. Each pad may have various widths according to design, and the through hole may be formed according to the width of the pad. The width of 10 may also have various widths. Since the through hole 10 should open only the pad part 300, the through hole 10 is larger than the width of the pad through which the through hole 10 is opened in consideration of a margin with the pad and a photo process margin. It can form small.

As shown in FIG. 5, the through hole 10 exposing the first pad 301 is formed through the oxide film 100c, the epi layer 100b, and the interlayer insulating layer 160. .

For another example, when the pad part 300 includes only the third pad 303, the through hole 10 deepens the interlayer insulating layer 160 to expose the third pad 303. It can be formed by etching.

Subsequently, as shown in FIG. 6, a protective film 400a is formed in the through hole 10 and on the oxide film 100c.

The passivation layer 400a may include at least one of an oxide layer and a nitride layer.

The passivation layer 400a may be formed along an inner wall of the through hole 10.

Thereafter, a second photoresist pattern 902 is selectively formed on the passivation layer 400a.

The second photoresist pattern 902 may be formed in a portion of the periphery of the through hole 10.

As shown in FIG. 7, the passivation layer 400a is anisotropically etched using the second photoresist pattern 902 as a mask to form the passivation layer pattern 400.

The passivation layer pattern 400 is formed on sidewalls of the through hole 10, and a bottom surface thereof is etched to expose the first pad 301.

The passivation layer pattern 400 may be connected to a sidewall of the through hole 10 to cover a portion of the oxide layer 100c.

As another example, the second photoresist pattern 902 is formed to open only the through hole 10, so that the passivation layer pattern 400 may include a passivation layer 400a formed on a bottom surface of the through hole 10. The first pad 301 may be removed to expose the first pad 301, and the passivation layer pattern 400 may be formed on the sidewall of the through hole 10 and the oxide layer 100c.

Subsequently, as shown in FIG. 8, a color filter 170 is formed on the light sensing unit 120 of the epi layer 100b, which is a back side of the first substrate 100. can do.

In the case where the light sensing unit 120 is an R, G, or B vertical stacked photodiode, a color filter may not be formed.

Thereafter, the microlens 180 may be formed on the color filter 170.

In the present exemplary embodiment, the color filter and the microlens forming process are performed after the pad opening process, but the pad opening process may be performed after the color filter and the microlens forming process.

As a result, an image sensor which receives the back side may be manufactured.

Then, each chip is bonded to a circuit board such as the pad unit 300 and a printed circuit board (PCB) using a metal wire 600, so that the chip may be mounted on the circuit board.

The metal wire 600 may be made of, for example, gold (Au), but is not limited thereto.

9 is a back light receiving image sensor according to a second embodiment.

The structure of the image sensor according to the second embodiment will be understood with reference to the first embodiment described with reference to FIGS. 1 to 8. Like reference numerals refer to like elements.

Referring to FIG. 9, the pad part 300 may be connected to an external terminal by using a solder bump 700.

The solder bumps 700 may be in electrical contact with the pad part 300 by forming solder paste in the through-holes 10 and reflowing the solder pastes.

The solder bumps 700 are electrically connected to the pad part 300 while filling the inside of the through hole 10 and protrude upward from the through hole 10 to be electrically connected to an external terminal on a circuit board on which a chip is to be mounted. Can be connected.

According to an embodiment, a back light receiving image sensor and a method of manufacturing the same may use a wafer including an epitaxial layer as a donor wafer, and a light sensing unit and a circuit unit may be formed together on one wafer to significantly reduce manufacturing costs.

In addition, according to the embodiment, a wafer including an epitaxial layer may be used as a donor wafer, and since the light sensing unit and the circuit unit may be formed together on the epi wafer, the 3D image forming the photodiode on the upper side of the circuit. It is easy to manufacture without the need for a bonding process in the sensor, and thus there is an advantage that there is no bonding problem, no contact problem, and the like. On the other hand, since the bonding of the handle wafer and the donor wafer is bonded by interposing an insulating layer by an interlayer insulating layer or the like, there is almost no issue with bonding.

In addition, according to the embodiment, the amount of incident light may be maximized by minimizing the stack of the upper part of the light receiving unit, and the optical characteristics of the image sensor may be maximized by eliminating interference and reflection of light due to metal routing.

In addition, in the embodiment, since the pad portion is opened at the back of the substrate and wire-bonded directly to the pad portion, there is no need to form a super via in a front-end-of-line (FEOL) process, thereby ensuring process stability and reliability. The effect is secured.

The present invention is not limited to the described embodiments and drawings, and various other embodiments are possible within the scope of the claims.

 1 to 8 are cross-sectional views illustrating a method of manufacturing a rear light-receiving image sensor according to a first embodiment.

9 is a back light receiving image sensor according to a second embodiment.

Claims (17)

A pixel region and a peripheral circuit region formed on the front side of the first substrate; An optical sensing unit and a readout circuit formed in the pixel area; An interlayer insulating layer formed on the entire surface of the first substrate; A wire formed in the pixel area and connected to the lead-out circuit; A pad part formed in the interlayer insulating layer of the peripheral circuit area; A through-hole penetrating the first substrate and the interlayer insulating layer from the back side of the first substrate to open the pad part; And And a passivation layer pattern formed on a sidewall of the through hole and exposing the pad part. The method of claim 1, And a microlens formed on the light sensing unit on the back side of the first substrate. The method of claim 1, And a second substrate bonded to the interlayer insulating layer on the front surface of the first substrate. The method of claim 1, The width of the through hole is an image sensor of 40㎛ ~ 100㎛. The method of claim 1, And an insulating layer formed on the rear surface of the first substrate. The method of claim 1, The protective film pattern includes at least one of an oxide film and a nitride film. The method of claim 1, And a metal wire electrically connected to the pad part in the through hole. The method of claim 1, And a solder bump electrically connected to the pad part in the through hole. The method of claim 1, And a dummy device isolation region formed in the pixel region and corresponding to the pad portion in the peripheral circuit region. Defining a pixel area and a peripheral circuit area on a front side of the first substrate; Forming a light sensing unit and a readout circuit in the pixel area; Forming an interlayer insulating layer on the entire surface of the first substrate; Forming pads in the peripheral circuit area and the wires connected to the lead-out circuit in the pixel area; Forming through-holes through the first substrate and the interlayer insulating layer to open the pad part at the back side of the first substrate; And And forming a passivation layer pattern on the sidewall of the through hole and exposing the pad part. The method of claim 10, Before forming the through hole, Bonding the interlayer insulating layer and the second substrate formed on the front surface of the first substrate; And removing a lower side of the first substrate. The method of claim 10, And forming a color filter and a micro lens on an upper portion of the light sensing unit on the back side of the first substrate. The method of claim 10, In forming the through hole, Forming a first photoresist pattern on a rear surface of the first substrate; And etching the first substrate and the interlayer insulating layer using the first photoresist pattern as a mask to open the pad part. The method of claim 10, In the forming of the protective film pattern, Forming a protective film on a rear surface of the first substrate on which the through hole is formed; Forming a second photoresist pattern on the protective film; And etching the passivation layer using the second photoresist pattern as a mask to form a passivation layer pattern on the sidewall of the through hole and to expose the pad part on the bottom surface of the through hole. The method of claim 10, And a metal wire electrically connected to the pad part in the through hole. The method of claim 10, And a solder bump electrically connected to the pad part in the through hole. The method of claim 10, And forming a device isolation region in the pixel region on the first substrate and a dummy device isolation region in the peripheral circuit region corresponding to the pad portion.
KR1020090106933A 2009-11-06 2009-11-06 Image sensor and method for manufacturing the same KR20110050091A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9048354B2 (en) 2012-05-30 2015-06-02 Samsung Electronics Co., Ltd. Methods of forming a through via structure
CN109065555A (en) * 2012-03-20 2018-12-21 三星电子株式会社 Imaging sensor and its manufacturing method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109065555A (en) * 2012-03-20 2018-12-21 三星电子株式会社 Imaging sensor and its manufacturing method
CN109065555B (en) * 2012-03-20 2023-06-23 三星电子株式会社 Image sensor and a method of manufacturing the same
US9048354B2 (en) 2012-05-30 2015-06-02 Samsung Electronics Co., Ltd. Methods of forming a through via structure
US9608026B2 (en) 2012-05-30 2017-03-28 Samsung Electronics Co., Ltd. Through via structure, methods of forming the same

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