KR20110037401A - Semiconductor package and mobile phone comprising the same - Google Patents

Abstract

PURPOSE: A semiconductor package and a mobile phone comprising the same are provided to prevent semiconductor chips from being inclined to a substrate by forming a filling material around the semiconductor chip. CONSTITUTION: In a semiconductor package and a mobile phone comprising the same, first to fourth semiconductor chips(25,95,105,115) are on a substrate(10). The first to fourth semiconductor chips include a cascade shape in both sides. At least one connection wire(125) electrically connects the substrate the semiconductor chips. A filling auxiliary member(30) is arranged around the other side of the semiconductors. The filling auxiliary member includes a filling member(34) and or filling adhesives.

Description

Semiconductor Package and Mobile Phone Comprising The Same

Embodiments relate to a semiconductor package and a mobile phone including the same.

Recently, a semiconductor package has semiconductor chips stacked on a substrate in order to realize high integration. Each of the semiconductor chips can be thinner and thinner to cope with the trend of higher integration. The semiconductor chips may be disposed on a substrate to expose each other at both sides. The semiconductor chips may have a convex portion at one side and a concave portion at the other side. The convex portion has a shape opposite to that of the concave portion. The semiconductor chips may be electrically connected to the substrate through connection wires at one side thereof.

Fillers may be disposed on the substrate, the semiconductor chips, and the connection lines. The filler may be disposed in the convex portion and the concave portion of the semiconductor chips. The filler has resin and fillers. In this case, the filler may not sufficiently fill the recesses of the semiconductor chips. This is because the diameter of each of the fillers of the filler may be large compared to the thickness of each of the semiconductor chips. Therefore, the filler may form voids in the recesses of the semiconductor chips.

The semiconductor chips may be inclined toward the periphery of the void toward the substrate by receiving the physical pressure or the external pressure of the filler. Some of the semiconductor chips may not be electrically connected to the substrate through the connection wires. And, the filler can not be temporarily changed in order to cope with the trend of high integration. Altering the filler may increase the manufacturing cost of the semiconductor package. The semiconductor package may be disposed in a mobile phone. The mobile phone may not store image or audio data in the semiconductor package as much as a desired capacity because of voids in the semiconductor package.

SUMMARY Embodiments of the present invention provide a semiconductor package suitable for sufficiently filling recesses located around semiconductor chips when each side of the semiconductor chips has stepped shapes.

Another technical problem to be solved by the embodiments of the present invention is to provide a mobile phone suitable for storing image or audio data in a semiconductor package as much as a desired capacity.

In order to implement the above technical problems, embodiments provide a semiconductor package suitable for preventing the inclination of semiconductor chips with respect to a substrate and a mobile phone including the same.

The semiconductor package according to the embodiments may include at least two semiconductor chips, at least one connection wiring, and a filling auxiliary structure. The at least two semiconductor chips may be sequentially stacked on a substrate. The at least two semiconductor chips may have cascade shapes on both sides. The at least one connection line may be disposed on a selected side of both sides of the at least two semiconductor chips. The filling aid may be disposed around the selected side of the at least two semiconductor chips.

According to selected embodiments, the staircase shapes may have one of the same trajectory and another trajectory at the selected level.

According to selected embodiments, the stepped shapes may expose surfaces facing each other between the at least two semiconductor chips.

According to the remaining embodiments, the staircase shapes are concave at the selected side and a convex portion at the selected side via a selected semiconductor chip located relatively below the at least two semiconductor chips, and at the other side of the both sides. It may have a concave portion.

According to other embodiments, the filling aid may have one of a shape filling the recess at the remaining side, a step shape of the recess at the remaining side, and a shape positioned below the at least two semiconductor chips. .

The semiconductor package according to the embodiments may include a substrate, semiconductor chips, at least one connection wiring, and a filling aid. The semiconductor chips may be sequentially stacked on the substrate. The semiconductor chips may have stepped shapes on both sides thereof. The semiconductor chips may define a cave together with the substrate at a selected side of both sides. The at least one connection line may be positioned on the other side of the both sides of the semiconductor chips to electrically connect the substrate and the semiconductor chips. The filling aid may be disposed around the remaining side of the semiconductor chips.

According to selected embodiments, the staircase shapes may have one of the same trajectories and another trajectory at the selected level.

According to selected embodiments, the stepped shapes may expose surfaces facing each other between the semiconductor chips.

According to selected embodiments, the filling aid may be located at the selected side to partially fill the cave.

According to selected embodiments, the filling aid may be located at the selected side to sufficiently fill the cave.

According to selected embodiments, the filling aid may have a stepped shape of at least one of the selected semiconductor chips spaced from the substrate while being formed in a stepped shape of the selected side.

According to selected embodiments, the filling aid may have an opening cross section of a hole passing through selected semiconductor chips spaced apart from the substrate while being formed in a step shape of the selected side.

In example embodiments, the filling assistant may have substantially the same thickness under the semiconductor chips.

In some embodiments, the filling assistant may be positioned below the semiconductor chips and may have a tapered shape from the selected side of the two sides toward the remaining side.

In example embodiments, the semiconductor package may further include a filler covering the substrate, the semiconductor chips, the filling assistant, and the at least one connection line.

According to embodiments, a mobile phone may include a driving unit and a memory card. The drive device can be electrically connected to the memory card. The memory card may have at least two semiconductor chips, at least one connection wiring, and a filling aid in a semiconductor package. The at least two semiconductor chips may be sequentially stacked on a substrate, and may have step shapes on both sides, respectively. The at least one connection line may be disposed on a selected side of both sides of the at least two semiconductor chips. The filling aid may be disposed around the selected side of the at least two semiconductor chips.

According to selected embodiments, the driving device may include a baseband module, a camera module, an LCD module, a memory system, and a multi-electrically connected device. It may have a media module and an RF module.

According to selected embodiments, the staircase shapes may have one of the same trajectories and another trajectory at the selected level.

According to selected embodiments, the stepped shapes may have a convex portion at the selected side and a concave portion at the other side of the both sides through the selected semiconductor chip positioned relatively lower of the at least two semiconductor chips. .

According to selected embodiments, the filling aid may have one of a shape filling the recess at the remaining side, a step shape of the recess at the remaining side, and a shape positioned below the at least two semiconductor chips. .

As described above, the semiconductor package according to the embodiments does not provide voids that may occur around the semiconductor chips when each has stepped shapes on both sides of the semiconductor chips. The voids may be removed through a filling aid located around the semiconductor chips. In addition, the filling assistant may prevent the semiconductor chips from being inclined toward the substrate. In this way, the semiconductor chips can be electrically connected to the substrate through the filling aid compared to the prior art.

The mobile phone according to the embodiments may include a semiconductor package having a filling aid. Since the semiconductor package has semiconductor chips and a substrate which are stably electrically connected to each other, the electrical characteristics of the mobile phone can be improved. The mobile phone may have a stable memory capacity as desired through the semiconductor package. Through this, the mobile phone can reliably store image or audio data in a semiconductor package compared with the prior art.

Aspects of the above embodiments will now be described with reference to the accompanying drawings. However, the above embodiments may be embodied in many different forms and should not be construed as limited to the aspects set forth herein. Rather, the above aspects make the embodiments more thorough and complete, and fully convey the scope of the embodiments to those skilled in the art. Although terms referring to first, second, etc. may be used herein to describe various components, it will be understood that the components are not limited to these terms. These terms are only used to distinguish one component from another.

As used herein, the term 'semiconductor chip' may be used to describe the result of a pre-package process in a semiconductor manufacturing line. The term 'fill adjuvant' may be used to describe the secondary role of the filler. In addition, particularly relative terms such as “periphery, optional, on”, etc., simplify the description to simplify the description of the selected component, the relative relationship of other components with certain shapes, or the shapes shown in the figures. And the use of the terminology herein is for the purpose of describing particular aspects only and is not intended to be limiting of the embodiments.

Now, semiconductor packages according to embodiments will be described in detail with reference to FIGS. 1 and 2.

1 is a plan view illustrating a semiconductor package according to example embodiments.

Referring to FIG. 1, a semiconductor package 140 according to embodiments has first to fourth semiconductor chips 25, 95, 105, and 115 on a substrate 10. The substrate 10 may have at least one base pad 15. The first to fourth semiconductor chips 25, 95, 105, and 115 may expose at least one base pad 15 at a selected side of both sides. The first to fourth semiconductor chips 25, 95, 105, and 115 may expose the first to third semiconductor chips 25, 95, and 105 at the selected side.

The second semiconductor chip 95 may protrude from the side surface of the remaining side of the first semiconductor chip 25 by a predetermined width W1 or another width. The third semiconductor chip 105 may protrude from the side surface of the remaining side of the second semiconductor chip 95 by a predetermined width W1 or another width. The fourth semiconductor chip 115 may protrude from the side surface of the other side of the third semiconductor chip 105 by a predetermined width W1 or another width. The first to fourth semiconductor chips 25, 95, 105, and 115 may have different overlapping shapes on both sides along the cut line I ′.

The fourth semiconductor chip 115 may protrude from the side surface of the other side of the first semiconductor chip 25 by a predetermined length EL1. The first to fourth semiconductor chips 25, 95, 105, and 115 may have substantially the same horizontal width W2 and vertical width W3. The first to fourth semiconductor chips 25, 95, 105, and 115 may have different horizontal widths and different vertical widths. The first to fourth semiconductor chips 25, 95, 105, and 115 may have substantially the same area or different areas. The first to fourth semiconductor chips 25, 95, 105, and 115 may be replaced with other stacked semiconductor chips.

Each of the first to fourth semiconductor chips 25, 95, 105, and 115 may have at least one connection pad 120. At least one connection wire 125 may be disposed on the at least one connection pad 120. The at least one connection wire 125 may extend to at least one base pad 15. The at least one connection wiring 125 may electrically connect the substrate 10 and the first to fourth semiconductor chips 25, 95, 105, and 115. The at least one connection wiring 125 may have a plurality of wires.

Filling auxiliary structures 30, 40, 50, 60, 70 or 80 around the selected side of the first to fourth semiconductor chips 25, 95, 105 and 115 are shown in FIGS. 8, 9 or 10 can be arranged. The filling aids 30, 40, 50, 60, or 70 may be disposed on the remaining sides of the first to fourth semiconductor chips 25, 95, 105, and 115 as shown in FIGS. 5, 6, 7, 8, or 9. have. The horizontal width EL2 of the filling aids 30, 40, 50, 60 or 70 is substantially equal to the protruding length EL1 of the fourth semiconductor chip 115 from the side of the remaining side of the first semiconductor chip 25. Can have the same size or smaller size.

The vertical width EL3 of the filling assistant 30, 40, 50, 60, or 70 may be substantially the same size as the vertical width W3 of the first semiconductor chip 25. The filling assistant 80 may be disposed under the first to fourth semiconductor chips 25, 95, 105, and 115 as shown in FIG. 10.

FIG. 2 is a cross-sectional view of the semiconductor package taken along the cutting line II ′ of FIG. 1.

Referring to FIG. 2, the semiconductor package 140 according to the embodiments may include first to fourth semiconductor chips 25, 95, 105, and 115. The second to fourth semiconductor chips 95, 105 and 115 may protrude from the first to third semiconductor chips 25, 95 and 105 by the same width W1 as shown in FIG. 1 through the side portions. The first to fourth semiconductor chips 25, 95, 105, and 115 may have cascade shapes CS on both sides thereof. The stepped shapes CS may be selected from both sides through the first to third semiconductor chips 25, 95, and 105 positioned relatively below the first to fourth semiconductor chips 25, 95, 105, and 115. It may have a convex portion at the side.

The staircase shapes CS may be disposed in the remaining portions of both sides through the first to third semiconductor chips 25, 95, and 105 positioned relatively below the first to fourth semiconductor chips 25, 95, 105, and 115. It may have a concave portion at the side. The fourth semiconductor chip 115 may protrude from the side surface of the other side of the first semiconductor chip 25 by a predetermined length EL1. The stepped shapes CS may have one of the same trajectory and another trajectory at the selected level. The stepped shapes CS may expose surfaces facing each other between the first to fourth semiconductor chips 25, 95, 105, and 115.

Each of the first to fourth semiconductor chips 25, 95, 105, and 115 may have at least one connection pad 120. The first to fourth semiconductor chips 25, 95, 105, and 115 may have substantially the same width W2 as shown in FIG. 1. The first to fourth semiconductor chips 25, 95, 105, and 115 may have substantially the same thickness T1 or different thicknesses. The substrate 10 may be disposed on the first to fourth semiconductor chips 25, 95, 105, and 115. The substrate 10 may include a printed circuit board (PCB). The substrate 10 defines a cave C on the remaining side of the first to fourth semiconductor chips 25, 95, 105, and 115 together with the first to fourth semiconductor chips 25, 95, 105, and 115. can do.

The substrate 10 may have at least one base pad 15. First to fourth adhesives 20, 90, 100, and 110 may be disposed between the substrate 10 and the first to fourth semiconductor chips 25, 95, 105, and 115. The first to fourth adhesives 20, 90, 100, and 110 may have the same size or different sizes as the horizontal width W2 of the first to fourth semiconductor chips 25, 95, 105, and 115. . At least one connection line 125 may be disposed on selected sides of the first to fourth semiconductor chips 25, 95, 105, and 115. The at least one connection wiring 125 may include a plurality of wires.

The at least one connection wiring 125 may contact at least one base pad 15 and at least one connection pad 120 of each of the first to fourth semiconductor chips 25, 95, 105, and 115. have. The at least one connection wiring 125 may electrically connect the substrate 10 and the first to fourth semiconductor chips 25, 95, 105, and 115. The filling aid 30 may be disposed on selected sides of the first to fourth semiconductor chips 25, 95, 105, and 115. The filling aid 30 may comprise a filling member 34 and / or filling adhesives 38.

The filler 34 and / or filler adhesive 38 may partially fill the cave C at the remaining sides of the first to fourth semiconductor chips 25, 95, 105, and 115. When the first and second adhesives 20 and 90 have the same width W2 as the first and second semiconductors 25 and 95, the filler 34 and / or the filler adhesive 38 may be The first adhesive 20, the semiconductor chip 25, and the second adhesive 90 may be in contact with each other. When the first and second adhesives 20 and 90 have different widths from the first and second semiconductors 25 and 95, the filler 34 and / or the filler adhesive 38 may be formed of a first adhesive ( 20 and the semiconductor chip 25 and the second semiconductor chip 95.

A filling structure 130 may be disposed on the substrate 10 and the first to fourth semiconductor chips 25, 95, 105, and 115. The filler 130 may be disposed in the convex portion and the concave portion of the first to fourth semiconductor chips 25, 95, 105, and 115. The filler 130 may cover at least one connection wiring 125.

Next, a method of forming a semiconductor package according to the embodiments will be described with reference to FIGS. 3 to 10.

3 to 5 are cross-sectional views illustrating a method of forming a semiconductor package according to embodiments, taken along the cut line II ′ of FIG. 1. 3 to 5 will use the same reference numerals for the same members as in FIG.

Referring to FIG. 3, according to embodiments, the substrate 10 may be prepared. The substrate 10 may include a printed circuit board (PCB). The substrate 10 may have a desired circuit. The substrate 10 may not be bent or bent. The substrate 10 may include at least one base pad 15. The at least one base pad 15 may be in contact with a circuit of the substrate 10. The at least one base pad 15 may include a conductive material. The first adhesive 20 and the semiconductor chip 25 may be sequentially formed on the substrate 10.

The first adhesive 20 and the semiconductor chip 25 may be formed to expose at least one base pad 15 through a selected side of both sides. The first adhesive 20 and the semiconductor chip 25 may have a predetermined thickness T2. The first adhesive 20 may have insulation. The first semiconductor chip 25 may include a volatile or nonvolatile memory device. The first adhesive 20 and the semiconductor chip 25 may have a width W2 of FIG. 1. The filling assistant 30 may be formed on the remaining side of both sides of the first adhesive 20 and the semiconductor chip 25.

The filling assistant 30 may be formed on the substrate 10 to be in contact with the first adhesive 20 and the semiconductor chip 25. The filling assistant 30 may have a predetermined width W1 as shown in FIG. 1. The filling assistant 30 may have a thickness T2 that is substantially the same as that of the first adhesive 20 and the semiconductor chip 25. The filling aid 30 may have a filler 34 and / or a filler adhesive 38. The filler 30 may include silicon or a material other than silicon. The filler adhesive 38 may be made of the same material as the first adhesive 20.

Referring to FIG. 4, a second adhesive 90 and a semiconductor chip 95 may be sequentially formed on the first semiconductor chip 25 and the filling assistant 30. The second adhesive 90 and the semiconductor chip 95 may be formed to expose the first semiconductor chip 25 through a selected side of both sides. The second adhesive 90 and the semiconductor chip 95 may protrude from the side surfaces of the first adhesive 20 and the semiconductor chip 25 by the width W1 of the filling assistant 30 at the remaining side of both sides. Can be. The second adhesive 90 and the semiconductor chip 95 may have substantially the same thickness T2 or different thickness as the first adhesive 20 and the semiconductor chip 25.

The second adhesive 90 and the semiconductor chip 95 may cover the filling assistant 30 on the remaining side. The second adhesive 90 may include the same material as the first adhesive 20. The second semiconductor chip 95 may include the same device as the first semiconductor chip 25 or another device. The third adhesive 100 and the semiconductor chip 105 may be sequentially formed on the second semiconductor chip 95. The third adhesive 100 and the semiconductor chip 105 may be formed to expose the second semiconductor chip 95 through a selected side of both sides.

The third adhesive 100 and the semiconductor chip 105 may have substantially the same thickness T2 or a different thickness as the first adhesive 20 and the semiconductor chip 25. The third adhesive 100 and the semiconductor chip 105 may protrude from the remaining sides of both sides by the width W1 of the filling assistant 30. The third adhesive 100 and the semiconductor chip 105 may simultaneously expose the first and second semiconductor chips 25 and 95 through the selected side portion. The third adhesive 100 may include the same material as the second adhesive 90. The third semiconductor chip 105 may include the same device or another device as the second semiconductor chip 95.

Referring to FIG. 5, a fourth adhesive 110 and a semiconductor chip 115 may be sequentially formed on the third semiconductor chip 105. The fourth adhesive 110 and the semiconductor chip 115 may have substantially the same thickness T2 or a different thickness as the first adhesive 20 and the semiconductor chip 25. The fourth adhesive 110 and the semiconductor chip 115 may be formed to expose the third semiconductor chip 105 through a selected side of both sides. The fourth adhesive 110 and the semiconductor chip 115 may protrude from the remaining side of both sides by the width W1 of the filling assistant 30.

The fourth adhesive 110 may include the same material as the third adhesive 100. The fourth semiconductor chip 115 may include the same device or another device as the third semiconductor chip 105. The first to fourth adhesives 20, 90, 100, and 110 and the semiconductor chips 25, 95, 105, and 115 may form stepped shapes CS on both sides, respectively. One of the staircase shapes CS may be indicated by a bold line. The first to fourth adhesives 20, 90, 100, and 110 and the semiconductor chips 25, 95, 105, and 115 may define the cave C together with the substrate 10 at the other side of both sides. have.

The first to fourth adhesives 20, 90, 100, and 110 and the semiconductor chips 25, 95, 105, and 115 are not inclined toward the substrate 10 because of the filling assistant 30. Can be leveled relative to the At least one connection pad 120 may be formed on each of the first to fourth semiconductor chips 25, 95, 105, and 115. The at least one connection pad 120 may include a conductive material. The at least one connection pad 120 may be a selected component of the first to fourth semiconductor chips 25, 95, 105, and 115.

At least one connection wiring 125 may be formed on the at least one base pad 15 and at least one connection pad 120. The at least one connection wiring 125 may include a plurality of wires. Since the first to fourth adhesives 20, 90, 100, and 110 and the semiconductor chips 25, 95, 105, and 115 are horizontal with respect to the substrate 10, the at least one connection wiring 125 may be formed. At least one base pad 15 and at least one connection pad 120 may be stably contacted with each other.

Filler 130 is disposed on substrate 10 and first through fourth semiconductor chips 25, 95, 105, and 115 to cover at least one connection pad 120 and at least one connection wiring 125. Can be formed. The filler 130 may include resins and fillers. Each of the fillers may have a diameter larger than the thickness T2 of the first adhesive 20 and the semiconductor chip 25. In this case, the filler 130 may void the cave C located on the remaining side of the first to fourth semiconductor chips 25, 95, 105, and 115 through the fill assistant 30. I can fill it enough.

Through this, the filler 130 is the substrate 10, the filling assistant 30, the first to fourth adhesives (20, 90, 100, 110) and the semiconductor chips (25, 95, 105, 115), The semiconductor package 140 according to the exemplary embodiments may be configured together with the at least one connection wiring 125.

FIG. 6 is a cross-sectional view illustrating a method of forming a semiconductor package in accordance with embodiments, taken along cut line II ′ of FIG. 1. FIG. 6 uses the same reference numerals for the same members as FIGS. 3 to 5.

Referring to FIG. 6, according to embodiments, the substrate 10 may be prepared. The substrate 10 may have at least one base pad 15. The first adhesive 20 and the semiconductor chip 25 may be sequentially formed on the substrate 10. The first adhesive 20 and the semiconductor chip 25 may be formed to expose at least one base pad 15 through a selected side of both sides. The first adhesive 20 and the semiconductor chip 25 may have a predetermined thickness T2.

The filling assistant 40 may be formed on the remaining side of both sides of the first adhesive 20 and the semiconductor chip 25. The filling aid 40 may have a predetermined width W1. The filling aid 40 may comprise resin and / or fillers. In the case where the filling aid 40 has fillers, the diameter of each of the fillers of the filling aid 40 is smaller or larger than the thickness T2 of the first adhesive 20 and the semiconductor chip 25. May have a size. The filling aid 40 may have a material that is easily deformed to external pressure in addition to the resin and / or fillers.

The process steps of FIGS. 4 and 5 may be applied to the first adhesive 20, the semiconductor chip 25, and the filling aid 40. In this case, on the substrate 10 and the first to fourth semiconductor chips 25, 95, 105, and 115 to cover at least one connection pad 120 and at least one connection wiring 125 of FIG. 5. Filler 130 may be formed as shown in FIG. The filler 130 may include resins and fillers. Diameters of the fillers of the filler 130 may have a larger size than the thickness T2 of the first adhesive 20 and the semiconductor chip 25.

Each of the fillers of the filler 130 may have a diameter larger than that of the fillers of the filler assistant 40. The filler 130 may sufficiently fill the cave C located at the remaining side of the first to fourth semiconductor chips 25, 95, 105, and 115 without the void through the filling assistant 40. . The first to fourth adhesives 20, 90, 100, and 110 and the semiconductor chips 25, 95, 105, and 115 are not inclined toward the substrate 10 because of the filling assistant 40. It can be leveled with respect to.

Through this, the filler 130 is the substrate 10, the filling assistant 40, the first to fourth adhesives (20, 90, 100, 110) and the semiconductor chips (25, 95, 105, 115), The semiconductor package 140 according to the embodiments may be configured as shown in FIG. 6 together with the at least one connection wiring 125.

FIG. 7 is a cross-sectional view illustrating a method of forming a semiconductor package in accordance with embodiments, taken along cut line II ′ in FIG. 1. 7 uses the same reference numerals for the same members as in FIGS. 3 to 5.

Referring to FIG. 7, the substrate 10 may be prepared according to embodiments. The process steps of FIGS. 3 to 5 may be applied without forming the filling aid 30 or 40 of FIG. 3 or 6 on the substrate 10. In this case, the first to fourth adhesives 20, 90, 100, and 110 and the semiconductor chips 25, 95, 105, and 115 of FIG. 5 have at least one base pad 15 on a selected side of both sides. May be exposed as shown in FIG. 7. The filling assistant 50 may be formed on the other side of both sides of the first to fourth adhesives 20, 90, 100, and 110 and the semiconductor chips 25, 95, 105, and 115.

The filling aid 50 may be formed during or after the first to fourth adhesives 20, 90, 100, 110 and the semiconductor chips 25, 95, 105, 115 of FIG. 5 are manufactured. . The filling aid 50 is formed along the stepped shape CS at the remaining sides of the first to fourth adhesives 20, 90, 100, and 110 and the semiconductor chips 25, 95, 105, and 115, as shown in FIG. 7. Can be formed. The filling aid 50 may sufficiently fill the cave C positioned on the remaining sides of the first to fourth adhesives 20, 90, 100, and 110 and the semiconductor chips 25, 95, 105, and 115. .

The filling aid 50 may include the same material as the filling aid 30 or 40 of FIG. 3 or 6. The filling assistant 50 may have a surface S1 that is substantially the same as a side surface of the fourth adhesive 110 and the semiconductor chip 115. Alternatively, the filling aid 50 may be formed during or after the first to third adhesives 20, 90, 100 and the semiconductor chips 25, 95, 105 of FIG. 5 are manufactured. The filling aid 50 may be formed as shown in FIG. 7 along a stepped shape CS at the remaining sides of the first to third adhesives 20, 90, and 100 and the semiconductor chips 25, 95, and 105. .

The filling aid 50 may partially fill the cave C located on the remaining sides of the first to fourth adhesives 20, 90, 100, and 110 and the semiconductor chips 25, 95, 105, and 115. have. The filling assistant 50 may have a surface S2 that is substantially the same as a side surface of the third adhesive 100 and the semiconductor chip 105. Filler 130 on substrate 10 and first through fourth semiconductor chips 25, 95, 105, and 115 to cover at least one connection pad 120 and at least one connection wiring 125 of FIG. 5. ) May be formed as shown in FIG. 7. The filler 130 may include resins and fillers.

The diameters of the fillers of the filler 130 may have a size larger than the thickness T2 of the first adhesive 20 and the semiconductor chip 25. The filler 130 may include the filler assistant 50. ), The periphery of the cave C or a portion of the cave c positioned on the remaining side of the first to fourth semiconductor chips 25, 95, 105, and 115 may be sufficiently filled without voids. The first to fourth adhesives 20, 90, 100, and 110 and the semiconductor chips 25, 95, 105, and 115 are not inclined toward the substrate 10 because of the filling assistant 50. Can be leveled relative to the

 Through this, the filler 130 is the substrate 10, the filling assistant 50, the first to fourth adhesives (20, 90, 100, 110) and the semiconductor chips (25, 95, 105, 115), In addition, the semiconductor package 140 according to the embodiments may be configured as shown in FIG. 7 together with the at least one connection wiring 125.

8 is a cross-sectional view illustrating a method of forming a semiconductor package in accordance with embodiments, taken along cut line II ′ of FIG. 1. 8 uses the same reference numerals for the same members as in FIGS. 3 to 5.

Referring to FIG. 8, according to embodiments, the substrate 10 may be prepared. The process steps of FIGS. 3 to 5 may be applied without forming the filling aids 30, 40, or 50 of FIGS. 3, 6, or 7 on the substrate 10. In this case, the first to fourth adhesives 20, 90, 100, and 110 and the semiconductor chips 25, 95, 105, and 115 of FIG. 5 have at least one base pad 15 on a selected side of both sides. May be exposed as shown in FIG. 8. The second to fourth semiconductor chips 95, 105, and 115 may have inclined corners as shown in FIG. 8 at the remaining side of both sides.

The inclined edges may be formed by removing the sacrificial portions 65 of FIG. 8 at a predetermined angle θ1 from the corners of the second to fourth semiconductor chips 95, 105, and 115 of FIG. 5. Each of the sacrificial parts 65 may be surrounded by a dotted line in FIG. 8. Surfaces of the inclined corners of the second to fourth semiconductor chips 95, 105, and 115 may or may not meet each side surface of the first to third semiconductor chips 25, 95, and 105. When the side of the inclined edge does not meet each side of each of the first to third semiconductor chips 25, 95, and 105, each of the second to fourth semiconductor chips 95, 105, and 115 may have a first to third surface. 3 may protrude from the side surfaces of each of the semiconductor chips 25, 95, and 105 by a predetermined width W5.

The inclined edges may be included in the stepped shape CS along the thick line at the remaining sides of the first to fourth adhesives 20, 90, 100, and 110 and the semiconductor chips 25, 95, 105, and 115 of FIG. 7. Can be. The stepped shape CS of the remaining sides of the first to fourth adhesives 20, 90, 100, and 110 and the semiconductor chips 25, 95, 105, and 115 may be different from the stepped shape CS of the selected side. . The stepped shape CS of the first to fourth adhesives 20, 90, 100, and 110 and the remaining sides of the semiconductor chips 25, 95, 105, and 115 may provide a filling aid 60 according to embodiments. Can be formed.

Alternatively, only the second semiconductor chip 95 of the second to fourth semiconductor chips 95, 105, and 115 may have inclined edges. Filler 130 on substrate 10 and first through fourth semiconductor chips 25, 95, 105, and 115 to cover at least one connection pad 120 and at least one connection wiring 125 of FIG. 5. ) May be formed as shown in FIG. 8. The filler 130 may include resins and fillers. Diameters of the fillers of the filler 130 may have a larger size than the thickness T2 of the first adhesive 20 and the semiconductor chip 25.

The filler 130 may sufficiently fill the cave C located on the remaining side of the first to fourth semiconductor chips 25, 95, 105, and 115 through the filling assistant 60 without voids. . Because the fillers of the filler 130 shield the cave C due to the inclined edge of the second semiconductor chip 95 between the first and second adhesives 20 and 90 and the semiconductor chips 25 and 95. This is because it is difficult to do. In addition, the filler 130 may apply pressure to the fillers to sufficiently fill the cave C under the influence of gravity due to the filling aid 60 compared to FIG. 5.

The first to fourth adhesives 20, 90, 100, and 110 and the semiconductor chips 25, 95, 105, and 115 are not inclined toward the substrate 10 because of the filling assistant 60, and thus the first to fourth adhesives 20, 90, 100, 110 do not tilt toward the substrate 10. Can be leveled relative to the Through this, the filler 130 is the substrate 10, the filling aid 60, the first to fourth adhesives (20, 90, 100, 110) and the semiconductor chips (25, 95, 105, 115), In addition, the semiconductor package 140 according to the exemplary embodiments may be configured as shown in FIG. 8 together with the at least one connection wiring 125.

9 is a cross-sectional view illustrating a method of forming a semiconductor package in accordance with embodiments, taken along cut line II ′ of FIG. 1. 9 will use the same reference numerals for the same members as in FIGS. 3 to 5.

Referring to FIG. 9, in accordance with embodiments, the substrate 10 may be prepared. The process steps of FIGS. 3 to 5 may be applied without forming the filling aids 30, 40, or 50 of FIGS. 3, 6, or 7 on the substrate 10. In this case, the first to fourth adhesives 20, 90, 100, and 110 and the semiconductor chips 25, 95, 105, and 115 of FIG. 5 have at least one base pad 15 at the selected side of both sides. ) May be exposed as shown in FIG. 9. Preliminary through holes 74 may be formed in the second to fourth semiconductor chips 95, 105, and 115, respectively, as shown in FIG. 9.

The preliminary through holes 74 may be formed on the other side of both sides of the second to fourth semiconductor chips 95, 105, and 115. Second to fourth adhesives 90, 100 and 110 of FIG. 5 may be formed under the second to fourth semiconductor chips 95, 105 and 115, respectively. The second to fourth adhesives 90, 100, and 110 may be formed around the preliminary through holes 74 of the second to fourth semiconductor chips 95, 105, and 115, as shown in FIG. 9. . The second to fourth adhesives 90, 100 and 110 and the semiconductor chips 95, 105 and 115 are formed on the first adhesive 20 and the semiconductor chip 25 of FIG. 5 while aligning the preliminary through holes 74. Can be formed in turn.

The second to fourth adhesives 90, 100, and 110 and the semiconductor chips 95, 105, and 115 may have a through hole 78 passing through the preliminary through holes 74 as shown in FIG. 9. The diameter D of the through hole may have a larger size than the thickness T2 of the first adhesive 20 and the semiconductor chip 25. The opening cross-sectional surface of the through hole 78 has a thick line at the remaining sides of the first to fourth adhesives 20, 90, 100, and 110 and the semiconductor chips 25, 95, 105, and 115. Accordingly, it may be included in the staircase shape CS as shown in FIG. 9.

The stepped shape CS of the remaining sides of the first to fourth adhesives 20, 90, 100, and 110 and the semiconductor chips 25, 95, 105, and 115 may be different from the stepped shape CS of the selected side. . The stepped shape CS of the first to fourth adhesives 20, 90, 100, and 110 and the remaining sides of the semiconductor chips 25, 95, 105, and 115 may provide a filling aid 70 according to embodiments. Can be formed. Alternatively, preliminary through holes 74 may be formed in the second adhesive and the semiconductor chips 90 and 95 at the same time.

Preliminary through holes 74 may be formed in the third adhesive and the semiconductor chips 100 and 105 at the same time. A preliminary through hole 74 may be formed in the fourth adhesive agent and the semiconductor chips 110 and 115 at the same time. Filler 130 on substrate 10 and first through fourth semiconductor chips 25, 95, 105, and 115 to cover at least one connection pad 120 and at least one connection wiring 125 of FIG. 5. ) May be formed as shown in FIG. 9. The filler 130 may include resins and fillers.

Diameters of the fillers of the filler 130 may have a larger size than the thickness T2 of the first adhesive 20 and the semiconductor chip 25. The filler 130 may sufficiently fill the cave C located at the remaining side of the first to fourth semiconductor chips 25, 95, 105, and 115 through the filling assistant 70 without voids. . Because the filler 130 of the filler 130 shields between the first and second adhesives 20 and 90 and the semiconductor chips 25 and 95, the filler 130 may have a cave C and a through hole. It is because it fills under step shape CS through 78.

The filler 130 may fill between the first and second adhesives 20 and 90 and the semiconductor chips 25 and 95 along the arrow F of the through hole 98. The first to fourth adhesives 20, 90, 100, and 110 and the semiconductor chips 25, 95, 105, and 115 are not inclined toward the substrate 10 because of the filling assistant 70. Can be leveled relative to the Through this, the filler 130 is the substrate 10, the filling assistant 70, the first to fourth adhesives (20, 90, 100, 110) and the semiconductor chips (25, 95, 105, 115), In addition, the semiconductor package 140 according to the embodiments may be configured as shown in FIG. 9 together with the at least one connection wiring 125.

FIG. 10 is a cross-sectional view illustrating a method of forming a semiconductor package in accordance with embodiments, taken along cut line II ′ of FIG. 1. 10 uses the same reference numerals for the same members as in FIGS. 3 to 5.

Referring to FIG. 10, according to embodiments, the substrate 10 may be prepared. The substrate 10 may include at least one base pad 15. The filling aid 80 may be formed on the substrate 10. The filling aid 80 may expose at least one base pad 15 through a selected side of both sides. The top surface of the filling assistant 80 may be inclined at a predetermined angle θ2 with respect to the top surface of the substrate 10. The filling aid 80 may have a tapered shape toward the selected side from the remaining sides of both sides.

The first adhesive and the semiconductor chips 20 and 25 may be formed on the filling assistant 80. The filling aid 80 may include silicon or a material other than silicon. The process steps of FIGS. 3 to 5 may be applied without forming the filling aids 30, 40, or 50 of FIGS. 3, 6, or 7 on the first semiconductor chip 25. In this case, the first to fourth adhesives 20, 90, 100, and 110 and the semiconductor chips 25, 95, 105, and 115 of FIG. 5 do not slide off from the fill assistant 80. ) Can be fixed. The height H between the top surface of the substrate 10 and the top surface of the first semiconductor chip 25 may be the first to fourth adhesives 20, 90, 100, and 110 and the semiconductor chips 25, 95, 105, and 115. 5 may be further increased compared to FIG. 5 because of the tapered shape of the fill aid 80 at the selected side of the < RTI ID = 0.0 >

Alternatively, the filling aid 80 may have a shape different from the tapered shape. For example, the filling assistant 80 may have substantially the same thickness from the top surface of the substrate 10. At least one connection wiring 125 may be formed on at least one base pad 15 and at least one connection pad 120 of FIG. 5, as shown in FIG. 10. Since the first to fourth adhesives 20, 90, 100, and 110 and the semiconductor chips 25, 95, 105, and 115 are stably fixed to the filling aid 80, the at least one connection wiring The 125 may stably contact the at least one base pad 15 and the at least one connection pad 120.

Filler 130 on substrate 10 and first through fourth semiconductor chips 25, 95, 105, and 115 to cover at least one connection pad 120 and at least one connection wiring 125 of FIG. 5. ) May be formed as shown in FIG. 10. The filler 130 may include resins and fillers. Diameters of the fillers of the filler 130 may have a larger size than the thickness T2 of the first adhesive 20 and the semiconductor chip 25. The filler 130 may sufficiently fill the cave C located on the remaining side of the first to fourth semiconductor chips 25, 95, 105, and 115 through the filling assistant 80 without voids. .

This is because the diameters of the fillers of the filler 130 are smaller than the height H between the top surface of the substrate 10 and the top surface of the first semiconductor chip 25. The fillers of the filler body 130 do not shield between the first and second adhesives 20 and 90 and the semiconductor chips 25 and 95. Therefore, the filler 130 may sufficiently fill below the step shape CS through the cave C. Through this, the filler 130 is the substrate 10, the filling assistant 80, the first to fourth adhesives (20, 90, 100, 110) and the semiconductor chips (25, 95, 105, 115), The semiconductor package 140 according to the embodiments may be configured as shown in FIG. 10 together with the at least one connection wiring 125.

FIG. 11 is a plan view illustrating a mobile phone including the semiconductor package of FIG. 1.

Referring to FIG. 11, a mobile phone 190 according to embodiments includes a driving unit and a memory card 180. The drive device includes a camera module 153, a memory system 156, and an electronic device. Seed. LCD module 159, al. An RF module 173, a baseband module 176, and a multimedia module 179 may be provided. The camera module 153 includes a lens, a CMOS, and a CMOS. Seed. CMOS & CCD Imager and Camera Dee. s. It may have a camera DSP.

The memory system 156 may have a non-memory element and / or a memory element to perform a storage device-related storage function. The L.C.D.module 159 is L.C. Seed. Dee panel, L. Seed. Dee drivers and L. Seed. It may have a controller and a gray scale IC. I know. F module 173 is known. F elements, power amplifier, eye. F / Al. May have an IF / RF. The base band module 176 may have an application specific integrated circuit (ASIC) and a central processing unit (CPU).

The multimedia module 179 is M. Bloody. this. It may have G4 (MPEG4) and Bluetooth. The memory card 180 may be electrically connected to a camera module 153, a memory system 156, and an LCD module 159 through a common line 160. . The memory card 180 may be electrically connected to the RF module 173, the baseband module 176, and the multimedia module 179 through the common line 160. Can be.

The memory card 180 may include the semiconductor package 140 of FIGS. 5, 6, 7, 8, 9 or 10. The semiconductor package 140 does not have a void of the filler 130 around the first to fourth adhesives 20, 90, 100, and 110 and the semiconductor chips 25, 95, 105, and 115. Thus, the first to fourth adhesives 20, 90, 100, and 110 and the semiconductor chips 25, 95, 105, and 115 are not inclined with respect to the substrate 10. Through this, the semiconductor package 140 may provide a desired storage capacity of data to the memory card 180.

1 is a plan view illustrating a semiconductor package according to example embodiments.

FIG. 2 is a cross-sectional view of the semiconductor package taken along the cutting line II ′ of FIG. 1.

3 to 5 are cross-sectional views illustrating a method of forming a semiconductor package according to embodiments, taken along the cut line II ′ of FIG. 1.

FIG. 6 is a cross-sectional view illustrating a method of forming a semiconductor package in accordance with embodiments, taken along cut line II ′ of FIG. 1.

FIG. 7 is a cross-sectional view illustrating a method of forming a semiconductor package in accordance with embodiments, taken along cut line II ′ in FIG. 1.

8 is a cross-sectional view illustrating a method of forming a semiconductor package in accordance with embodiments, taken along cut line II ′ of FIG. 1.

9 is a cross-sectional view illustrating a method of forming a semiconductor package in accordance with embodiments, taken along cut line II ′ of FIG. 1.

FIG. 10 is a cross-sectional view illustrating a method of forming a semiconductor package in accordance with embodiments, taken along cut line II ′ of FIG. 1.

FIG. 11 is a plan view illustrating a mobile phone including the semiconductor package of FIG. 1.

Claims (10)

Board; Semiconductor chips stacked on the substrate in turn, each having stepped shapes on both sides, and defining a cave with the substrate at a selected one of the sides; At least one connection wire positioned on the other side of the both sides of the semiconductor chips to electrically connect the substrate and the semiconductor chips; And And a filling aid disposed around the remaining side of the semiconductor chips. The method of claim 1, Wherein the stepped shapes have one of substantially the same trajectory and another trajectory at a selected level. The method of claim 2, The stepped shapes expose semiconductor surfaces facing each other between the semiconductor chips. The method of claim 3, wherein And the filling aid is positioned at the selected side to partially fill the cave. The method of claim 3, wherein And the filling aid is positioned at the selected side to sufficiently fill the cave. The method of claim 3, wherein And the filling aid has a stepped shape at least one of the selected semiconductor chips spaced from the substrate while being formed in a step shape of the selected side. The method of claim 3, wherein And the filling aid has an opening cross section of a hole passing through the selected semiconductor chips spaced apart from the substrate while being formed in a step shape of the selected side. The method of claim 3, wherein And the filling aid is positioned under the semiconductor chips and has substantially the same thickness. The method of claim 3, wherein The filling aid is positioned below the semiconductor chips and has a tapered shape from the selected side of both sides toward the remaining side. The method of claim 3, wherein And a filler covering the substrate, the semiconductor chips, the filling assistant, and the at least one connection wiring.

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