KR20110036209A - Liquid crystal display and local dimming control method thereof - Google Patents

Abstract

PURPOSE: An LCD(Liquid Crystal Display) device and a local dimming control method thereof are provided to prevent the image quality of the LCD device from being lowered by differently controlling a minimum dimming value depending on an image mode. CONSTITUTION: An LCD(Liquid Crystal Display) device comprises: a liquid crystal panel(10) which includes liquid crystal cells arranged in matrix format and has data lines(14) crossing gate lines(15); a backlight unit which emits light onto the liquid crystal panel; a mode signal generating unit which generates a mode signal for identifying each mode by classifying an input image in at least two modes; a local dimming control unit which controls the backlight luminance of a first mode image and generates a dimming signal for controlling the backlight luminance of a second mode image; and a light source driving unit which individually controls the light sources of the backlight unit individually in correspondence to the dimming signal.

Description

Liquid crystal display and local dimming control method {LIQUID CRYSTAL DISPLAY AND LOCAL DIMMING CONTROL METHOD THEREOF}

The present invention relates to a liquid crystal display and a local dimming control method thereof.

BACKGROUND ART Liquid crystal display devices have tended to be gradually widened due to their light weight, thinness, and low power consumption. The liquid crystal display device is used as a portable computer such as a notebook PC, office automation equipment, audio / video equipment, indoor and outdoor advertising display devices, and the like. The transmissive liquid crystal display device, which occupies most of the liquid crystal display device, displays an image by controlling an electric field applied to the liquid crystal layer to modulate the light incident from the backlight unit.

The image quality of the liquid crystal display device depends on the contrast characteristics. Only the method of modulating the light transmittance of the liquid crystal layer by controlling the data voltage applied to the liquid crystal layer of the liquid crystal display panel has a limitation in improving the contrast characteristic. In order to improve the contrast characteristic, a backlight dimming control method for adjusting the brightness of the backlight unit in accordance with an image has been developed to dramatically improve the contrast characteristic. The backlight dimming control method may reduce power consumption by adaptively adjusting the brightness of the backlight unit according to the input image. The backlight dimming method includes a global dimming method for adjusting the luminance of the entire display surface and a local dimming method for locally adjusting the luminance of the display surface. The global dimming method may improve dynamic contrast measured between the previous frame and the next frame. The local dimming method locally improves the brightness of the display surface within one frame period, thereby improving static contrast, which is difficult to improve with the global dimming method.

Conventional local dimming methods increase the backlight brightness in the dark areas of the image to increase the contrast of the image. However, in the conventional local dimming method, if the backlight brightness of the background portion is darkened and the backlight brightness of the white ball is brightened in the input image in which a small data is displayed on a dark background, the white ball appears dark or even almost invisible. do. This phenomenon appears more severe as the dark part of the screen is darkened to maximize the contrast effect. This is because the backlight unit cannot raise the brightness of the bright part sufficiently when only part of the screen is bright and most of the screen is dark.

Accordingly, an object of the present invention is to provide a liquid crystal display and a local dimming control method for preventing the deterioration of image quality during local dimming.

In order to achieve the above object, the liquid crystal display device of the present invention includes a liquid crystal display panel including liquid crystal cells in which data lines and gate lines intersect and are arranged in a matrix form; A backlight unit radiating light onto the liquid crystal display panel; A mode signal generator for dividing the input image into at least two modes and generating a mode signal for identifying each mode; A dimming signal for determining a mode of the input image according to the mode signal to control the backlight luminance of the image of the first mode to the first dimming curve and to control the backlight luminance of the image of the second mode to the second dimming curve A generated local dimming control unit; And a light source driver for individually driving light sources of the backlight unit in a local dimming form in response to the dimming signal.

Local dimming control method of the liquid crystal display of the present invention comprises the steps of generating a mode signal for identifying each mode by dividing the input image into at least two modes; Generating a dimming signal for controlling a backlight luminance of an image of a first mode to a first dimming curve and controlling a backlight luminance of an image of a second mode to a second dimming curve in response to the mode signal; And individually driving light sources of the backlight unit in a local dimming form in response to the dimming signal.

The lowest dimming value of the first dimming curve and the second dimming curve are different from each other.

The present invention can prevent the deterioration of image quality at the time of local dimming by controlling the lowest dimming value of local dimming differently according to the image mode.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Like numbers refer to like elements throughout. In the following description, when it is determined that a detailed description of known functions or configurations related to the present invention may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 1 to 10.

1 to 3, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal display panel 10, a source driver 12 for driving data lines 14 of the liquid crystal display panel 10, Data is stored in the timing controller 11 and the timing controller 11 that control the gate driver 13, the source driver 12, and the gate driver 13 to drive the gate lines 15 of the liquid crystal display panel 10. A system board 20 for supplying an RGB and a mode signal MODE, a backlight unit 18 for irradiating light to the liquid crystal display panel 10, and a light source driver 17.

In the liquid crystal display panel 10, a liquid crystal layer is formed between two glass substrates. A plurality of data lines 14 and a plurality of gate lines 15 intersect the lower glass substrate of the liquid crystal display panel 10. As shown in FIG. 2, the liquid crystal cells Clc are arranged in a matrix form in the liquid crystal display panel 10 due to the cross structure of the data lines 14 and the gate lines 15. The lower glass substrate of the liquid crystal display panel 10 includes data lines 14, gate lines 15, a thin film transistor TFT, a pixel electrode of a liquid crystal cell Clc connected to the thin film transistor TFT, and storage. A capacitor Cst or the like is formed.

A black matrix, a color filter, and a common electrode are formed on the upper glass substrate of the liquid crystal display panel 10. The common electrode is formed on the upper glass substrate in a vertical electric field driving method such as twisted nematic (TN) mode and vertical alignment (VA) mode, and a horizontal electric field such as IPS (In Plane Switching) mode and FFS (Fringe Field Switching) mode. The driving method is formed on the lower glass substrate together with the pixel electrode. A polarizing plate is attached to each of the upper glass substrate and the lower glass substrate of the liquid crystal display panel 10, and an alignment layer for setting a pretilt angle of the liquid crystal is formed on an inner surface of the liquid crystal display panel 10 in contact with the liquid crystal.

The source driver 12 includes a plurality of source drive ICs. The source driver 12 latches the digital video data RGB under the control of the timing controller 11. The source driver 12 converts the digital video data RGB into the positive / negative analog data voltage using the positive / negative gamma compensation voltage and supplies the converted data to the data lines 14.

The gate driver 13 includes a plurality of gate drive ICs. The gate driver 13 includes a shift register, a level shifter for converting an output signal of the shift register into a swing width suitable for driving a TFT of a liquid crystal cell, an output buffer, and the like. The gate driver 13 is composed of a plurality of gate drive integrated circuits and sequentially outputs gate pulses (or scan pulses) having a pulse width of approximately one horizontal period and supplies them to the gate lines 15.

The timing controller 11 receives digital video data (RGB) and timing signals (Vsync, Hsync, DE) from the system board 20 through an interface such as a low voltage differential signaling (LVDS) interface and a transition minimized differential signaling (TMDS) interface. , DCLK). The timing signals Vsync, Hsync, DE, and DCLK include a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal DE, a dot clock signal DCLK, and the like. The timing controller 11 may include timing control signals DDC, for controlling an operation timing of the source driver 12 and the gate driver 13 based on timing signals Vsync, Hsync, DE, and DCLK from the system board. GDC).

The data timing control signal DDC includes a source start pulse (SSP), a source sampling clock (SSC), a source output enable signal (SOE), a polarity control signal (Polarity, POL) and the like. The source start pulse SSP controls a data sampling start time of the source driver 12. The source sampling clock SSC is a clock signal that controls the sampling operation of data in the source driver 12 based on the rising or falling edge. If the signal transmission system between the timing controller 11 and the source driver 12 is a mini LVDS interface, the source start pulse SSP and the source sampling clock SSC may be omitted. The polarity control signal POL inverts the polarity of the data voltage output from the source driver 12 at a period of N (N is a positive integer) horizontal period. The source output enable signal SOE controls the output timing of the source driver 12. The system board 20 or the timing controller 11 inserts an interpolation frame between frames of an input video signal input at a frame frequency of 60 Hz and converts the frame frequency to 60 × N (N is a positive integer of 2 or more) Hz. can do.

The gate timing control signal includes a gate start pulse (GSP), a gate shift clock (GSC), a gate output enable signal (GOE), and the like. The gate start pulse GSP controls the timing of the first gate pulse. The gate shift clock GSC is a clock signal for shifting the gate start pulse GSP. The gate output enable signal GOE controls the output timing of the gate driver 13.

The timing controller 11 maps the input image to the virtual blocks and analyzes the correlation between the image data and the backlight for each block. The timing controller 11 outputs a dimming signal DIM of the backlight unit 18 for local dimming and compensates data for each block according to the degree of correlation between the image data and the backlight.

The system board 20 receives video data from a broadcast signal or an image source input from an external device, including a broadcast signal receiving circuit, an external device interface circuit, a graphic processing circuit, and the like, and converts the video data into a digital signal to control the timing. It supplies to (11). The system board 20 supplies timing signals, such as a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal Data Enable, and a dot clock signal DCLK, to the timing controller 11. Then, the timing controller 11 supplies a mode signal MODE indicating the attribute of the video.

The system board 20 may determine the input image according to the external device interface path. For example, the mode signal generator of the system board 20 determines an image input through a TV tuner, a set-top box, a home theater system, or the like as a normal mode image, and then records a CD player or a DVD. An image input through a player, a Blu-ray player, or the like may be determined as a movie mode image. The mode signal generator of the system board 20 may determine an image input through a personal computer (PC), a notebook computer, or the like as a PC mode image. The mode signal output from the system board 20 has different logic values according to the image property determination result. For example, the mode signal MODE may be generated as '00' in the normal image mode, '01' in the movie mode, and '11' in the PC mode.

The backlight unit may be implemented as a direct type backlight unit or an edge type backlight unit. The direct type backlight unit has a structure in which a plurality of optical sheets and a diffusion plate are stacked below the liquid crystal display panel and a plurality of light sources 16 are disposed below the diffusion plate. In the direct type backlight unit, a plurality of light sources may be disposed under the diffuser plate, and local dimming may be performed by individually controlling the light sources. The edge type backlight unit has a structure in which a light source is disposed to face the side of the light guide plate, and a plurality of optical sheets are disposed between the liquid crystal display panel and the light guide plate. The optical sheets may include at least one prism sheet and at least one diffusion sheet to diffuse light incident from the diffusion plate and to deflect the traveling path of the light at an angle substantially perpendicular to the light incident surface of the liquid crystal display panel. The optical sheets may comprise a dual brightness enhancement film (DBEF). Local dimmable edge type backlight unit is Korean Patent Application No. 10-2009-0028154 (2009.04.01), and Korea Patent Application No. 10-2009-0028162 (2009.04.01) , Republic of Korea Patent Application No. 10-2009-0028160 (2009.04.01), Republic of Korea Patent Application No. 10-2009-0028156 (2009.04.01), Republic of Korea Patent Application No. 10-2009-0028158 (2009.04.01), Republic of Korea Patent Application No. 10-2009-0082899 (2009.09.03) and the like.

The light sources 16 of the backlight unit 18 include a plurality of point light sources, such as a light emitting diode (LED). The light source driver 17 individually adjusts a current applied to each of the point light sources in response to the dimming signal DIM from the timing controller 11.

3 is a block diagram illustrating a local dimming control unit of the timing controller 11.

Referring to FIG. 3, the timing controller 11 includes an image analyzer 31, a data compensator 33, a backlight controller 34, and a memory 32.

The image analyzer 31 maps the input image to virtually divided blocks as shown in FIG. 5, calculates a histogram for each block, that is, a cumulative distribution for each gray level of the input image, and determines a representative value for each block. The representative value for each block may be selected as one of an average value and a mode value of the histogram for each block. The image analyzer 31 supplies the block-specific representative value and the mode signal MODE together with the digital video data to the data compensator 33. In addition, the image analyzer 31 supplies the dimming curve data, the representative value for each block, the mode signal MODE, and the backlight controller 34.

The data compensator 33 compensates the data by increasing the gradation value of the data of the block having a relatively high representative value for each block, compared to the other representative values for each block. The data compensator 33 may compensate for the data using a lookup table that outputs preset compensation data using the block value of each block and the digital video data of the input image as an input address. The data compensation unit 33 may vary the data compensation width for each mode of the normal mode, the movie mode, and the PC mode according to the mode signal MODE.

The backlight controller 34 stores the dimming curve data for each mode input through the image analyzer 31 in advance, and based on the dimming curve data for each mode, the block representative is relatively lower than the other block representative values. A dimming signal DIM having a dimming value for lowering the backlight luminance of the block having the value is output. The backlight controller 34 may output a dimming signal DIM by using a lookup table in which dimming curve data for each mode are stored and a dimming value is output using a mode signal and a representative value for each block as an input address. The backlight controller 34 applies the lowest dimming value of the backlight differently for each mode. For example, the backlight controller 34 controls the backlight minimum dimming value of the PC mode to be smaller than the normal mode and the movie mode, and controls the backlight minimum dimming value of the general mode to be higher than the movie mode and lower than the PC mode. This is to increase the brightness of the background part in PC mode data with many dark backgrounds and many still images, to prevent deterioration in image quality in a specific pattern when local dimming, and to maximize the contrast effect in the movie mode. The backlight controller 34 controls the lowest backlight dimming value to a value between the movie mode and the PC mode in order to increase the contrast effect and reduce the luminance deterioration in the normal mode.

The memory 32 stores dimming curve data in the normal mode, dimming curve data in the movie mode, and dimming curve data in the PC mode, and selects any one of the dimming curve data for each mode according to the mode signal MODE to analyze the image. It supplies to the part 31. The memory 32 may be selected as an EEPROM (Electrically Erasable PROM). The user may input gamma data for each mode into the memory 32 from the outside through the ROM writer and I ² C communication to adjust the gamma data for each mode.

The backlight controller 34 of the timing controller 11 supplies a dimming signal DIM to the light source driver 17 through a SPI (Serial Peripheral Interface) to identify each block. The light source driver 17 individually drives the point light sources in units of blocks by PWM (Pulse Width Modulation) in response to the dimming signal DIM to individually adjust the luminance of each of the blocks according to the input image. This driving method is because the number of pins of the timing controller is smaller than the number of blocks. That is, the timing controller 11 outputs the dimming signal DIM in series through the SPI, and the light source driver 17 classifies and controls the point light sources of each block according to the block identification code of the SPI.

The image analyzer 31, the data compensator 33, the backlight controller 34, and the memory 32 may be embedded in the timing controller chip, and at least one of them may be separate from the timing controller 11. The chip may be configured to be connected to the timing controller 11.

4 is a diagram illustrating an example of an input image. 5 is a diagram illustrating an example of virtual blocks to which an input image is mapped. FIG. 6 is a diagram illustrating backlight luminance when local dimming is performed on the input image of FIG. 3. The timing controller 11 maps the input image to the virtual blocks as shown in FIG. 4, analyzes the input image and the backlight correlation for each block, and increases the backlight luminance of the B34 block and corresponds to a dark background as shown in FIG. 6. And outputs a dimming signal DIM for darkening backlight brightness of other blocks. FIG. 7 shows actual measured images showing the input image sample and the backlight luminance according to local dimming accordingly.

8 is a graph illustrating an example of a dimming curve for controlling backlight luminance in a normal mode. 9 is a graph illustrating an example of a dimming curve for controlling the backlight luminance in the movie mode. 10 is a graph illustrating an example of a dimming curve for controlling backlight luminance in the PC mode. 8 to 10, the horizontal axis represents a gray value (or a representative value for each block) of the input image, and the vertical axis represents a backlight dimming value (%).

When the backlight maximum brightness is 100%, the backlight dimming value range of the normal mode is 30% to 100% as shown in FIG. In contrast, the backlight dimming value range of the movie mode may be 5% to 100% as shown in FIG. 9, and the backlight dimming value range of the PC mode may be set to 50% to 100% as shown in FIG. 10. If the representative value for each block in the background portion marked black in FIG. 6 is the lowest, the luminance is controlled to the lowest dimming value. The lowest backlight dimming value is the highest in the PC mode and the lowest in the movie mode as shown in FIGS. 8 to 10. The backlight dimming range is highest in movie mode and narrowest in PC mode. Within the range that satisfies such conditions, the backlight dimming value may be changed according to a model change, a driving method, or the like of the liquid crystal display panel 10.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

1 is a block diagram illustrating a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 2 is an equivalent circuit diagram of a part of a pixel array of the liquid crystal display panel illustrated in FIG. 1.

FIG. 3 is a block diagram illustrating a local dimming control unit of the timing controller shown in FIG. 1.

4 is a diagram illustrating an example of an input image.

5 is a diagram illustrating an example of virtual blocks to which an input image is mapped.

FIG. 6 is a diagram illustrating backlight luminance when local dimming is performed on the input image of FIG. 3.

FIG. 7 shows actual measured images showing the input image sample and the backlight luminance according to local dimming accordingly.

8 is a graph illustrating an example of a dimming curve for controlling backlight luminance in a normal mode.

9 is a graph illustrating an example of a dimming curve for controlling the backlight luminance in the movie mode.

10 is a graph illustrating an example of a dimming curve for controlling backlight luminance in the PC mode.

<Description of Symbols for Main Parts of Drawings>

31: video analysis unit 32: memory

33: data compensation unit 34: backlight control unit

Claims (10)

A liquid crystal display panel including liquid crystal cells intersecting data lines and gate lines and arranged in a matrix; A backlight unit radiating light onto the liquid crystal display panel; A mode signal generator for dividing the input image into at least two modes and generating a mode signal for identifying each mode; A dimming signal for determining a mode of the input image according to the mode signal to control the backlight luminance of the image of the first mode to the first dimming curve and to control the backlight luminance of the image of the second mode to the second dimming curve A generated local dimming control unit; And A light source driver for individually driving light sources of the backlight unit in a local dimming form in response to the dimming signal, And a lowest dimming value of the first dimming curve and the second dimming curve is different from each other. The method of claim 1, The mode signal generator, The input image is divided into an image of the first mode, an image of the second mode, and an image of a third mode. And the mode signal is generated with different logic values in the image of the first mode, the image of the second mode, and the image of the third mode. The method of claim 2, The local dimming control unit, The backlight brightness of the third mode image is controlled by a third dimming curve using the dimming signal, And the lowest dimming value of each of the third dimming curves is different from the lowest dimming value of each of the first dimming curve and the second dimming curve. The method of claim 3, wherein The image of the first mode includes a PC image input from a computer, the second mode includes a movie image, the image of the third mode includes the image other than the PC image and the movie image, And the lowest dimming value of the first dimming curve is higher than the lowest dimming values of the second and third dimming curves. The method of claim 4, wherein The lowest dimming value of the second dimming curve is lower than the lowest dimming value of the first and third dimming curves, and the lowest dimming value of the third dimming curve is lower than the lowest dimming value of the first dimming curve and the second dimming value. Higher than the lowest dimming value of the curve, And the highest dimming values of the first to third dimming curves are the same. A liquid crystal display panel including liquid crystal cells in which data lines and gate lines intersect and arranged in a matrix form, and a backlight unit for irradiating light to the liquid crystal display panel, comprising: Generating a mode signal for identifying each mode by dividing the input image into at least two modes; Generating a dimming signal for controlling a backlight luminance of an image of a first mode to a first dimming curve and controlling a backlight luminance of an image of a second mode to a second dimming curve in response to the mode signal; And Individually driving light sources of the backlight unit in a local dimming form in response to the dimming signal, And a lowest dimming value of the first dimming curve and the second dimming curve is different from each other. The method of claim 6, Generating the mode signal, The input image is divided into an image of the first mode, an image of the second mode, and an image of a third mode. And the mode signal is generated with different logic values in the image of the first mode, the image of the second mode, and the image of the third mode. The method of claim 7, wherein Generating the dimming signal, The backlight brightness of the third mode image is controlled by a third dimming curve using the dimming signal, And the lowest dimming value of each of the third dimming curves is different from the lowest dimming value of each of the first dimming curve and the second dimming curve. The method of claim 8, The image of the first mode includes a PC image input from a computer, the second mode includes a movie image, the image of the third mode includes the image other than the PC image and the movie image, The lowest dimming value of the first dimming curve is higher than the lowest dimming values of the second and third dimming curves. The method of claim 9, The lowest dimming value of the second dimming curve is lower than the lowest dimming value of the first and third dimming curves, and the lowest dimming value of the third dimming curve is lower than the lowest dimming value of the first dimming curve and the second dimming value. Higher than the lowest dimming value of the curve, And the highest dimming values of the first to third dimming curves are the same.

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