KR20110027997A - Semiconductor light emitting device wafer and method for fabricating semiconductor light emitting device using the same - Google Patents

Abstract

PURPOSE: A semiconductor light emitting device wafer and a method for fabricating a semiconductor light emitting device using the same are provided to separate and grow individual semiconductor light emitting devices including semiconductor layers by a partition line and a material layer, thereby increasing thickness uniformity of each semiconductor light emitting device. CONSTITUTION: A partition line(13) is formed on a substrate(11). Closed areas(15) are formed by the partition line. A semiconductor layer comprises an active layer where light is generated by recombination of electrons and holes. A material layer forms the circumference of a closed area. The material layer is formed of a material whose lattice constant is different from the semiconductor layer.

Description

Semiconductor light emitting device wafer and manufacturing method of semiconductor light emitting device using same {SEMICONDUCTOR LIGHT EMITTING DEVICE WAFER AND METHOD FOR FABRICATING SEMICONDUCTOR LIGHT EMITTING DEVICE USING THE SAME}

The present disclosure relates to a semiconductor light emitting device wafer and a method of manufacturing a semiconductor light emitting device using the same as a whole, and in particular, a semiconductor light emitting device wafer having a reduced warpage phenomenon generated during fabrication of a semiconductor light emitting device wafer and a semiconductor light emitting device using the same. It relates to a method for manufacturing a device.

Here, the semiconductor light emitting device refers to a semiconductor optical device that generates light through recombination of electrons and holes, for example, a group III nitride semiconductor light emitting device. The group III nitride semiconductor consists of a compound of Al (x) Ga (y) In (1-x-y) N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1). In addition, GaAs type semiconductor light emitting elements used for red light emission, etc. are mentioned.

This section provides background informaton related to the present disclosure which is not necessarily prior art.

In general, Group III nitride semiconductors are excellent in thermal stability and have a direct transition type energy band structure, which has attracted much attention as a material for light emitting devices in the blue and ultraviolet regions. In particular, the group III nitride semiconductor light emitting device is used in various applications such as a large-screen natural color flat panel display, a signal lamp, an indoor light, a high density light source, a high resolution output system, and an optical communication.

However, group III nitride semiconductors are difficult to fabricate homogeneous substrates capable of growing them, and are grown through a process such as metal organic chemical vapor deposition (MOCVD) on hetero substrates having a similar crystal structure. As a heterogeneous substrate, a sapphire (Al ₂ O ₃ ) substrate having a hexagonal structure is mainly used.

However, in the growth of a group III nitride semiconductor layer on a heterogeneous substrate, the substrate is warped due to the stress generated by the difference in the lattice structure between the substrate and the group III nitride semiconductor layer. As the thickness increases due to continuous growth, the warpage of the substrate gradually increases, and the thickness uniformity of the group III nitride semiconductor layer becomes worse.

Furthermore, there is a problem that the luminous efficiency of the group III nitride semiconductor light emitting device is lowered and the process yield is reduced.

In order to solve this problem, in order to increase the luminous efficiency by reducing the warpage of the substrate in the growth of the group III nitride semiconductor layer on the substrate is being conducted.

In addition, as a method of manufacturing individual group III nitride semiconductor light emitting devices from a semiconductor light emitting device wafer in which a group III nitride semiconductor layer is grown on a substrate, i) a wafer is completely formed by rotating a disk blade having a diamond tip. It is common to cut or form a groove in a wafer and then cut by applying an external force, and ii) to cut by irradiating a laser, i.e., by i) the mechanical stability of the sapphire substrate, i.e. hexagonal lattice structure and high There is a problem in that cracks are generated on the cut surface due to Mohs hardness, or the Group III nitride semiconductor layer is separated from the substrate. In addition, in the case of ii), a group III nitride semiconductor light emitting device having a very good shape can be obtained as compared to i), but debris due to laser processing is deposited on the surface of the group III nitride light emitting device in which the debris is produced, thereby reducing the luminous efficiency. There is a problem.

In order to solve this problem, Japanese Patent Laid-Open No. 2004-31526 proposes a method of forming a protective film on the laser processing surface and cleaning the contaminants deposited on the protective film after the laser groove is formed. However, even by this, if the separation groove is formed by laser processing, there is a problem in that the luminescence efficiency is reduced by adhering a debris to the side of the separation groove.

This will be described later in the Specification for Implementation of the Invention.

SUMMARY OF THE INVENTION Herein, a general summary of the present disclosure is provided, which should not be construed as limiting the scope of the present disclosure. of its features).

According to one aspect of the present disclosure, a substrate; A partition line formed as a groove on the substrate; A plurality of closed regions formed by partition lines; A plurality of semiconductor layers grown in each closed region and including an active layer in which light is generated by recombination of electrons and holes; And a material layer formed on the partition line and preventing growth of the plurality of semiconductor layers.

According to another aspect of the present disclosure (According to one aspect of the present disclosure), the method comprises the steps of: forming a partition line such that a plurality of closed regions are formed on the substrate; Forming a material layer in the compartment line; Growing a plurality of semiconductor layers in a closed region; And separating a plurality of semiconductor layers grown in each closed region from the substrate, wherein the semiconductor light emitting device wafer comprises a semiconductor light emitting device wafer.

This will be described later in the Specification for Implementation of the Invention.

The present disclosure will now be described in detail with reference to the accompanying drawing (s).

1 is a view showing an example of a semiconductor light emitting device wafer according to the present disclosure, Figure 2 is a view showing a cross-sectional view of AA in Figure 1, Figure 3 is a photo of a semiconductor light emitting device wafer according to the present disclosure, semiconductor light emitting The device wafer 10 includes a plurality of semiconductor layers including a substrate 11, a partition line 13 formed as a groove, a closed region 15, a material layer 17, and an active layer 19b. 19).

The substrate 11 serves to provide a space in which the plurality of semiconductor layers 19 are grown, and the substrate formed of any one of sapphire (Al ₂ O ₃ ), silicon (Si), GaAs, and MgO materials or these substrates. And any one of GaN, InGaN, AlGaN, and AlInGaN may be provided on one of the substrates of the sapphire (Al ₂ O ₃ ) material.

Hereinafter, the sapphire (Al ₂ O ₃ ) material, which is relatively inexpensive in terms of cost but difficult to process due to relatively large warpage of the substrate 11 due to a plurality of semiconductor layers 19 and lattice constant mismatch and high physical stability. The substrate will be described as an example.

The partition line 13 is formed as a groove, is formed on a surface on which the plurality of semiconductor layers 19 are formed on both sides of the substrate 11, and forms a plurality of closed regions 15.

The closed area 15 is an area which is separated from other areas adjacent by the partition line 13, and a boundary is formed by the partition line 13.

The material layer 17 is formed around the enclosed area 15.

For example, it may be formed at the boundary between the groove forming the partition line 13 and the closed region 15. Alternatively, the material layer 17 may be formed in the groove, of course.

As a result, the plurality of semiconductor layers 19 grown inside the closed region 15 and the plurality of semiconductor layers 19 grown inside the closed region 15 are separated from each other.

In addition, the material layer 17 is formed of a material that prevents the plurality of semiconductor layers 19 from growing on the partition line 13.

For example, the material layer 17 may be formed of a material having a different lattice constant from the plurality of semiconductor layers 19. Specifically, the material layer 17 may include a silicon oxide film (SiO _x ), a silicon nitride film (SiN _x ), a magnesium oxide film (MgO _x ), tungsten (W), a chromium nitride film (CrN _x ), chromium (Cr), and hafnium ( Hf), molybdenum (Mo) may be formed of any one material.

Thereby, the plurality of semiconductor layers 19 can be grown independently for each closed region 15, as a result of which the substrate 11 and the plurality of semiconductor layers 19 in any closed region 15 can be grown. Since the stress generated due to the lattice constant difference is not transmitted to the adjacent closed region 15, the warpage phenomenon of the substrate 11 can be reduced.

The material layer 17 may be formed by a photolithography process after depositing a predetermined material on the entire surface of the substrate 11 on which the partition line 13 is formed.

The photolithography process refers to a process of applying a photoresist to the entire surface of the substrate 11 and exposing and developing the photomask using a photomask in which the partition line 13 is formed.

Here, when the photomask is exposed and developed with the photomask inclined with respect to the substrate 11, the width of the material layer 17 may be adjusted, whereby the width of the closed region 15 may be adjusted. As a result, the area of the closed region 15 can be adjusted.

If the plurality of semiconductor layers 19 are formed of a semiconductor having a different lattice constant from the substrate 11, and the plurality of semiconductor layers including the active layer 19b in which light is generated by recombination of electrons and holes, the present disclosure will be an example. Could be.

Hereinafter, a group III nitride semiconductor represented by Al (x) Ga (y) In (1-xy) N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1) will be described as an example. do.

4 is a graph comparing the degree of warpage of the substrate of the semiconductor light emitting device wafer and the conventional semiconductor light emitting device wafer according to the present disclosure. The substrate 11 is a sapphire substrate having a diameter of 2 inches, and a plurality of semiconductor layers are formed on the c plane. The rectangular symbol line represents a conventional semiconductor light emitting device wafer, and the circular symbol line represents the degree of warpage of the substrate 11 in the semiconductor light emitting device wafer 10 according to the present disclosure. Also, the line of the triangle symbol indicates the difference between the two.

Referring to FIG. 4, in both cases, the degree of warpage of the substrate 11 is the highest at the center of the substrate 11, and according to the semiconductor light emitting device wafer 10 according to the present disclosure, the substrate ( It can be seen that the bending degree of 11) is reduced by about 15um compared with the conventional one.

In the present disclosure, the diameter of the substrate 11 is preferably formed to be 3 inches or more.

The degree of warpage of the substrate 11 is generated by stress generated due to the lattice constant difference between the substrate 11 and the plurality of semiconductor layers 19, and occurs when the partition line 13 is not formed. The stress is transmitted to the surroundings to increase the degree of warpage of the substrate (11). The larger the diameter of the substrate 11, the greater the degree of warpage of the substrate.

Therefore, in the substrate 11 having a diameter of 3 inches or more, for example, 4 inches, 6 inches, 8 inches, or the like, the effect of reducing the degree of warpage of the substrate 11 can be further increased. .

Meanwhile, in the present disclosure, the closed region 15 may be formed in various shapes.

However, according to an experiment, in the process of growing a plurality of semiconductor layers 19 on the substrate 11, the growth rate in the direction (x) parallel to the flat zone 11a (flat zone) formed in the substrate 11 ( Vx) becomes larger than the growth rate Vy in the vertical direction y.

The flat zone 11a is a kind of mark formed on one side of the periphery of the substrate 11 to align the substrate 11 having the same surface index, and is formed by flatly cutting one side of the periphery of the substrate 11.

Accordingly, the plurality of semiconductor layers 19 are formed in the closed region 15 formed by the division lines 13 formed in directions x and parallel y, respectively, parallel to the flat zone 11a and arranged in a lattice shape. ), It is difficult to form a plurality of semiconductor layers 19 having a uniform thickness throughout the closed region 15.

5 is a view showing an example of the shape of the closed region in the present disclosure, it is preferable that the closed region 15 is formed in a lattice shape and disposed inclined with respect to the flat zone (11a).

According to the experiment, in this case, the influence by the difference between the growth rate Vx in the direction x parallel to the flat zone 11a and the growth rate Vy in the vertical direction y is reduced, thereby reducing the plurality of semiconductor layers. (19) has the advantage that it is stably grown throughout the closed region (15).

6 and 7 are diagrams illustrating a manufacturing process of a semiconductor light emitting device using a semiconductor light emitting device wafer according to the present disclosure, and includes a partition line forming step S10, a material layer forming step S20, and a semiconductor layer forming step S30. ).

In addition, the semiconductor layer separation step S40 may be further included.

The partition line forming step S10 is a step of forming the partition line 13 formed by the plurality of closed regions 15 on the substrate 11.

As described above, the substrate 11 is preferably formed of a sapphire material.

The partition line 13 is formed as a groove and may be formed by any one of a scribing process, a laser processing and an etching process.

As described above, the plurality of closed regions 15 may be formed in a lattice shape and disposed to be inclined with respect to the flat zone 11a formed on the substrate 11.

In the material layer forming step S20, the material layer 17 is formed in the partition line 13.

As described above, the material layer 17 may be formed by a photolithography process, and the material layer 17 may be formed of a material having a different lattice constant from the plurality of semiconductor layers 19, for example, silicon oxide (SiO _x ). , Silicon nitride (SiN _x ), magnesium oxide (MgO _x ), tungsten (W), chromium nitride (CrN _x ), chromium (Cr), hafnium (Hf), or molybdenum (Mo). have.

In the semiconductor layer forming step S30, the plurality of semiconductor layers 19 grown in the closed regions 15 adjacent to each other are formed to be separated from each other.

As described above, the plurality of semiconductor layers 19 include an active layer 19b. In addition, the plurality of semiconductor layers 19 may be formed of a group III nitride semiconductor.

In addition, the semiconductor layer forming step S30 may further include controlling the horizontal growth of the plurality of semiconductor layers 19 to adjust the areas of the plurality of semiconductor layers 19 (S31).

Control of horizontal growth can be achieved by controlling growth time, growth rate, and the like.

According to this, the area of the plurality of semiconductor layers 19 grown individually in the closed region 15 can be adjusted.

On the other hand, the semiconductor layer separation step S40 is a step of separating the plurality of semiconductor layers 19 formed in the respective closed regions 15 from the substrate 11.

The plurality of semiconductor layers 19 may be separated from the substrate 11 by a laser lift off (LLO) process.

In addition, before the semiconductor layer separation step S40, a step of forming a p-electrode on the top surfaces of the plurality of semiconductor layers 19 or a light emitting electrode together with the light transmissive electrode may be performed.

In addition, after the semiconductor layer separation step S40, an n-electrode may be formed on the bottom surfaces of the plurality of semiconductor layers 19.

Various embodiments of the present disclosure will be described below.

(One). The substrate is a semiconductor light emitting device wafer, characterized in that the diameter is 3 inches or more.

According to this, as the diameter of the substrate increases, the problem that the degree of warpage of the substrate increases due to the difference in lattice constant between the substrate and the plurality of semiconductor layers can be effectively eliminated.

(2). The material layer is a semiconductor light emitting device wafer, characterized in that formed of a material having a different lattice constant from the plurality of semiconductor layers.

(3). The material layer is silicon oxide film (SiO _x ), silicon nitride film (SiN _x ), magnesium oxide film (MgO _x ), tungsten (W), chromium nitride film (CrN _x ), chromium (Cr), hafnium (Hf), and molybdenum (Mo) A semiconductor light emitting device wafer, characterized in that formed of any one of the materials.

According to this, since the growth of the plurality of semiconductor layers in the partition line is prevented by the material layer having a different lattice constant from the plurality of semiconductor layers, the plurality of semiconductor layers may be individually grown in each closed region.

(4). The plurality of closed regions are formed in a lattice shape, the semiconductor light emitting device wafer, characterized in that disposed inclined with respect to the flat zone (flat zone) formed on the substrate.

As a result, the influence of the growth rate difference in the direction parallel to the flat zone and in the direction perpendicular to the flat zone is reduced, so that the plurality of semiconductor layers can be stably grown to the boundary of the closed region where the material layer is formed.

(5). A method for manufacturing a semiconductor light emitting device using a semiconductor light emitting device wafer, wherein the growing of the plurality of semiconductor layers includes controlling a horizontal growth of the semiconductor layer to adjust an area of the semiconductor layer. A method of manufacturing a semiconductor light emitting device using the device wafer.

According to this, the area of the plurality of semiconductor layers individually grown in the closed region can be adjusted.

(6). The partition line is a semiconductor light emitting device manufacturing method using a semiconductor light emitting device wafer, characterized in that formed by any one of a scribing process, laser processing and etching process.

According to one semiconductor light emitting device wafer according to the present disclosure and a method of manufacturing a semiconductor light emitting device using the same, since each semiconductor light emitting device including a plurality of semiconductor layers is grown by a partition line and a material layer, a plurality of substrates and a plurality of semiconductor light emitting devices are grown. It is possible to reduce the warpage of the substrate due to the stress (stress) caused by the difference in the lattice constant of the semiconductor layer.

In addition, according to another semiconductor light emitting device wafer and a method of manufacturing a semiconductor light emitting device using the same according to the present disclosure, since each semiconductor light emitting device is grown separately, it is possible to improve the thickness uniformity of each semiconductor light emitting device, thereby luminous efficiency This can be improved.

In addition, according to another semiconductor light emitting device wafer and a method of manufacturing a semiconductor light emitting device using the same according to the present disclosure, cracks, debris and the like that may occur in the process of manufacturing the individual semiconductor light emitting device from the semiconductor light emitting device wafer The problem of can be eliminated.

1 is a view showing an example of a semiconductor light emitting device wafer according to the present disclosure;

2 is a cross-sectional view of the A-A in Figure 1,

3 is a photograph of a semiconductor light emitting device wafer according to the present disclosure;

4 is a graph comparing the degree of warpage of a substrate of a semiconductor light emitting device wafer and a conventional semiconductor light emitting device wafer according to the present disclosure;

5 is a view showing an example of the shape of a closed region in the present disclosure,

6 and 7 illustrate a manufacturing process of a semiconductor light emitting device using the semiconductor light emitting device wafer according to the present disclosure.

Claims (10)

Board; A partition line formed as a groove on the substrate; A plurality of closed regions formed by partition lines; A plurality of semiconductor layers grown in each closed region and including an active layer in which light is generated by recombination of electrons and holes; And And a material layer formed around the closed region and preventing growth of the plurality of semiconductor layers. The method according to claim 1, The substrate is a semiconductor light emitting device wafer, characterized in that the diameter is 3 inches or more. The method according to claim 1, The material layer is a semiconductor light emitting device wafer, characterized in that formed of a material having a different lattice constant from the plurality of semiconductor layers. The method according to claim 1, The material layer is silicon oxide film (SiO _x ), silicon nitride film (SiN _x ), magnesium oxide film (MgO _x ), tungsten (W), chromium nitride film (CrN _x ), chromium (Cr), hafnium (Hf), and molybdenum (Mo). A semiconductor light emitting device wafer, characterized in that formed of any one of the materials. The method according to claim 1, The plurality of closed regions are formed in a lattice shape, the semiconductor light emitting device wafer, characterized in that disposed inclined with respect to the flat zone (flat zone) formed on the substrate. The method according to claim 1, The substrate is made of sapphire (Al ₂ O ₃ ) material, The plurality of semiconductor layers are formed of group III nitride semiconductors, The material layer is silicon oxide film (SiO _x ), silicon nitride film (SiN _x ), magnesium oxide film (MgO _x ), tungsten (W), chromium nitride film (CrN _x ), chromium (Cr), hafnium (Hf), and molybdenum (Mo) It is formed of any one material, The plurality of closed regions are formed in a lattice shape, the semiconductor light emitting device wafer, characterized in that formed inclined with respect to the flat zone (flat zone) formed on the substrate. A method of manufacturing a semiconductor light emitting device using the semiconductor light emitting device wafer of claim 1, Forming a partition line such that a plurality of closed regions are formed on the substrate; Forming a material layer in the compartment line; And A method of manufacturing a semiconductor light emitting device using a semiconductor light emitting device wafer comprising the step of growing a plurality of semiconductor layers in a closed area. The method of claim 7, The step of growing a plurality of semiconductor layers is a method of manufacturing a semiconductor light emitting device using a semiconductor light emitting device wafer, further comprising the step of controlling the horizontal growth of the semiconductor layer to control the area of the semiconductor layer. The method of claim 7, The partition line is a semiconductor light emitting device manufacturing method using a semiconductor light emitting device wafer, characterized in that formed by any one of a scribing process, laser processing and etching process. The method of claim 7, The growing of the plurality of semiconductor layers further includes controlling a horizontal growth of the semiconductor layer to adjust an area of the semiconductor layer. The substrate is formed of a sapphire (Al ₂ O ₃ ) substrate having a diameter of 3 inches or more, The plurality of semiconductor layers are formed of group III nitride semiconductors, The material layer is silicon oxide film (SiO _x ), silicon nitride film (SiN _x ), magnesium oxide film (MgO _x ), tungsten (W), chromium nitride film (CrN _x ), chromium (Cr), hafnium (Hf), and molybdenum (Mo) Method for manufacturing a semiconductor light emitting device using a semiconductor light emitting device wafer, characterized in that formed of any one of the materials.

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