KR20110019088A - Rf signal processing circuit - Google Patents

Abstract

PURPOSE: An RF signal processing circuit is provided to drastically reduce noise level when generating IF(Intermediate Frequency) signal. CONSTITUTION: A DSP(Digital Signal Processor)(160) processes an RF(Radio Frequency) signal inputted through an antenna. A digital to analog converter(200) converts a signal from a DSP(Digital Signal Processing) into analog value, and outputs the analog value to IF signal amplifier. A first filter ring means(300) is arranged between a DSP and a D/A(Digital to Analog) converter in order to remove the noise of the signal outputted from the D/A converter.

Description

RF signal processing circuit {RF SIGNAL PROCESSING CIRCUIT}

The present invention relates to an RF signal processing circuit, and more particularly, to improve an operating characteristic of an RF signal processing circuit for processing a digital signal.

With the development of wireless communication technology, it is possible to transmit and receive audio and video signals far away. When transmitting audio signals and video signals, a communication frequency called an RF signal uses a signal of several hundred MHz to several Ghz. In the transmission equipment, the audio signal and the video signal are combined with the RF signal, and in the reception equipment, the RF signal and the audio signal and the video signal are separated. In this case, combining is called modulation and separating is called demodulation.

In general, the RF signal processing circuit amplifies an input RF signal, filters a signal of a desired frequency band, and then demodulates it. In this process, the input of noise should be minimized to improve the characteristics of the RF signal processing circuit.

The present invention provides an RF signal processing circuit that can reduce noise as much as possible in processing an RF signal.

The present invention provides a DSP for processing an RF signal input through an antenna; A digital analog converter for converting a signal output from the DSP into an analog value and outputting the signal to an intermediate frequency amplifier; And first filtering means disposed between the DSP and the digital analog converter to remove noise of a signal output from the digital analog converter.

The first filtering means may be a low pass filter. In addition, it characterized in that it comprises an amplifier for amplifying the signal output from the digital analog converter to output as an intermediate frequency signal.

The apparatus may further include second filtering means between the digital analog converter and the amplifier to remove noise of a signal output from the digital analog converter. The second filtering means may be a low pass filter.

In addition, the RF signal processing circuit of the present invention includes a phase locked loop circuit for providing a phase locked clock to the DSP; And an oscillator for providing a reference clock with the phase locked loop. In addition, the oscillator is characterized in that the crystal oscillator.

In addition, the RF signal processing circuit of the present invention LNA circuit for amplifying the RF signal input through the antenna; A tracking filter for filtering a signal output from the LNA circuit; A mixer for mixing a signal output from the tracking filter with a delay locked clock; A low pass filter for low pass filtering the output of the mixer; A voltage control amplifier for amplifying the signal output from the low pass filter; And an analog-to-digital converter for converting the signal output from the voltage control amplifier into a digital signal and outputting the digital signal to the DSP.

In addition, the RF signal processing circuit of the present invention includes a phase locked loop circuit for providing a phase locked clock to the DSP; And an oscillator for providing a reference clock to the phase locked loop circuit. The oscillator is characterized in that the crystal oscillator.

According to the present invention, noise can be reduced in the process of signal processing by the RF signal processing circuit. In particular, in generating an intermediate frequency signal, noise can be greatly reduced.

DETAILED DESCRIPTION Hereinafter, the most preferred embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do.

1 is a block diagram showing an RF signal processing circuit for explaining the present invention.

As shown in Fig. 1, the RF signal processing circuit includes the LNA circuit 10, the tracking filter 11, the mixer 12, the low pass filters 13a and 13b, the voltage control amplifiers 14a and 14b, and analog and digital signals. The converters 15a and 15b, the DSP (Digital Signal Processor) 16, the digital analog converter 20, the amplifier 21, the phase locked loop circuits 17 and 18, the oscillator 19, and the automatic gain control unit 22 Include. Here, the low-pass filters 13a and 13b, the voltage control amplifiers 14a and 14b, and the analog-to-digital converters 15a and 15b are arranged in pairs so that positive and negative signals having opposite phases in parallel in processing an RF signal are parallel to each other. To deal with. In particular, the RF signal processing circuit shown in FIG. 1 shows a chip tuner for integrating all RF signal processing-related circuits into one chip that has recently been developed.

The LNA circuit 10 receives a RF signal input through an antenna to reduce and amplify noise. The LNA circuit operates when the input RF signal is weak and does not operate when the RF signal is strong. This is because amplifying a strong signal worsens the noise characteristic.

LNA circuits are also called low noise amplifiers. The signal received at the receiving end of the RF signal processing circuit has a very low power level due to the effects of attenuation and noise. Therefore, it is necessary to amplify the signal. Amplifier power is required. The LNA is designed to capture the operating point and the matching point so that the noise figure (NF) is low, and is usually designed to be an NF value between 1.5 and 2.5. The LNA circuit is designed to use a transistor having a low noise figure to have a low noise characteristic, and to gain as much as possible while using less thermal noise devices such as resistors.

The tracking filter 11 is a circuit for filtering the signal output from the LNA circuit. The mixer 12 is a block for mixing and outputting the reference clock signal provided from the phase locked loop circuit 17 and the signal output from the tracking filter 11. The low pass filters 13a and 13b are for filtering the signal output from the mixer 12, and the band to be filtered is determined according to the signal provided by the DSP. The voltage controlled amplifiers 14a and 14b amplify the signals provided by the low pass filters 13a and 13b in response to the signals provided by the DSP 16.

The analog to digital converters 15a and 15b convert the analog signals provided by the voltage control amplifiers 14a and 14b into digital values and output them to the DSP 16. The DSP 16 is a block for processing a digital signal. The DSP 16 receives an input signal having an I2C pattern, receives a digital signal output from the analog digital converters 15a and 15b, processes the digital signal, and outputs the digital signal to the digital analog converter 20. In addition, the DSP 16 generates and outputs a control signal for controlling the automatic gain control circuit 22, the low pass filters 13a and 13b, and the voltage control amplifiers 14a and 14b.

The oscillator 19 generates a reference clock, and the phase locked loop circuits 17 and 18 generate a phase locked clock using the reference clock provided by the oscillator 19 to generate the mixer 12 and the DSP 16, respectively. ) The oscillator 19 is configured as a crystal oscillator. The digital-to-analog converter 20 converts a signal output from the DSP 16 into an analog value and outputs it. The amplifier 21 amplifies the value converted by the digital-to-analog converter 20 and outputs it as an intermediate signal IF. The automatic gain control circuit 22 controls the amplification of the LNA circuit 10 in accordance with the signal provided from the DSP 16. The LNA circuit 10 amplifies the RF signal input by the automatic gain control circuit 22.

As described above, the RF signal processing circuit using the DSP receives a reference clock having a high frequency provided by the oscillator 19. Specifically, the phase locked loop circuit 18 receives the reference clock to generate a phase locked clock and outputs the phase locked clock to the DSP 16. In this case, a high frequency reference clock, that is, a high frequency component of the phase locked clock, is transferred to the DSP 16 and the digital analog converter 20 to generate noise. The noise generated at this time adversely affects the circuit output by the intermediate frequency signal through the amplifier 21.

In order to solve the above problem, the present invention includes a digital low pass filter between the output terminal of the DSP 16 and the digital analog converter 20, and the analog low signal between the digital analog converter 20 and the amplifier 21. An RF signal processing circuit having a pass filter is proposed.

2 is a block diagram showing an RF signal processing circuit according to a preferred embodiment of the present invention.

As shown in FIG. 2, the RF signal processing circuit includes an LNA circuit 100, a tracking filter 110, a mixer 120, a low pass filter 130a and 130b, a voltage control amplifier 140a and 140b, and an analog signal. Digital Converters 150a and 150b, DSP 160, Digital Analog Converter 200, Amplifier 210, Phase Locked Loops 170 and 180, Oscillator 190, Automatic Gain Control Circuit 220, Oscillator 190 And a digital low pass filter 300 and an analog low pass filter 400.

Of the blocks shown in Fig. 2, the same names as the blocks shown in Fig. 1 function substantially the same.

The RF signal processing circuit according to the present embodiment includes a digital low pass filter 300 between the output terminal of the DSP 160 and the digital analog converter 200, and between the digital analog converter 200 and the amplifier 210. An analog low pass filter 400 is provided. Since the signal output from the digital-to-analog converter 200 is an intermediate frequency signal, the analog low pass filter 400 is configured by using an LC so that only the frequency band of the intermediate frequency signal can pass in processing the RF signal. .

When the output signal of the DSP 160 passes through the digital low pass filter 300, the noise component starting from the oscillator 190 is removed. Therefore, the digital-to-analog converter 200 receives the output signal of the DSP 160 from which the noise component is removed. In addition, since the output signal of the digital-to-analog converter 200 is also output as the intermediate frequency signal IF through the low pass filter 400, the intermediate frequency signal IF is output with the noise component removed. Therefore, the input circuit which receives the intermediate frequency signal IF can reliably receive and process the intermediate frequency signal IF.

Therefore, by using the RF signal processing circuit according to the present invention, it is possible to expect an improvement in signal to noise (SNR) and image quality as a whole, and also to increase digital sensitivity.

Although the present invention has been described in detail with reference to exemplary embodiments above, those skilled in the art to which the present invention pertains can make various modifications to the above-described embodiments without departing from the scope of the present invention. Will understand. Therefore, the scope of the present invention should not be limited to the described embodiments, but should be determined by the scope of the appended claims, as well as the appended claims.

1 is a block diagram showing an RF signal processing circuit for explaining the present invention.

2 is a block diagram showing an RF signal processing circuit according to a preferred embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

100: LNA circuit 110: tracking filter

120: mixer 130: low pass filter

140: voltage controlled amplifier 150: analog-to-digital converter

160: DSP 200: digital-to-analog converter

220: automatic gain control circuit 300: digital low pass filter

400: analog lowpass filter

Claims (10)

A DSP for processing an RF signal input through an antenna; A digital analog converter for converting a signal output from the DSP into an analog value and outputting the signal to an intermediate frequency amplifier; And First filtering means disposed between the DSP and the digital analog converter for noise reduction of a signal output from the digital analog converter RF signal processing circuit comprising a. The method of claim 1, And the first filtering means is a low pass filter. The method of claim 1, And an amplifier for amplifying the signal output from the digital-to-analog converter and outputting the intermediate frequency signal. In accordance with claim 3, And second filtering means between the digital analog converter and the amplifier to remove noise of a signal output from the digital analog converter. The method of claim 4, wherein And the second filtering means is a low pass filter. The method of claim 1, A phase locked loop circuit for providing a phase locked clock to the DSP; And And an oscillator for providing a reference clock to the phase locked loop circuit. The method of claim 6, And the oscillator is a crystal oscillator. The method of claim 1, An LNA circuit for amplifying an RF signal input through the antenna; A tracking filter for filtering a signal output from the LNA circuit; A mixer for mixing a signal output from the tracking filter with a phase locked clock; A low pass filter for low pass filtering the output of the mixer; A voltage control amplifier for amplifying the signal output from the low pass filter; And And an analog-digital converter for converting the signal output from the voltage control amplifier into a digital signal and outputting the digital signal to the DSP. The method of claim 8, A phase locked loop circuit for providing a phase locked clock to the DSP; And And an oscillator for providing a reference clock to the phase locked loop circuit. The method of claim 9, And the oscillator is a crystal oscillator.

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