KR20110001095A - Non volatile memory device and method of programming the same - Google Patents

Abstract

PURPOSE: A non-volatile memory and a programming method are provided to improve the program speed by differently setting the program initiation voltage by determining a page where a slow cell is. CONSTITUTION: The memory cells comprise the several physical pages for storing data. A controller(160) generates the program pulse for the program operation. A pulse generating part(162) generates the program pulse. A pulse counter(163) counts the number of the program pulse generated by the pulse generating part.

Description

Non-volatile memory device and method of programming thereof

The present invention relates to a nonvolatile memory device and a program method thereof.

Among the memory devices, the nonvolatile memory device does not erase stored data even when power supply is interrupted. A typical nonvolatile memory device is a flash memory device. Flash memory devices can be classified into NOR flash memory devices and NAND flash memory devices according to the structure of the memory cell array. The gate of the flash memory cell has a structure including a tunnel insulating film, a floating gate, a dielectric film, and a control gate.

Memory cells of the nonvolatile memory device are programmed using F-N tunneling. When a high voltage is applied to the control gate of the memory cell during the program operation, electrons are accumulated in the floating gate. In the read operation, the threshold voltage of the memory cell, which varies according to the amount of electrons accumulated in the floating gate, is detected, and the stored data is determined according to the detected threshold voltage level.

The amount of electrons accumulated in the floating gate is determined by the voltage applied to the control gate of the memory cell. However, since not all memory cells have the same characteristics, even if the same voltage is applied to the control gate, the amount of charge accumulated in the floating gate may be different. Therefore, the speed at which the program proceeds also depends on the characteristics of the memory cell.

Therefore, the technical problem to be achieved by the present invention is to improve the program performance by reducing the application of unnecessary program pulses by changing the program start voltage for a page with a slow cell that is slower than the program start voltage for another page. The present invention provides a nonvolatile memory device and a program method thereof.

Nonvolatile memory device according to a feature of the present invention,

Memory cells including a plurality of physical pages for data storage, each physical page including first and second logical pages; When the memory cells are programmed, the controller generates a program pulse for a program operation and controls the program start voltage of the second logical page to be changed according to the number of program pulses generated until the first logical page is programmed. Include.

The control unit includes a pulse generator for generating the program pulse; A pulse counter that counts the number of program pulses generated by the pulse generator until the program for the first logical page is completed; And a program controller configured to set a program start voltage of a second logical page according to the number of pulses counted by the pulse counter, and control a program operation.

The controller further includes a register for storing the number of pulses counted by the pulse counter.

The program start voltage information according to the number of pulses is stored in the register.

The program controller sets the program start voltage of the second logical page to be higher as the number of pulses counted by the pulse counter increases.

Program method of a nonvolatile memory device according to another aspect of the present invention,

Providing a nonvolatile memory device in which one physical page includes first and second logical pages; Counting the number of pulses generated until the program of the first logical page is completed; And before programming the second logical page, setting a program start voltage for programming the second logical page according to the number of counted pulses and performing a program of the second logical page.

The number of counted pulses is stored in a separate storage unit.

The program start voltage of the second logical page is set to a higher voltage level as the number of counted pulses increases.

The program start voltage information for setting according to the counted pulses may be stored in advance in a separate storage unit of the nonvolatile memory device.

As described above, the nonvolatile memory device and the program method thereof according to the present invention can determine a page having a slow cell and improve a program speed by setting a different program start voltage for a page having a slow cell. Can be.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention. It is provided to inform you.

1 is a nonvolatile memory device according to an embodiment of the present invention.

Referring to FIG. 1, the nonvolatile memory device 100 may include a memory cell array 110, a page buffer unit 120, a data input / output unit 130, an X decoder 140, a voltage providing unit 150, and a controller ( 160).

In the memory cell array 110, a plurality of memory cells are connected to a bit line BL and a word line WL.

The nonvolatile memory device 100 performs a program in units of pages when performing a program. In this case, one page corresponds to one word line in a single level cell having one bit that can be stored in a memory cell.

In the case of a multi-level cell having two bits that can be stored in a memory cell, one word line corresponds to a physical page, and one word line corresponds to the number of bits that can be stored. A plurality of logical pages are included. For example, if three bits can be stored, one physical page includes three logical pages.

Memory cells according to an embodiment of the present invention are multi-level cells capable of storing two bits of data, and one physical page includes a logical page divided into a LSB (Least Significant Bit) page and a MSB (Most Significant Bit) page. .

The page buffer unit 120 includes page buffers connected to one or more bit lines. Each page buffer includes one or more latch circuits, and latches data for a program or reads and stores data stored in a memory cell.

The data input / output unit 130 performs data input / output to the page buffer unit 120 according to the control signal of the controller 160.

The X decoder 140 connects word lines of the memory cell array 110 to a global word line GWL provided with an operating voltage.

The voltage provider 150 generates operating voltages including a program voltage, a pass voltage, and a read voltage based on a control signal input from the controller 160 and provides the generated voltages to the global word line GWL.

In particular, in the program operation, the voltage providing unit 150 generates a program voltage according to a control signal input from the controller 160 and converts the program voltage according to the program pulse input from the controller 160 into the global word line GWL. Among them, a global word line (GWL) for providing a program voltage is provided.

The controller 160 outputs control signals for controlling the operation of the nonvolatile memory device 100. The controller 160 according to an exemplary embodiment of the present invention includes a program controller 161, a pulse generator 162, a pulse counter 163, and a register 164.

The program controller 161 outputs control signals for controlling the program operation. In particular, the program start voltage is set according to the pulse number information stored in the register 164, and information about the set program start voltage is provided to the voltage providing unit 150 to generate the program voltage.

The pulse generator 162 generates a program pulse for providing to the voltage provider 150 while the program operation is performed. The pulse generator 152 generates a pulse under the control of the program controller 161.

The pulse counter 163 counts the number of pulses generated by the pulse generator 162 until the program ends, and the counted pulse number information is stored in the register 164. In addition, the register 164 may store information about program start voltages to be set, respectively, according to the program pulse number information.

When performing a program, the nonvolatile memory device 100 does not program by applying a high voltage as a program voltage at a time, and increases a program voltage by a step voltage according to a program pulse according to an incremental step pulse program (ISPP) method. Provide it.

2A and 2B illustrate a program voltage applied in a program operation of a nonvolatile memory device according to example embodiments.

Particularly, FIG. 2A is a program voltage applied when programming an LSB page among program voltages applied to a nonvolatile memory device 100 according to a program pulse, and FIG. 2B is applied when programming an MSB page. Program voltage.

In the LSB page program of FIG. 2A, it is assumed that the program voltage Vpgm is increased by the step pulse Vst from the first program start voltage Vpgm_start1 as the program pulse is applied. The first case A is a program voltage applied to a normal memory cell having a general program speed, and the second case B is a program voltage applied to a slow cell having a slow program speed.

In the case of the first case A, when the program is completed when the program pulse is applied from the first program pulse P1 to the fifth program pulse P5, the second case B is the sixth program pulse P6. The program must be completed until). That is, compared to normal cells, slow cells apply more program pulses to higher program voltages to complete the program.

This is also true for MSB pages.

In FIG. 2B, when the program voltage is increased by the step voltage Vst starting from the second program start voltage Vpgm_start2, if the first case A is applied up to the sixth program pulse P6, the program is completed. The second case B must be applied up to the seventh program pulse P7 to complete the program.

Therefore, more program pulses need to be applied to the page including the slow cell, resulting in a longer program time.

Therefore, according to an exemplary embodiment of the present invention, a page having a slow cell is classified according to a program result of an LSB page, and a program start voltage for programming an MSB page for a page having a slow cell is set differently.

3 is a flowchart illustrating a program method according to an exemplary embodiment of the present invention.

In FIG. 3, the program method according to an embodiment of the present invention first performs an LSB page program (S301). In order to program the LSB page, the program controller 161 causes the pulse generator 162 to generate a program pulse until the LSB page program is completed, and the pulse counter 163 generates a program generated by the pulse generator 162. The number of pulses is counted (S303).

When the LSB page program is completed (S305), the pulse counter 163 stores the pulse number information counted so far in the register 164 (S307).

When the program of the MSB page starts (S309), the program control unit 161 loads the pulse number information stored in the register 164 (S311). The program start voltage of the MSB page is set according to the pulse number information (S313).

In this case, the program start voltage may store the program start voltage information to be set according to the pulse number information in the register 164, and the program control unit 161 may load and set the program start voltage information together. In another method, the program control unit 161 may have an algorithm or a data table for setting a program start voltage according to the pulse number information. The algorithm or data table at this time can be made using experimental data.

When the program start voltage is set, the program controller 161 outputs a control signal to the voltage providing unit 150 to generate the set program start voltage, and controls the pulse generator 162 to generate a program pulse.

According to the programming method described above, a program pulse is applied differently to the first case A and the second case B while the LSB page is programmed, and the program proceeds. When the MSB page program is executed, the program voltage applied to each page including the normal cell and the slow cell is as follows.

FIG. 4 shows a program voltage when programming an MSB page according to FIG. 3.

Referring to FIG. 4, for the first case A applied to the page with normal cells without the slow cell and the second case B applied to the page with the slow cell, the program pulses are both the sixth program pulse ( Only P6) is applied.

However, in step S311 and S313 of FIG. 3, the third program start voltage Vpgm_start3 is applied to the first case, and the fourth program start voltage Vpgm_start4 is set to the start voltage in the second case B. FIG.

2A and 3 will be described in detail with reference to the following.

While the program of the LSB page is in progress, the pulse counter 163 counts the number of program pulses and stores the counted pulse number information in the register 164.

In the case of the first case A, '5' is stored as the pulse number information, and in the case of the second case B, the '6' is stored as the pulse number information.

And before starting the program of the MSB page, the program controller 161 checks the pulse number information stored in the register 164.

In this case, since the pulse number information is '5' in the first case A, the program start voltage of the MSB page is set to the third program start voltage Vpgm_start3.

However, in the second case B, since the pulse number information is '6', it may be determined that the corresponding page includes the slow cell. Therefore, the program controller 161 sets the program start voltage to the fourth program start voltage Vpgm_start4. For pages with slow cells, the program start voltage may be set higher than that with pages with normal cells, thereby increasing the program speed of the slow cells and reducing the number of program pulses.

Although the technical spirit of the present invention described above has been described in detail in a preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, it will be understood by those skilled in the art that various embodiments of the present invention are possible within the scope of the technical idea of the present invention.

1 is a nonvolatile memory device according to an embodiment of the present invention.

2A and 2B illustrate a program voltage applied in a program operation of a nonvolatile memory device according to example embodiments.

3 is a flowchart illustrating a program method according to an exemplary embodiment of the present invention.

FIG. 4 shows a program voltage when programming an MSB page according to FIG. 3.

* Brief description of the main parts of the drawings *

100 nonvolatile memory device 110 memory cell array

120: page buffer unit 130: data input and output unit

140: X decoder 150: voltage provider

160: control unit

Claims (9)

Memory cells including a plurality of physical pages for data storage, each physical page including first and second logical pages; A controller configured to generate a program pulse for a program operation when programming the memory cells, and to control a program start voltage of a second logical page to be changed according to the number of program pulses generated until the first logical page is programmed Nonvolatile memory device comprising a. The method of claim 1, The control unit, A pulse generator for generating the program pulse; A pulse counter that counts the number of program pulses generated by the pulse generator until the program for the first logical page is completed; And a program controller for setting a program start voltage of a second logical page according to the number of pulses counted by the pulse counter, and controlling a program operation. 3. The method of claim 2, The control unit further comprises a register for storing the number of pulses counted by the pulse counter. The method of claim 3, wherein And the program start voltage information corresponding to the number of pulses is stored in the register. 3. The method of claim 2, The program control unit, And as the number of pulses counted by the pulse counter increases, the program start voltage of the second logical page is set higher. Providing a nonvolatile memory device in which one physical page includes first and second logical pages; Counting the number of pulses generated until the program of the first logical page is completed; And Before programming the second logical page, setting a program start voltage for programming the second logical page according to the number of counted pulses and performing a program of the second logical page Program method of a nonvolatile memory device comprising a. The method of claim 6, And counting the number of pulses stored in a separate storage unit. The method of claim 7, wherein The program start voltage of the second logical page is And the higher the number of counted pulses, the higher the voltage level is. The method of claim 7, wherein And storing program start voltage information for setting according to the counted pulses in a separate storage unit of the nonvolatile memory device in advance.

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