KR20100067586A - Coding apparatus of h.264 - Google Patents

Abstract

PURPOSE: An SAE computing device and H.264 coding apparatus including the same are provided to advance power on of the reverse conversion and inverse quantization by calculating quantized DC element required for IQIT and the dequantized DC element. CONSTITUTION: A plurality of subtractions(411) calculates the differences of the estimate signals and input signals. A plural absolute value calculator(412) calculates the absolute values about the calculated differences. A plural operation mode selector(413) selects the output signals of subtraction parts. If the SAE calculation mode operates, the operation mode options select the output signals of absolute value calculation parts.

Description

SAE calculating device and H.264 coding device including the same {CODING APPARATUS OF H.264}

The present invention relates to an H.264 technology, and more particularly, to an SAE calculation device for improving the efficiency of an intra 16 × 16 luminance prediction operation, and an H.264 coding device including the same.

The present invention is derived from the research conducted as part of the IT growth engine technology development project of the Ministry of Knowledge Economy and the Ministry of Information and Communication Research and Development. [Task management number: 2007-S-026-01, Task name: Multi-format multimedia SoC based on MPCore platform] ].

In video compression schemes such as MPEG-1, MPEG-2 and MPEG-4 H.264 / MPEG-4 AVC (Advanced Video coding), a picture is divided into macro blocks to encode an image. Each macro block is encoded using inter prediction and intra prediction. Then, considering the data size of the encoded macroblock and the distortion degree of the original macroblock, the optimal encoding mode is selected and the macroblock is encoded.

Intra prediction does not refer to a reference picture in order to encode a block of a current picture, but performs encoding using a pixel value spatially adjacent to the current block to be encoded. First, a prediction value for the current block to be encoded is calculated using adjacent pixel values. Next, only the difference between the predicted value and the pixel value of the original current block is encoded.

The intra prediction mode minimizes the difference between the prediction block and the encoded block for each block, and finds the best prediction mode, and includes Luma 4 × 4 prediction, Luminance 16 × 16 prediction, and chromaticity. ) There are three types of 8 × 8 predictions.

The field of interest in the present invention relates to intra 16 × 16 luminance prediction, and hereinafter, only intra 16 × 16 luminance prediction is described.

FIG. 1 is a diagram illustrating a transmission order of data in a macro block when encoding an input image according to intra 16 × 16 luminance prediction.

When a macro block is coded with intra 16 × 16 luma prediction, a luma DC block labeled '-1' containing the transformed DC coefficients of each 4x4 luma AC block (0-15) is transmitted first, then , The luminance AC blocks 0 to 15 are sequentially transmitted. A chromaticity DC block 16, 17 in a 2x2 array containing the DC coefficients of the chromaticity Cb and the chromaticity component Cr is then transmitted, and finally, the chromaticity AC block 18-which does not include the DC coefficients. 25) is transmitted.

FIG. 2 is a diagram for describing an input image coding method according to intra 16 × 16 luminance prediction according to the prior art, which illustrates a timing cycle for one macro block.

Referring to FIG. 2, conventionally, an integer DCT (Discrete Cosine Transform) and a Transform and Quantization (TQ) for luminance AC blocks 0 to 15 are performed (TQ (0) to TQ (15)). ), The DC coefficients of the luminance AC blocks 0-15 obtained by the integer DCT operation for the luminance AC blocks 0-15 are collected to perform a Hadamard transform and a TQ (DC (Y)). Inverse Quantization and Inverse Transform (IQIT) is performed in the order of DC (Y), TQ (0) to TQ (15).

In addition, it can be seen that the chromaticity AC blocks 18 to 21 and 22 to 25 are also processed in the same manner as above.

However, as shown in FIG. 2, conventionally, when the DC components DC (Y), DC (cb), and DC (cr) necessary for IQIT are calculated, the operation start time of the IQIT is unnecessarily delayed. .

That is, the IQIT operation may be started when the quantized DC components DC (Y), DC (cb), and DC (cr), particularly DC (Y), required for the IQIT are calculated, but in the related art, the luminance AC block (0 to 0) may be started. 15) DC (Y) is calculated after performing the constant DCT for all, and there is a problem that the operation of IQIT is delayed by the constant DCT operation cycle of the luminance AC blocks (0-15).

This causes unnecessary overhead in the input video encoding operation according to the intra 16 × 16 luminance prediction, thereby lowering the overall operating speed of the H.264 coding apparatus.

Accordingly, in the present invention, a quantized DC component required for IQIT in intra 16 × 16 luminance prediction can be calculated in advance in an intra prediction operation, and thus an SAE calculation device and an H.264 including the same in order to advance the operation time of the IQIT. It is intended to provide a coding device.

In addition, the present invention provides a SAE calculation device and an H.264 coding device including the same so that the inverse quantized DC component as well as the DC component required for the IQIT can be calculated in advance, thereby increasing the operation speed of the IQIT.

As a means for solving the above problems, the SAE calculation apparatus according to an embodiment of the present invention includes a plurality of subtraction units for calculating the difference between the input signal and the prediction signal; A plurality of absolute value calculators for calculating an absolute value of a difference between an input signal and a predicted signal calculated by the plurality of subtraction units; A plurality of operation mode selection units for selecting output signals of the plurality of subtraction units in a DC coefficient calculation mode, and selecting and outputting output signals of the plurality of absolute value calculators in a sum of absolute error (SAE) calculation mode; An adder configured to sum all output signals of the plurality of operation mode selectors; A SAE value output unit for obtaining and outputting an SAE value for one macro block from an output signal of the adder; And a DC coefficient value output unit which obtains and outputs a DC coefficient value for one macro block from the output signal of the adder.

The DC coefficient value output unit sequentially stores signals output from the adder for a plurality of cycles to obtain the DC coefficient values; And a DC coefficient value output unit providing the DC coefficient value stored in the DC register to the Hadamard converter.

The DC register sequentially stores the signals output from the adder during '16 / n 'cycles when n (n is a natural number) input signals and prediction signals are input in the intra 16 × 16 luminance prediction mode. When the coefficient value is obtained and n input signals and prediction signals are input by n in the intra 8 × 8 chroma prediction mode, the DC coefficient values are sequentially stored by sequentially storing the signals output from the adder during '8 / n' cycles. Can be obtained.

As a means for solving the above problems, an H.264 coding apparatus according to an embodiment of the present invention comprises an input signal memory for storing input signals for one macro block; A prediction signal providing unit providing prediction signals corresponding to each of the input signals; An SAE calculation unit for calculating a prediction mode SAE value from the input signals and the prediction signals in the SAE calculation mode, and calculating a DC coefficient value from the input signals and the prediction signals in the DC coefficient calculation mode; And when the SAE calculator calculates the SAE value for each prediction mode, analyzes the SAE value for each prediction mode to determine an optimal prediction mode, and when the SAE calculator calculates a DC coefficient value, converts the DC coefficient to Hadamard transform. And a prediction mode selector provided to a transform and quantization (TQ) and inverse quantization and inverse transform (IQIT) device.

The SAE calculation unit corresponds to one prediction mode among a plurality of prediction modes. In the SAE calculation mode, the SAE calculation unit calculates the SAE value of the one prediction mode from the input signals and the prediction signals, and calculates the DCE calculation mode in the DC coefficient calculation mode. A first predicting unit calculating a DC coefficient value from the input signals and the prediction signals; And a second predictor corresponding to each of the remaining prediction modes except one prediction mode among a plurality of prediction modes, and calculating SAE values of the remaining prediction modes from the input signals and the prediction signals, respectively. can do.

The first prediction unit includes a plurality of subtraction units for calculating a difference between the input signal and the prediction signal; A plurality of absolute value calculators for calculating an absolute value of a difference between an input signal and a predicted signal calculated by the plurality of subtraction units; A plurality of operation mode selection units for selecting output signals of the plurality of subtraction units in a DC coefficient calculation mode and selecting and outputting output signals of the plurality of absolute value calculators in an SAE calculation mode; An adder configured to sum all output signals of the plurality of operation mode selectors; A SAE value output unit for obtaining and outputting an SAE value for one macro block from an output signal of the adder; And a DC coefficient value output unit which obtains and outputs a DC coefficient value for one macro block from the output signal of the adder.

The DC coefficient value output unit sequentially stores signals output from the adder for a plurality of cycles to obtain the DC coefficient values; And a DC coefficient value output unit configured to provide a DC coefficient value stored in the DC register to the prediction mode selection unit to perform Hadamard transform.

The DC register sequentially stores the signals output from the adder during '16 / n 'cycles when n (n is a natural number) input signals and prediction signals are input in the intra 16 × 16 luminance prediction mode. When the coefficient value is obtained and n input signals and prediction signals are input by n in the intra 8 × 8 chroma prediction mode, the DC coefficient values are sequentially stored by sequentially storing the signals output from the adder during '8 / n' cycles. Can be obtained.

The prediction mode selection unit, when the SAE calculation unit calculates the SAE value for each prediction mode, an optimum mode determination unit for determining the optimal prediction mode by analyzing the SAE value for each prediction mode; And a Hadamard transform unit for performing Hadamard transform on the DC coefficient value when the SAE calculator calculates the DC coefficient value.

The prediction signal providing unit stores prediction signals for each prediction mode corresponding to each of the input signals, and sequentially outputs n (n is a natural number) per cycle for each prediction mode; And a prediction signal selector which selects only n prediction signals corresponding to an optimal prediction mode among the prediction signals output from the prediction signal generator and provides the prediction signal to the SAE calculator.

The SAE calculation apparatus and the H.264 coding apparatus including the same of the present invention allow the quantized DC component and the dequantized DC component required for the IQIT in intra 16 × 16 luminance prediction to be pre-calculated in the intra prediction operation. Not only can it speed up the operation time, but it also increases the operation speed of the IQIT. That is, the operation efficiency of intra 16x16 luminance prediction is improved.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, in describing in detail the operating principle of the preferred embodiment of the present invention, if it is determined that the detailed description of the related known function or configuration may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted.

In the drawings, parts irrelevant to the description are omitted in order to clearly describe the present invention, and like reference numerals designate like parts throughout the specification.

In addition, when a part is said to "include" a certain component, this means that it may further include other components, except to exclude other components unless otherwise stated.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3 is a diagram illustrating an input image coding method according to intra 16 × 16 luminance prediction according to an embodiment of the present invention, which illustrates a timing cycle for one macro block.

Referring to FIG. 3, in the present invention, after performing operations according to the intra 16 × 16 luminance prediction mode, the intra 8 × 8 chroma prediction mode, and the intra 4 × 4 luminance prediction mode, an intra prediction operation for determining an optimal prediction mode is performed. In advance, the quantized DC components (DC (Y), DC (cb), DC (cr)) required for IQIT and the dequantized DC components (IDC (Y), IDC (cb), IDC (cr)) are previously identified. Calculate.

Accordingly, the IQIT operation according to the present invention can be performed as soon as the integer DCT and TQ for the luminance AC blocks 0 to 15 are completed.

In addition, since the TQ and IQIT operations are performed only on the luminance AC blocks 0 to 15 and the chroma AC blocks 18 to 25, the operation speeds of the TQ and IQIT are improved. That is, the TQ operating speed is the operation cycle for calculating the quantized DC components DC (Y), DC (cb), and DC (cr), and the IQIT operating speed is the dequantized DC components IDC (Y) and IDC ( cb) and IDC (cr)) are accelerated by the operation cycle of calculating.

Hereinafter, in order to help the understanding of the present invention, the operation principle of the present invention will be described first.

In general, the SAE (Sum of Absolute Error) value of each block for determining the optimal prediction mode in the intra 16 × 16 luminance prediction mode is calculated by Equation 1, and the DC coefficient of each block is calculated by Equation 2 do.

In this case, org [x, y] means an input signal and pred [x, y] means a prediction signal.

,

,

Y ₀₀ = (x ₀₀ + x ₀₁ + x ₀₂ + x ₀₃ + x ₁₀ + x ₁₁ + x ₁₂ + x ₁₃ + x ₂₀ + x ₂₁ + x ₂₂ + x ₂₃ + x ₃₀ + x ₃₁ + x ₃₂ + x ₃₃ )

Here, x ₀₀ to x ₃₃ represent org [x, y] -pred [x, y] of 4 × 4 blocks of 16 blocks in one macroblock, and the final 16 DC coefficients of 1 block for each block Is generated.

That is, the SAE value may be obtained by adding the absolute value of the difference between the input signal and the prediction signal, and the DC coefficient value may be obtained by adding the difference between the input signal and the prediction signal.

Accordingly, the present invention enables the calculation of not only the SAE value but also the DC coefficient value in the intra prediction operation by using the existing SAE value calculation device driven during the intra prediction operation.

In addition, since intra 16 × 16 luminance prediction and intra 8 × 8 chroma prediction are performed in the same manner, an apparatus for performing intra 16 × 16 luminance prediction includes both intra 16 × 16 luminance prediction and intra 8 × 8 chroma prediction. Can be performed. In addition, the intra 16 × 16 luminance prediction operation and the intra 8 × 8 chroma prediction operation have shorter operation cycles than the intra 4 × 4 luminance prediction as shown in FIGS. 2 and 3.

Therefore, the present invention not only performs the intra 16 × 16 luminance prediction operation and the intra 8 × 8 chroma prediction operation through the apparatus for performing the intra 16 × 16 luminance prediction, but also the luminance DC block (-1) and the chromaticity DC block ( Even DC coefficients of 16 and 17 can be calculated.

4 is a diagram illustrating a part of an H.264 coding apparatus according to an embodiment of the present invention, which is an apparatus for simultaneously performing intra 16 × 16 luminance prediction and intra 8 × 8 chroma prediction.

Referring to FIG. 4, the apparatus of the present invention includes an input signal memory 100, a predictive signal generator 200, a predictive signal selector 300, a SAE calculator 400, and a predictive mode selector 500. It is configured to include. The SAE calculator 400 is composed of two types of the first predictor 410 and the second predictor 420, and the prediction mode selector 500 includes the optimum mode determiner 510 and the Hadamard transform. It consists of a part 520.

In particular, in the present invention, the first predictor 410 adds a circuit for calculating the DC coefficient value to the existing SAE calculating apparatus, and implements the calculation of the DC coefficient value as well as the SAE value. 420 is implemented using the existing SAE calculation device.

Hereinafter, the function of each component will be described.

The input signal memory 100 stores input signals (luminance signals and chroma signals) for one macroblock to be currently encoded, and sequentially sequentially n items (for example, four) per cycle. Will output

The prediction signal generator 200 stores prediction signals for each prediction mode (ie, DC mode, horizontal mode, vertical mode, and planar mode) corresponding to each of the input signals of the macroblock, and stores n prediction cycles per prediction mode. Outputs them one by one.

The prediction signal selector 300 selects only n prediction signals corresponding to an optimal prediction mode determined by the prediction mode selector 500 among the prediction signals output from the prediction signal generator 200. To the SAE calculation unit 400.

The SAE calculator 400 has two operation modes, a SAE calculation mode and a DC coefficient calculation mode, and change its operation according to the operation mode. That is, in the SAE calculation mode, SAE values SAE_DC, SAE_H, SAE_V, SAE_P for each prediction mode are calculated through one first prediction unit 410 and three second prediction units 420, and DC coefficient calculation is performed. In the mode, the DC predictor value is calculated through the first predictor 410.

The optimum mode determiner 510 of the prediction mode selector 500 analyzes the SAE values SAE_DC, SAE_H, SAE_V, SAE_P for each prediction mode from the SAE calculator 400 and has the minimum error value. The mode (that is, the mode which performs the best prediction) is determined as the prediction mode of the corresponding block.

When the Hadamard converter 520 of the prediction mode selector 500 transmits the DC coefficient value from the SAE calculator 400, the Hadamard transform unit 520 transmits the Hadamard transform to the TQ and ITIQ apparatuses. That is, by acquiring and providing the DC coefficient values during the intra prediction operation, the TQ and ITIQ apparatuses can pre-calculate the quantized DC components and dequantized DC components required for the IQIT as described above.

5 is a diagram showing a detailed configuration of the SAE calculation unit 400 according to an embodiment of the present invention.

Referring to FIG. 5, the SAE calculator 400 of the present invention includes one first predictor 410 and three second predictors 420. The first predictor 410 includes four subtractors 411, four absolute value calculators 412, four operation mode selectors 413, two primary adders 414-1, A secondary adder 414-2, a tertiary adder 414-3, a SAE value output unit 415, a DC register 416, and a DC coefficient value output unit 417; The predictor 420 includes four subtractors 411, four absolute value calculators 412, two primary adders 414-1, a secondary adder 414-2, and a third adder. 414-3, the SAE value output unit 415 is configured.

That is, the present invention adds four operation mode selectors 413, a DC register 416, and a DC coefficient value output unit 417 to the first predictor 410 in addition to the components of the second predictor 420. Thus, not only the SAE value but also the DC coefficient value can be calculated in the intra prediction operation.

Hereinafter, the function of each component will be described.

Each subtraction unit 411 calculates a difference between the input signal org and the prediction signal pred.

Each absolute value calculator 412 is connected to one subtractor 411 to obtain an absolute value of the difference between the input signal org and the predicted signal pred.

Each operation mode selection unit 413 is connected to one subtraction unit 411 and one absolute value calculation unit 412, and outputs the output signal of the subtraction unit 411 when the current operation mode is the DC coefficient calculation mode. In case of SAE calculation mode, the controller transmits the output signal of the absolute value calculator 412.

At this time, the mode selection signal DC_cal is a control signal for notifying the current operation mode. The mode selection signal DC_cal is set to a first value (eg, 1) in the DC coefficient calculation mode and a second value (eg, in the SAE calculation mode). For example, it is set to 0).

The primary adder 414-1 adds the output signals of the two operation mode selectors 413, and the secondary adder 414-2 adds the output signals of the two primary adders 414-1. In addition, the tertiary adder 414-3 sums the output signal of the secondary adder 414-2 with the output signal of the SAE value output unit 415. That is, the primary adder 414-1, the secondary adder 414-2, and the tertiary adder 414-3 are connected in multiple stages, so that all the signals output from the plurality of operation mode selectors 413 are multiplied. Add up.

The SAE value output unit 415 outputs from the third order adder 414-3 for m cycles (16 / n for intra 16 × 16 luminance prediction and 8 / n for intra 8 × 8 chroma prediction). The stored signals are sequentially stored, and SAE values for one macro block as in Equation 1 are obtained and output.

The DC register 416 sequentially stores signals output from the tertiary adder 414-3 for m cycles to obtain and output DC coefficient values for one macro block as shown in Equation 2 above. do.

The DC coefficient value output unit 417 provides the DC coefficient value stored in the DC register 416 to the Hadamard transformer 520 of FIG. 4 in response to the output control signal Sel_inpt. At this time, the DC coefficient value output unit 417 may output the DC coefficient value stored in the DC register 416 at once or multiple times.

At this time, the mode selection signal DC_cal to the output control signal is a control signal for notifying the current operation mode. The mode selection signal DC_cal is set to a first value (for example, 1) in the DC coefficient calculation mode and is set in the SAE calculation mode. It is set to two values (eg 0).

Hereinafter, the operation of the SAE calculator 400 of FIG. 5 will be described.

In this case, when the mode selection signal DC_cal is set to the second value, that is, when the operation mode of the SAE calculation unit 400 is the SAE calculation mode, the SAE calculation unit 400 operates in the same manner as before. The description will be omitted.

First, when the intra 16x16 luminance prediction operation is activated and four input signals org and a prediction signal pred for the luminance DC block -1 are inputted, the four subtraction units 411 are used to subtract these differences. The four absolute value calculators 412 calculate the absolute values of the calculated differences.

In this state, when the mode selection signal DC_cal is set to the first value, the four operation mode selection units 413 select the output signals of the four subtraction units 411 and transmit them to the rear end.

The difference between the output signals of the four subtractors 411, that is, the input signal org and the prediction signal pred, is added through the first to third order adders 414-1,414-2,414-3 (x _00). + x ₀₁ + x ₀₂ + x ₀₃ ), which is stored in the DC register 416.

This operation becomes a new operation cycle, and is repeated every time four new input signals org and a prediction signal pred are inputted, and the DC register 416 has a '(x ₁₀ + x ₁₁ + x ₁₂ + x ₁₃ ) ',' (x ₂₀ + x ₂₁ + x ₂₂ + x ₂₃ ) ',' (x ₃₀ + x ₃₁ + x ₃₂ + x ₃₃ ) 'are additionally stored.

As a result, the DC coefficient value of the luminance DC block (-1) as shown in Equation 2 is stored in the DC register 416 over four operation cycles, and the DC coefficient value output unit 417 outputs the DC coefficient value.

In addition, whenever the intra 8x8 chroma prediction operation is activated so that four input signals org and prediction signals for the chromaticity DC blocks 16 and 17 are inputted, four subtractions as described above are performed. The unit 411 calculates the difference, and the four absolute value calculators 412 obtain the absolute value of the calculated difference.

When the mode selection signal DC_cal is set to the first value, the four operation mode selectors 413 select the output signals of the four subtractors 411, and the first to third order adders 414-1 and 414. -2,414-3) adds all of them together and outputs (x ₀₀ + x ₀₁ + x ₀₂ + x ₀₃ ). In addition, the DC register 416 and the DC coefficient value output unit 417 add the output signals added through the first to third order adders 414-1, 414-2, and 414-3 to the DC coefficient values of the chromaticity DC blocks 16 and 17. To print.

As described above, in the present invention, a circuit for calculating the DC coefficient value is added to any one of the plurality of prediction units (for example, 410) included in the SAE calculation unit 400, so that the luminance DC block (at -1) and chromaticity DC blocks (16, 17) allow pre-calculation of DC coefficient values.

Accordingly, the TQ and ITIQ devices are provided with the DC coefficient values from the SAE calculation unit 400 in advance, and are required for the IQIT operation regardless of the integer DCT operation of the luminance AC blocks 0 to 15 and the chromaticity AC blocks 18 to 25. The quantized DC components DC (Y), DC (cb) and DC (cr) and the dequantized DC components IDC (Y), DC (cb) and IDC (cr) can be calculated in advance.

As a result, not only can the IQIT operation according to the present invention be performed as soon as the constant DCT and TQ for the luminance AC blocks 0-15 are completed, but also the TQ / IQIT operation is performed for the luminance AC blocks 0-15, saturation. Since only the AC blocks 18-25 are performed, the operation speed of the TQ and IQIT is also improved.

In the above embodiment, four input signals and prediction signals are input in one cycle, and the first and second prediction units are provided with four subtraction units, four absolute value calculation units, and four operation mode selection units. This can be actively varied as needed.

For example, eight input signals and a prediction signal are input per cycle, and the first and second predictors are provided with eight subtractors, eight absolute value calculators, and eight operation mode selectors, or 16 per cycle. Input signals and prediction signals may be input, and the first and second predictors may include 16 subtractors, 16 absolute value calculators, and 16 operation mode selectors.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and it is common in the art that various substitutions, modifications, and changes can be made without departing from the technical spirit of the present invention. It will be apparent to those skilled in the art.

FIG. 1 is a diagram illustrating a transmission order of data in a macro block when encoding an input image according to intra 16 × 16 luminance prediction.

2 is a diagram for describing an input image coding method according to intra 16 × 16 luminance prediction according to the related art.

3 is a diagram for describing an input image coding method according to intra 16 × 16 luminance prediction according to an embodiment of the present invention.

4 is a diagram illustrating a partial configuration of an H.264 coding apparatus according to an embodiment of the present invention.

5 is a diagram showing the detailed configuration of the SAE calculation unit according to an embodiment of the present invention.

Claims (10)

A plurality of subtraction units for calculating a difference between an input signal and a prediction signal; A plurality of absolute value calculators for calculating an absolute value of a difference between an input signal and a predicted signal calculated by the plurality of subtraction units; A plurality of operation mode selection units for selecting output signals of the plurality of subtraction units in a DC coefficient calculation mode, and selecting and outputting output signals of the plurality of absolute value calculators in a sum of absolute error (SAE) calculation mode; An adder configured to sum all output signals of the plurality of operation mode selectors; A SAE value output unit for obtaining and outputting an SAE value for one macro block from an output signal of the adder; And And a DC coefficient value output unit for obtaining and outputting a DC coefficient value for one macro block from the output signal of the adder. According to claim 1, wherein the DC coefficient value output unit A DC register for sequentially storing signals output from the adder for a plurality of cycles to obtain the DC coefficient value; And And a DC coefficient value output unit for providing the DC coefficient value stored in the DC register to the Hadamard transform unit. The method of claim 1, wherein the DC register In the intra 16x16 luminance prediction mode, when n input signals and n prediction signals are input, the signals output from the adder are sequentially stored during '16 / n 'cycles to obtain the DC coefficient values. and, In the intra 8 × 8 chroma prediction mode, when n input signals and prediction signals are input by n, the DC coefficient value is obtained by sequentially storing the signals output from the adder during '8 / n' cycles. SAE calculation device. An input signal memory for storing input signals for one macro block; A prediction signal providing unit providing prediction signals corresponding to each of the input signals; An SAE calculation unit for calculating a prediction mode SAE value from the input signals and the prediction signals in the SAE calculation mode, and calculating a DC coefficient value from the input signals and the prediction signals in the DC coefficient calculation mode; And When the SAE calculation unit calculates the SAE value for each prediction mode, the SAE value for each prediction mode is analyzed to determine the optimal prediction mode, and when the SAE calculation unit calculates the DC coefficient value, the DC coefficient value is converted by Hadamard. An H.264 coding apparatus including a prediction mode selection unit provided to a transform and quantization (TQ) and an inverse quantization and inverse transform (IQIT) device. The method of claim 4, wherein the SAE calculation unit Corresponding to one prediction mode among a plurality of prediction modes, the SAE value of the one prediction mode is calculated from the input signals and the prediction signals in the SAE calculation mode, and the input signals in the DC coefficient calculation mode. A first predictor calculating a DC coefficient value from the predicted signals; And A second prediction unit corresponds to each of the remaining prediction modes except one prediction mode among a plurality of prediction modes, and calculates SAE values of the remaining prediction modes from the input signals and the prediction signals, respectively. H.264 coding apparatus, characterized in that. The method of claim 5, wherein the first prediction portion A plurality of subtraction units for calculating a difference between the input signal and the prediction signal; A plurality of absolute value calculators for calculating an absolute value of a difference between an input signal and a predicted signal calculated by the plurality of subtraction units; A plurality of operation mode selectors for selecting output signals of the plurality of subtraction parts in a DC coefficient calculation mode and selecting and outputting output signals of the plurality of absolute value calculators in an SAE calculation mode; An adder configured to sum all output signals of the plurality of operation mode selectors; A SAE value output unit for obtaining and outputting an SAE value for one macro block from an output signal of the adder; And And a DC coefficient value output unit for obtaining and outputting a DC coefficient value for one macro block from the output signal of the adder. The method of claim 6, wherein the DC coefficient value output unit A DC register for sequentially storing signals output from the adder for a plurality of cycles to obtain the DC coefficient value; And And a DC coefficient value output unit configured to provide a DC coefficient value stored in the DC register to the prediction mode selection unit to perform Hadamard transform. The method of claim 6, wherein the DC register is In the intra 16x16 luminance prediction mode, when n input signals and n prediction signals are input, the signals output from the adder are sequentially stored during '16 / n 'cycles to obtain the DC coefficient values. and, In the intra 8 × 8 chroma prediction mode, when n input signals and prediction signals are input by n, the DC coefficient value is obtained by sequentially storing the signals output from the adder during '8 / n' cycles. H.264 coding device. The method of claim 6, wherein the prediction mode selection unit An optimum mode determiner configured to determine an optimal prediction mode by analyzing the SAE value for each prediction mode when the SAE calculator calculates an SAE value for each prediction mode; And And a Hadamard transform unit for performing Hadamard transform on the DC coefficient value when the SAE calculator calculates the DC coefficient value. The method of claim 9, wherein the prediction signal providing unit A prediction signal generation unit which stores prediction signals for each prediction mode corresponding to each of the input signals, and sequentially outputs n (n is a natural number) per cycle for each prediction mode; And And a prediction signal selector which selects only n prediction signals corresponding to an optimal prediction mode from the prediction signals output from the prediction signal generator and provides the prediction signal to the SAE calculator.

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