KR20100053911A - Method for fabricating semiconductor device - Google Patents

Method for fabricating semiconductor device Download PDF

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Publication number
KR20100053911A
KR20100053911A KR1020080112790A KR20080112790A KR20100053911A KR 20100053911 A KR20100053911 A KR 20100053911A KR 1020080112790 A KR1020080112790 A KR 1020080112790A KR 20080112790 A KR20080112790 A KR 20080112790A KR 20100053911 A KR20100053911 A KR 20100053911A
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KR
South Korea
Prior art keywords
hard mask
mask layer
etching
layer
film
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KR1020080112790A
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Korean (ko)
Inventor
선준협
Original Assignee
주식회사 하이닉스반도체
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Priority to KR1020080112790A priority Critical patent/KR20100053911A/en
Publication of KR20100053911A publication Critical patent/KR20100053911A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE: A method for fabricating a semiconductor device is provided to prevent a defective due to the deformation of a photosensitive pattern by laminating a first and a second hardmask pattern. CONSTITUTION: An amorphous carbon layer is formed on an etch target layer(11). A first hard mask layer has a selection ratio of the amorphous carbon layer(12). A second hard mask layer(14A) is formed on the first hard mask layer. A photosensitive pattern is formed on the second hard mask layer. The second hard mask layer is etched by using a photosensitive pattern as an etching barrier wall and the photosensitive pattern is removed. The first hard mask layer is etched by using the second hard mask layer as an etching barrier wall. The amorphous carbon layer is etched by using a second and the first hard mask layer as an etching barrier wall.

Description

Semiconductor device manufacturing method {METHOD FOR FABRICATING SEMICONDUCTOR DEVICE}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to semiconductor manufacturing technology, and more particularly, to a method for manufacturing a hard mask of a semiconductor device.

In order to improve the etch margin lacking in the photoresist layer due to the high integration and miniaturization of the semiconductor device, a process of further forming a hard mask layer under the photoresist layer has been proposed.

The material used as the hard mask layer typically includes an amorphous carbon layer, and when an amorphous carbon layer is applied, a silicon oxynitride layer (SiON) is formed on the amorphous carbon layer for etching the amorphous carbon layer.

On the other hand, the coating thickness of the photoresist film is lowered to 900 or less in order to prevent the collapse of the photoresist film due to the continuous integration and miniaturization, and the photoresist film using the Armm fluoride (ArF) exposure source of the immersion method is developed. (Develop) Loss occurs largely, and after development, the height of the photoresist film is reduced to 500Å or less.

However, when the height of the photoresist film is lowered as described above, there is a problem that the etching of the silicon oxynitride film at the bottom is impossible.

In addition, when the thickness is lowered to etch the silicon oxynitride layer, the amorphous carbon layer cannot be etched due to lack of margin, and when the etching selectivity of the silicon oxynitride layer is increased, the etching is possible even though the LER (Line Edge Roughness), that is, striation (Striation) and critical dimension (Critical Dimension) adjustment is difficult problem.

The present invention has been proposed to solve the above problems of the prior art, and an object thereof is to provide a method for manufacturing a semiconductor device that increases the margin of the etching process.

The semiconductor device manufacturing method of the present invention for achieving the above object comprises the steps of forming an amorphous carbon layer on the etching target layer; Forming a first hard mask layer having a selectivity with respect to the amorphous carbon layer on the amorphous carbon layer; Forming a second hard mask layer having a selectivity with respect to the first hard mask layer and the amorphous carbon layer on the first hard mask layer; Forming a photoresist pattern on the second hard mask layer; Etching the second hard mask layer using the photoresist pattern as an etch barrier; Removing the photoresist pattern; Etching the first hard mask layer using the second hard mask layer as an etch barrier; And etching the amorphous carbon layer using the second and first hard mask layers as an etch barrier.

The first hard mask layer is any one selected from the group consisting of an oxide film, a polysilicon film, and an oxynitride film, and the oxide film is a TEOS oxide film.

The second hard mask layer may be any one selected from the group consisting of an oxynitride film, a nitride film, and a polysilicon film.

In the etching of the second hard mask layer, the second hard mask layer is an oxynitride film or a nitride film, and is etched using a mixed gas in which CHF 3 gas is added to CF 4 gas.

Further, in the etching of the second hard mask layer, the second hard mask layer is a polysilicon film, and is etched using a mixed gas in which Cl 2 or CH 4 gas is added to HBr gas.

In the etching of the first hard mask layer, the first hard mask layer is an oxide film and is etched using C 4 F 8 or C 4 F 6 gas.

In the etching of the first hard mask layer, the first hard mask layer is a polysilicon film, and is etched using HBr or Cl 2 gas as a stock corner gas.

The first hard mask layer is an oxynitride film, and is etched using a mixed gas in which a mixed gas of CF 4 and CHF 3 is added to the CH 2 F 2 gas.

The semiconductor device manufacturing method of the present invention described above has an effect of securing an etching margin by stacking first and second hard mask layers having different selectivity to prevent pattern defects due to deformation of the photosensitive film pattern.

In addition, the etching of the thick amorphous carbon layer corresponding to the photoresist pattern may be sufficiently performed, and the margin of the etching process may be increased to secure the stabilization of the yield of the device.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings in order to facilitate a person skilled in the art to easily carry out the technical idea of the present invention. .

1A to 1E are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with an embodiment of the present invention.

As shown in FIG. 1A, an amorphous carbon layer 12 is formed on the etching target layer 11. The etching target layer 11 may be a substrate and may be an insulating film or a conductive film. The amorphous carbon layer 12 is to be used as a hard mask for etching the etching target layer 11.

Subsequently, the first hard mask layer 13 having a selectivity with respect to the amorphous carbon layer 12 is formed on the amorphous carbon layer 12. The first hard mask layer 13 is used as an etch barrier of the amorphous carbon layer 12 and is formed of any one selected from the group consisting of an oxide film, a polysilicon film, and a silicon oxynitride film. In particular, the oxide film includes a TEOS (Tetra Ethyle Ortho Silicate) oxide film.

Subsequently, a second hard mask layer 14 having a selectivity with respect to the amorphous carbon layer 12 and the first hard mask layer 13 is formed on the first hard mask layer 13. The second hard mask layer 14 is used together with the first hard mask layer 13 as an etch barrier of the amorphous carbon layer 12. The second hard mask layer 14 is formed of any one selected from the group consisting of a silicon oxynitride film, a nitride film (SiN), and a polysilicon film.

The first and second hard mask layers 13 and 14 are for use as an etching barrier of the amorphous carbon layer 12, wherein the total thickness of the first and second hard mask layers 13 and 14 is conventional amorphous carbon. It is desirable to adjust the layer 12 to be equal to the thickness of the etch barrier for etching. For example, assuming that the thickness of the silicon oxynitride film applied to etch the amorphous carbon layer 12 is 500 kPa, the total thickness of the first and second hard mask layers 13 and 14 is adjusted to 500 kPa. In addition, the first and second hard mask layers 13 and 14 may adjust the thickness ratio, and the thickness ratio of the first hard mask layer 13: second hard mask layer 14 is 100. Assuming, you can adjust between 30:70 and 70:30.

The first and second hard mask layers 13 and 14 are stacked in a combination having a high selectivity between the upper and lower parts, for example, a stacked structure of an oxide film (TEOS) and a silicon oxynitride film, a stacked structure of a polysilicon film and a silicon oxynitride film, an oxide film, and the like. It can be formed to have any one lamination structure selected from the group consisting of a lamination structure of a nitride film, a lamination structure of an oxide film and a polysilicon, and a lamination structure of a silicon oxynitride film and a polysilicon film.

Subsequently, an antireflection film 15 is formed on the second hard mask layer 14.

Subsequently, the photosensitive film pattern 16 is formed on the antireflection film 15. The photoresist pattern 16 is formed by coating a photoresist on the antireflection film 15, then performing exposure using an ArF exposure source, and developing by using an immersion method. can do. At this time, in order to prevent the collapse (Collapse) of the photosensitive film is coated to have a thickness of 900 ~ 1000Å, the photoresist film is largely lost after development, the thickness of the photosensitive film is less than 500Å. That is, the photosensitive film pattern 16 formed on the antireflection film 15 is formed to have a thickness of 500 kPa or less.

As shown in FIG. 1B, the anti-reflection film 15A and the second hard mask layer 14A are etched using the photoresist pattern 16 as an etch barrier.

The second hard mask layer 14A is etched using different gases depending on the type of material. When the second hard mask layer 14A is a silicon oxynitride film or nitride film, it is preferable to etch using a mixed gas in which CHF 3 gas is added to CF 4 gas. In addition, when the second hard mask layer 14A is a polysilicon film, etching is preferably performed using a mixed gas in which Cl 2 or CH 4 gas is added to the HBr gas.

Since the etching barrier for etching the amorphous carbon layer 12 is formed by dividing the first and second hard mask layers 13 and 14, only the second hard mask layer 14 is etched by the photoresist pattern 16, Even if the photosensitive film pattern 16 is formed to be 500 Å or less, sufficient etching margin can be secured.

Therefore, it is possible to prevent a pattern defect due to deformation of the photoresist layer, that is, difficulty in controlling striation and critical dimensions.

As shown in FIG. 1C, the photosensitive film pattern 16 and the antireflection film 15A are removed. The photoresist pattern 16 and the antireflection film 15A are removed by dry etching, but are removed by using an oxygen (O 2 ) -based plasma.

Accordingly, only the second hard mask layer 14A remains on the first hard mask layer 13, and thus, a problem in etching the photoresist pattern 16, that is, a pattern defect due to deformation of the photoresist layer, may be prevented.

As shown in FIG. 1D, the first hard mask layer 13A is etched using the second hard mask layer 14A as an etch barrier. The first hard mask layer 13A is etched using different gases depending on the type of material.

When the first hard mask layer 13A is an oxide film, etching is preferably performed using C 4 F 8 or C 4 F 6 gas. That is, the first and second hard mask layers 13A and 14A include one oxide film selected from the group consisting of a lamination structure of an oxide film and a silicon oxynitride film, a lamination structure of an oxide film and a nitride film, and a lamination structure of an oxide film and a polysilicon film. In the case of the laminated structure, the etching is performed by utilizing oxide film etching conditions having a high selectivity to nitride film or polysilicon.

In addition, when the first hard mask layer 13A is a polysilicon film, etching is preferably performed using HBr or Cl 2 gas as a stock corner gas. That is, in the case of the laminated structure of the polysilicon film and the silicon oxynitride film, the etching is performed by using an etching condition having a high selectivity with respect to the nitride film.

In addition, when the first hard mask layer 13A is an oxynitride film, it is preferable to etch using a mixed gas in which a mixed gas of CF 4 and CHF 3 is added to the CH 2 F 2 gas. That is, in the case of the stacked structure of the silicon oxynitride film and the polysilicon film, etching is performed using an etching condition having a high selectivity with respect to the polysilicon.

As described above, after the photoresist pattern 16 (see FIG. 1B) is removed in advance, the first hard mask layer 13A is etched using the second hard mask layer 14A as an etch barrier, and the second hard mask layer 14A is then etched. By performing the etching by using the etching conditions with a high selectivity for the can increase the margin of the etching process, it is possible to prevent the pattern failure due to the deformation of the photosensitive film pattern.

As shown in FIG. 1E, the amorphous carbon layer 12A is etched using the second and first hard mask layers 14A and 13A as an etch barrier. The amorphous carbon layer 12A is etched using an etching gas mainly containing oxygen (Oxygen). Since the first and second hard mask layers 13A and 14A having a selectivity with respect to the amorphous carbon layer 12A serve as etch barriers, respectively, a sufficient barrier role is possible, so that the photoresist pattern 16 (see FIG. 1B) is provided. The thick amorphous carbon layer 12A can be etched in correspondence with C), thereby increasing the margin of the etching process.

In the subsequent process, the etching target layer 11 may be etched using the amorphous carbon layer 12A as an etch barrier to form an etching pattern.

On the other hand, the present invention is applicable to all semiconductor manufacturing processes applying the hard mask layer.

As such, although the technical idea of the present invention has been described in detail according to the above-described preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

1A to 1E are cross-sectional views illustrating a method of manufacturing a semiconductor device in accordance with an embodiment of the present invention.

* Explanation of symbols for the main parts of the drawings

11: etching target layer 12: amorphous carbon layer

13: first hard mask layer 14: second hard mask layer

15: photosensitive film pattern

Claims (9)

Forming an amorphous carbon layer on the etching target layer; Forming a first hard mask layer having a selectivity with respect to the amorphous carbon layer on the amorphous carbon layer; Forming a second hard mask layer having a selectivity with respect to the first hard mask layer and an amorphous carbon layer on the first hard mask layer; Forming a photoresist pattern on the second hard mask layer; Etching the second hard mask layer using the photoresist pattern as an etch barrier; Removing the photoresist pattern; Etching the first hard mask layer using the second hard mask layer as an etch barrier; And Etching the amorphous carbon layer using the second and first hard mask layers as an etch barrier A semiconductor device manufacturing method comprising a. The method of claim 1, The first hard mask layer is any one selected from the group consisting of an oxide film, a polysilicon film and an oxynitride film. The method of claim 2, The oxide film is a TEOS oxide film. The method of claim 1, The second hard mask layer is any one selected from the group consisting of an oxynitride film, a nitride film and a polysilicon film. The method of claim 1, In the etching of the second hard mask layer, And the second hard mask layer is an oxynitride film or a nitride film, and is etched using a mixed gas in which CHF 3 gas is added to CF 4 gas. The method of claim 1, In the etching of the second hard mask layer, The second hard mask layer is a polysilicon film and is etched using a mixed gas in which Cl 2 or CH 4 gas is added to HBr gas. The method of claim 1, In the etching of the first hard mask layer, The first hard mask layer is an oxide film and etched using C 4 F 8 or C 4 F 6 gas. The method of claim 1, In the etching of the first hard mask layer, The first hard mask layer is a polysilicon film and is etched using HBr or Cl 2 gas as a stock corner gas. The method of claim 1, In the etching of the first hard mask layer, And the first hard mask layer is an oxynitride film, and is etched using a mixed gas in which a mixed gas of CF 4 and CHF 3 is added to the CH 2 F 2 gas.
KR1020080112790A 2008-11-13 2008-11-13 Method for fabricating semiconductor device KR20100053911A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10586709B2 (en) 2017-12-05 2020-03-10 Samsung Electronics Co., Ltd. Methods of fabricating semiconductor devices

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10586709B2 (en) 2017-12-05 2020-03-10 Samsung Electronics Co., Ltd. Methods of fabricating semiconductor devices

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